* New: In CRL Core, in helpers & alliance.conf, set and read a "PAD"
variable to define the pad model name extension ("px" for "sxlib
and "pxr" for vsxlib, this is provisional).
* New: In CRL Core, in plugin.conf, add parameters to define the name
of used for power & clock supply. We may remove the extention in
the future (to be more coherent with the previous modification).
* New: In Cumulus, in chip.Configuration.GaugeConf._rpAccess(), no
longer place the accessing contact *at the center* of the
RoutingPad. It works under sxlib because buffers & registers all
have same size terminals. But this is not true under vsxlib,
leading to misaligned contacts & wires. Now systematically place
on the slice midlle track (maybe with one pitch above or below).
This is still very weak as we do not check if the terminal
reach were the contact is being put. Has to be strenthened in
the future.
* New: In Cumulus, in chip.Configuration.ChipConf, read the new
clock & power pad parameters.
* Change: In Isobar (and all other Python wrappers), uses PyLong instead
of PyInt for DbU conversions. In PyHurricane argument converter,
automatically check for both PyLong and then PyInt.
* Change: In Cumulus, in chip.PadsCorona, more accurate error message
in case of discrepency in global net connections (i.e. no net
of the same name in instance model and instance model owner.
* Change: In Kite, in BuildPowerRails, when looking up at the pads
model name to find "pck_" or "pvddeck_", do not compare the
extension part. But we still use hard-coded stem pad names,
maybe we shouldn't.
* Bug: In Katabatic, in GCellConfiguration::_do_xG_xM1_xM3(), there
was a loop in the search of the best N/E initial RoutingPad.
* Bug: In Kite, in KiteEngine::protectRoutingPads(), *do not* protect
RoutingPads of fixed nets, they are already through the
BuildPowerRails stage (and it's causing scary overlap warning
messages).
* Bug: In Cumulus, in ClockTree.HTreeNode.addLeaf(), do not create
deep-plug when the core is flat (not sub-modules). All the new
nets are at core level.
* Bug: In Cumulus, in ChipPlugin.PlaceCore.doFloorplan(), ensure
that the core is aligned on the GCell grid (i.e. the slice
grid of the overall chip).
* Bug: In Kite, in GCellTopology::_do_xG_xM1_xM3(), infinite loop
while looking for the bigger N-E RoutingPad. Forgot to decrement
the index...
* New: In CRL Core, added configuration for SCMOS_DEEP symbolic technology
up to 180nm "scmos_deep_018". It is postfixed "_018" because it is not
yet compliant with 130nm (asymetrical VIA metal extensions).
Added the associated real technology SCN6M_DEEP (TSMC 180nm).
In CRL Core configuration files, "display.conf", "patterns.conf" and
"technology.conf" share most of their code. So that common part is put
into "common/" and sourced from the final configuration file.
Update the documentation according the the new initialization scheme.
In CRL Core, the layout of the files under "/coriolis2/etc" changes.
Instead of having them directly under "etc", they are now replicated,
in subdirectories. Each subdirectory having the name of the associated
symbolic or real technology (they are kept separated). We have, for
now:
* etc/cmos/ : symbolic, the Alliance original one.
* etc/vsc200/ : symbolic, for G. Petley vsclib.
* etc/hcmos9/ : real, generic fake (130nm).
To tell which pair (symbolic,real) technologies must be used we create
a *second* (sigh) configuration file "coriolis2_techno.conf", and it's
hidden counterpart in the user's account, to set it up. It needs to be
separate because it is read as early as possible and select which set
of configuration files would be read.
Also add support up to METAL8 and POLY2 in CRL core and it's Alliance
parser/drivers.
- New: Added FreeBSD/Ubuntu patches from Otacilio De Araujo
(<otaciliodearaujo@gmail.com>).
* ./crlcore:
- New: In Utilities, cbug stream to separate all the scary messages
from Kite/Katabatic and maybe others.
- New: In stratus1.conf, adds default settings previously in st_config.
- New: Moves Python configuration helpers from under /etc/coriolis2
into PYTHON_SITE_PACKAGES/crlcore. Adapt Utilities so coriolisInit.py
is now searched in that directory. This way only true configuration
files remains under /etc/coriolis2
- Change: In helpers/__init__.py, do not try to guess the sysConfDir
when not run through coriolisInit.py. This is done by exploring the
call stack with traceback.
- Change: In ApDriver, when a physical view is driven, update the flag
in the catalog state telling that this view is present. This is far
from satisfactory as this flag should be set as soon as any physical
component is created.
- A complete sweep of cleanup to suppress allmost all compiler warnings.
* ./crlcore:
- New: Extented Python support for all objects needed to configure Coriolis.
- New: Configuration files and load helpers completly written in Python.
An XML emulation mode is still avalaible.
- New: UsersGuide, as a replacement for README, written in ReST.
- New: Start of Doxygen documentation (mostly for documenting the initialisation
objects & methods).
- New: Adds a README.tex describing the essentials features of Coriolis2.
- New: Support for LaTeX in CMake through the macros supplieds by Sandia.
- Change: Adds support for installation of config file in system-wide
/etc.
- Change: adopt a tree layout compliant with the UNIX FHS.
* includes under TOP/include/coriolis2.
* shared datas under TOP/shared/coriolis2.
* docs under TOP/share/doc/coriolis2.
* configuration under TOP/etc/coriolis2
* ./crlcore:
- Change: In Environment, comply to the new tree layout, search configuration
files under TOP/etc/coriolis2/.
* ./knik:
- Change: In flute, comply to the new tree layout, get the "POW*.dat" files
from TOP/share/coriolis2/flute-2.4.
- Change: In the CMakeLists.txt, in all the install commands remove all
the leading "/" as they prevents the CMAKE_INSTALL_PREFIX to be took
into account. It was nevertheless working because buildCoriolis.py was
using DESTDIR which is prepended anyway.
* ./goodies:
- Change: In buildCoriolis.py, no longer uses the DESTDIR but instead
CMAKE_INSTALL_PREFIX.
./coriolis/src/crlcore,
./coriolis/src/knik,
./coriolis/src/katabatic,
./coriolis/src/kite,
./coriolis/src/equinox,
./coriolis/src/solstice,
./coriolis/src/ispd:
- SVN MOVE: Source tree simplification & uniformisation. Now all tools
are at the same level, directly under the root of the repository.
No more "coriolis/src".