Merged bug fixes and improvements

* Steiner tree topology
* Install path detection
* Additional Alliance layer
* Blif parser presented first

bootstrap/builder/Configuration.py

@@ -167,7 +167,8 @@ class Configuration ( object ):
         elif self._osFedora    .match(lines[0]): self._osType = "Linux.fc"
         elif self._osLinux_64  .match(lines[0]):
             self._osType    = "Linux.x86_64"
-            self._libSuffix = "64"
+            if os.path.exists("/usr/lib64/"):
+                self._libSuffix = "64"
         elif self._osLinux     .match(lines[0]): self._osType = "Linux.i386"
         elif self._osDarwin    .match(lines[0]): self._osType = "Darwin"
         elif self._osFreeBSD8x_amd64.match(lines[0]):

bootstrap/coriolisEnv.py

@@ -84,7 +84,8 @@ def guessOs ():
       libDir = "lib64"
     elif osLinux_64.match(lines[0]):
       osType = "Linux.x86_64"
-      libDir = "lib64"
+      if(os.path.exists("/usr/lib64/")):
+        libDir = "lib64"
     elif osLinux.match(lines[0]):
       osType = "Linux.i386"
     elif osFreeBSD8x_64.match(lines[0]):

coloquinte/src/coloquinte/circuit_helper.hxx

@@ -82,6 +82,7 @@ std::int64_t get_HPWL_length(netlist const & circuit, placement_t const & pl, in
 std::int64_t get_RSMT_length(netlist const & circuit, placement_t const & pl, index_t net_ind);
 
 std::vector<std::pair<index_t, index_t> > get_MST_topology(std::vector<point<int_t> > const & pins);
+std::vector<std::pair<index_t, index_t> > get_RSMT_horizontal_topology(std::vector<point<int_t> > const & pins, index_t exactitude_limits);
 point<std::vector<std::pair<index_t, index_t> > > get_RSMT_topology(std::vector<point<int_t> > const & pins, index_t exactitude_limit);
 
 } // namespace coloquinte

coloquinte/src/topologies.cxx

@@ -343,9 +343,55 @@ std::vector<edge_t> get_big_horizontal_topology_from_sorted(std::vector<point<in
     // Sort the tree so that it is usable when building an RSMT    
     return get_tree_topo_sort(Htopo);
 }
-
 } // End anonymous namespace
 
+std::vector<edge_t> get_RSMT_horizontal_topology(std::vector<point<int_t> > const & pins, index_t exactitude_limit){
+    if(pins.size() <= 1)
+        return std::vector<edge_t>();
+    else if(pins.size() == 2)
+        return std::vector<edge_t>(1, edge_t(0, 1));
+    else if(pins.size() == 3){
+        std::vector<indexed_pt> ipoints(pins.size());
+        for(index_t i=0; i<pins.size(); ++i){
+            ipoints[i] = indexed_pt(pins[i], i);
+        }
+        auto xpoints=ipoints;
+        std::sort(xpoints.begin(), xpoints.end(), [](indexed_pt a , indexed_pt b){return a.x_ < b.x_; });
+        
+        return std::vector<edge_t>{{xpoints[0].index, xpoints[1].index}, {xpoints[1].index, xpoints[2].index}};
+    }
+    else{
+        std::vector<edge_t> horizontal_topology;
+
+        // Sort the pins by x coordinate
+        std::vector<indexed_pt> ipoints(pins.size());
+        for(index_t i=0; i<pins.size(); ++i){
+            ipoints[i] = indexed_pt(pins[i], i);
+        }
+        std::sort(ipoints.begin(), ipoints.end(), [](indexed_pt a , indexed_pt b){return a.x_ < b.x_; });
+        std::vector<point<int_t> > sorted_pins(pins.size());
+        for(index_t i=0; i<pins.size(); ++i){
+            sorted_pins[i] = ipoints[i];
+        }
+
+        // Get the topology for this ordering
+        if(pins.size() <= exactitude_limit){
+            horizontal_topology = get_small_horizontal_topology_from_sorted(sorted_pins);
+        }
+        else{
+            horizontal_topology = get_big_horizontal_topology_from_sorted(sorted_pins, exactitude_limit);
+        }
+
+        // Back to the original ordering
+        for(auto & E : horizontal_topology){
+            E.first = ipoints[E.first].index;
+            E.second = ipoints[E.second].index;
+        }
+
+        return horizontal_topology;
+    }
+}
+
 std::vector<std::pair<index_t, index_t> > get_MST_topology(std::vector<point<int_t> > const & pins){
 
 	std::vector<edge_t> edges;
@@ -478,34 +524,8 @@ point<std::vector<std::pair<index_t, index_t> > > get_RSMT_topology(std::vector<
         return point<std::vector<edge_t> >{{{xpoints[0].index, xpoints[1].index}, {xpoints[1].index, xpoints[2].index}}, {{ypoints[0].index, ypoints[1].index}, {ypoints[1].index, ypoints[2].index}}};
     }
     else{
-        std::vector<edge_t> horizontal_topology;
+        std::vector<edge_t> horizontal_topology = get_RSMT_horizontal_topology(pins, exactitude_limit);
-
+        return point<std::vector<edge_t> >(horizontal_topology, get_vertical_topology(pins, horizontal_topology));
-        // Sort the pins by x coordinate
-        std::vector<indexed_pt> ipoints(pins.size());
-        for(index_t i=0; i<pins.size(); ++i){
-            ipoints[i] = indexed_pt(pins[i], i);
-        }
-        std::sort(ipoints.begin(), ipoints.end(), [](indexed_pt a , indexed_pt b){return a.x_ < b.x_; });
-        std::vector<point<int_t> > sorted_pins(pins.size());
-        for(index_t i=0; i<pins.size(); ++i){
-            sorted_pins[i] = ipoints[i];
-        }
-
-        // Get the topology for this ordering
-        if(pins.size() <= exactitude_limit){
-            horizontal_topology = get_small_horizontal_topology_from_sorted(sorted_pins);
-        }
-        else{
-            horizontal_topology = get_big_horizontal_topology_from_sorted(sorted_pins, exactitude_limit);
-        }
-
-        // Back to the original ordering
-        for(auto & E : horizontal_topology){
-            E.first = ipoints[E.first].index;
-            E.second = ipoints[E.second].index;
-        }
-
-        return point<std::vector<edge_t> >(horizontal_topology, get_vertical_topology(sorted_pins, horizontal_topology));
     }
 }
 

crlcore/src/ccore/alliance/ap/ApParser.cpp

@@ -249,6 +249,7 @@ namespace {
       _layerInformations.add ( "CONT_POLY"  , "CONT_POLY"  , false, false );
       _layerInformations.add ( "CONT_POLY2" , "CONT_POLY2" , false, false );
       _layerInformations.add ( "CONT_VIA"   , "VIA12"      , false, false );
+      _layerInformations.add ( "CONT_VIA1"  , "VIA12"      , false, false );
       _layerInformations.add ( "CONT_VIA2"  , "VIA23"      , false, false );
       _layerInformations.add ( "CONT_VIA3"  , "VIA34"      , false, false );
       _layerInformations.add ( "CONT_VIA4"  , "VIA45"      , false, false );

crlcore/src/ccore/blif/BlifParser.cpp

@@ -338,8 +338,10 @@ namespace {
 
   void  Model::connectModels ()
   {
-    for ( Model* blifModel : _blifOrder )
+    for ( Model* blifModel : _blifOrder ){
+      cmess2 << "Handling model <" << blifModel->getCell()->getName() << ">" << endl;
       blifModel->connectSubckts();
+    }
   }
 
 
@@ -480,20 +482,62 @@ namespace {
       for ( auto connection : subckt->getConnections() ) {
         string masterNetName = connection.first;
         string netName       = connection.second;
+        //cparanoid << "\tConnection "
+        //          << "plug: <" << masterNetName << ">, "
+        //          << "external: <" << netName << ">."
+        //          << endl;
         Net*   net           = _cell->getNet( netName );
-        Plug*  plug          = instance->getPlug( instance->getMasterCell()->getNet(masterNetName) );
-        Net*   plugNet       = plug->getNet();
 
-        if (not plugNet) {
+        Net*   masterNet     = instance->getMasterCell()->getNet(masterNetName);
-          if (not net) net = Net::create( _cell, netName );
+        if(not masterNet) {
-          plug->setNet( net );
+          ostringstream tmes;
-          continue;
+          tmes << "The master net <" << masterNetName << "> hasn't been found "
+               << "for instance <" << subckt->getInstanceName() << "> "
+               << "of model <" << subckt->getModelName() << ">"
+               << "in model <" << getCell()->getName() << ">"
+               << endl;
+          throw Error(tmes.str());
         }
 
-        if (not net) { plugNet->addAlias( netName ); continue; }
+        Plug*  plug          = instance->getPlug( masterNet );
-        if (plugNet == net) continue;
+        if(not plug) {
+          ostringstream tmes;
+          tmes << "The plug in net <" << netName << "> "
+               << "and master net <" << masterNetName << "> hasn't been found "
+               << "for instance <" << subckt->getInstanceName() << "> "
+               << "of model <" << subckt->getModelName() << ">"
+               << "in model <" << getCell()->getName() << ">"
+               << endl;
+          throw Error(tmes.str());
+        }
 
-        plugNet->merge( net );
+
+        Net*   plugNet       = plug->getNet();
+
+        if (not plugNet) { // Plug not connected yet
+          if (not net) net = Net::create( _cell, netName );
+          plug->setNet( net );
+          plugNet = net;
+        }
+        else if (not net) { // Net doesn't exist yet
+          plugNet->addAlias( netName );
+        }
+        else if (plugNet != net){ // Plus already connected to another net
+          plugNet->merge( net );
+        }
+
+        if( plugNet->getType() == Net::Type::POWER or plugNet->getType() == Net::Type::GROUND ){
+          ostringstream tmes;
+          string powType = plugNet->getType() == Net::Type::POWER ? "power" : "ground";
+          string plugName = plugNet->getName()._getString(); // Name of the original net
+          tmes << "Connecting instance <" << subckt->getInstanceName() << "> "
+               << "of <" << subckt->getModelName() << "> "
+               << "to the " << powType << " net <" << plugName << "> ";
+          if(netName != plugName)
+               tmes << "with the alias <" << netName << ">. ";
+          tmes << "Maybe you should use tie cells?";
+          cerr << Warning(tmes.str()) << endl;
+        }
       }
     }
   }
@@ -602,7 +646,23 @@ namespace CRL {
         if (tokenize.state() & Tokenize::CoverAlias) {
           blifModel->mergeAlias( blifLine[1], blifLine[2] );
         } else if (tokenize.state() & Tokenize::CoverZero) {
+          cerr << Warning( "Blif::load() Definition of an alias <%s> of VSS in a \".names\". Maybe you should use tie cells?\n"
+                         "                    File %s.blif at line %u."
+                       , blifLine[1].c_str()
+                       , blifFile.c_str()
+                       , tokenize.lineno()
+                       ) << endl;
+          //blifModel->mergeAlias( blifLine[1], "vss" );
+          blifModel->getCell()->getNet( "vss" )->addAlias( blifLine[1] );
         } else if (tokenize.state() & Tokenize::CoverOne ) {
+          cerr << Warning( "Blif::load() Definition of an alias <%s> of VDD in a \".names\". Maybe you should use tie cells?\n"
+                         "                    File %s.blif at line %u."
+                       , blifLine[1].c_str()
+                       , blifFile.c_str()
+                       , tokenize.lineno()
+                       ) << endl;
+          //blifModel->mergeAlias( blifLine[1], "vdd" );
+          blifModel->getCell()->getNet( "vdd" )->addAlias( blifLine[1] );
         } else {
           cerr << Error( "Blif::load() Unsupported \".names\" cover construct.\n"
                          "                    File %s.blif at line %u."

unicorn/src/UnicornGui.cpp

@@ -89,10 +89,10 @@ namespace Unicorn {
     _runUnicornInit();
 
     _importCell.setDialog( _importDialog );
+    _importCell.addImporter( "BLIF (Yosys/ABC)"            , std::bind( &Blif::load         , placeholders::_1 ) );
     _importCell.addImporter( "ACM/SIGDA (aka MCNC, .bench)", std::bind( &AcmSigda::load     , placeholders::_1 ) );
     _importCell.addImporter( "ISPD'04 (Bookshelf)"         , std::bind( &Ispd04::load       , placeholders::_1 ) );
     _importCell.addImporter( "ISPD'05 (Bookshelf)"         , std::bind( &Ispd05::load       , placeholders::_1 ) );
-    _importCell.addImporter( "BLIF (Yosys/ABC)"            , std::bind( &Blif::load         , placeholders::_1 ) );
     _importCell.addImporter( "ICCAD'04 (LEF/DEF)"          , std::bind( &Iccad04Lefdef::load, placeholders::_1, 0 ) );
     _importCell.addImporter( "Alliance compliant DEF"      , std::bind( &DefImport::load    , placeholders::_1, DefImport::FitAbOnCells) );