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* All Main Python Modules: 

- Change: New problem identified with the Python modules: each module seems
        to be built as a complete binary, so all the static C++ initializers are
        allocated in each module. In particular the C++ tree inheritance is built
        for *each* module so we cannot longer uses the typeid() comparisons
        across modules... It was used by boost::program_options to perform is
        casts with boost::any and was starting throwing exceptions because of
        bad casts. program_option was first initialized in "configuration"
        first included by PyViewer then in PyCRL (see Utilities.cpp).
          A first solution is to re-order the import of Python modules in
        stratus1/st_model so that CRL is imported first.
          The second is to not not link "configuration" with boost::program_option
        as only the binary vlsisapd-conf-editor needs it.
          That is a serious problem of which we must be aware and can cause further
        strange behaviors.
          Debug code used to diagnostic has been kept commented in the sources a
        it may be needed again :-(
          This behavior do not affect our singletons because they are part of
        dynamic libraries that seems to be correctly shared between the various
        Python modules.

  * ./stratus1,
    ./cumulus:
    - Change: Replace calls to CRL.getAllianceFramework() by CRL.AllianceFramework.get().
This commit is contained in:
Jean-Paul Chaput 2010-07-17 10:34:21 +00:00
parent 01ad051a73
commit e736739eef
2 changed files with 2 additions and 2 deletions
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2
stratus1/src/stratus/st_model.py
View File

@ -142,7 +142,7 @@ class Model :
# Creation of the database # Creation of the database
if not FRAMEWORK : if not FRAMEWORK :
#Initialize() #Initialize()
FRAMEWORK = CRL.getAllianceFramework() FRAMEWORK = CRL.AllianceFramework.get()
self._st_vdds = [] self._st_vdds = []
self._st_vsss = [] self._st_vsss = []

2
stratus1/src/stratus/st_placeAndRoute.py
View File

@ -297,7 +297,7 @@ class ClockBuffer :
self.net = self.cell._hur_cell.getNet ( netname ) self.net = self.cell._hur_cell.getNet ( netname )
self.ck_b = Signal ( "ck_b%d"%nbCkBuf, 1 ) self.ck_b = Signal ( "ck_b%d"%nbCkBuf, 1 )
modelMasterCell = CRL.getAllianceFramework().getCell ( "buf_x2", CRL.Catalog.State.Views ) modelMasterCell = CRL.AllianceFramework.get().getCell ( "buf_x2", CRL.Catalog.State.Views )
if not modelMasterCell : if not modelMasterCell :
err = "Stratus Error : ClockBuffer : Cannot find model cell : buf_x2 in database !\n" err = "Stratus Error : ClockBuffer : Cannot find model cell : buf_x2 in database !\n"
raise err raise err