Typos corrigees dans les fichiers du User Guide
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@ -22,7 +22,7 @@ Coriolis Configuration & Initialisation
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General Software Architecture
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General Software Architecture
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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|Coriolis| has been build with respect of the classical paradigm that the
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|Coriolis| has been built with respect of the classical paradigm that the
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computational instensive parts have been written in C++, and almost
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computational instensive parts have been written in C++, and almost
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everything else in |Python|. To build the |Python| interface we used
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everything else in |Python|. To build the |Python| interface we used
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two methods:
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two methods:
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@ -71,7 +71,7 @@ The initialization process is done by executing, in order, the following file(s)
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| **3** | The user's local setting | :cb:`<CWD>/.coriolis2/techno.py` |
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| **3** | The user's local setting | :cb:`<CWD>/.coriolis2/techno.py` |
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+-------+----------------------------------+----------------------------------------------+
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+-------+----------------------------------+----------------------------------------------+
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Thoses files must provides only one variable, the name of the technology. Each technology
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Those files must provide only one variable, the name of the technology. Each technology
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will provide configuration for both the symbolic part and the real part. |Coriolis| can
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will provide configuration for both the symbolic part and the real part. |Coriolis| can
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work with purely symbolic technology (``symbolic/cmos``) in that case, the real technology
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work with purely symbolic technology (``symbolic/cmos``) in that case, the real technology
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part is a dummy one.
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part is a dummy one.
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@ -89,9 +89,9 @@ Second Stage: Technology Configuration Loading
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|noindent|
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|noindent|
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The :cb:`technology` variable is set by the first stage and it's the name of the
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The :cb:`technology` variable is set by the first stage and it's the name of the
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technology. A directory of that name, with all the configuration files,
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technology. A directory of that name, with all the configuration files,
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must exists in the configuration directory (:cb:`/etc/coriolis2`).
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must exist in the configuration directory (:cb:`/etc/coriolis2`).
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In addition to the technology-specific directories, a :cb:`common/` directory is
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In addition to the technology-specific directories, a :cb:`common/` directory is
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there to provides a trunk for all the identical datas across the various technologies.
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there to provide a trunk for all the identical data across the various technologies.
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The initialization process is done by executing, in order, the following file(s):
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The initialization process is done by executing, in order, the following file(s):
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+-------+----------------------------------+-----------------------------------------------+
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+-------+----------------------------------+-----------------------------------------------+
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@ -190,9 +190,9 @@ variable, and if not found, default to ``/soc/alliance``.
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|noindent| The example above shows the system configuration file, with all the
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|noindent| The example above shows the system configuration file, with all the
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available settings. Some important remarks about thoses settings:
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available settings. Some important remarks about those settings:
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* In it's configuration file, the user do not need to redefine all the settings,
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* In its configuration file, the user does not need to redefine all the settings,
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just the one he wants to change. In most of the cases, the ``SYSTEM_LIBRARY``,
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just the one he wants to change. In most of the cases, the ``SYSTEM_LIBRARY``,
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the ``WORKING_LIBRARY`` and the special net names (at this point there is not
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the ``WORKING_LIBRARY`` and the special net names (at this point there is not
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much alternatives for the others settings).
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much alternatives for the others settings).
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@ -209,25 +209,25 @@ available settings. Some important remarks about thoses settings:
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it, whithout changing the search path order. If no library of that name
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it, whithout changing the search path order. If no library of that name
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already exists, it is appended.
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already exists, it is appended.
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A library is identified by it's name, this name is the last component of the
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A library is identified by its name, this name is the last component of the
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path name. For instance: ``/soc/alliance/sxlib`` will be named ``sxlib``.
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path name. For instance: ``/soc/alliance/sxlib`` will be named ``sxlib``.
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Implementing the |Alliance| specification, when looking for a |Cell| ``name``,
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Implementing the |Alliance| specification, when looking for a |Cell| ``name``,
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the system will browse sequentially trought the library list and returns
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the system will browse sequentially through the library list and returns
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the first |Cell| whose name match.
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the first |Cell| whose name match.
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* For ``POWER``, ``GROUND``, ``CLOCK`` and ``BLOCKAGE`` net names, a regular
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* For ``POWER``, ``GROUND``, ``CLOCK`` and ``BLOCKAGE`` net names, a regular
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expression (|GNU| regexp) is expected.
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expression (|GNU| regexp) is expected.
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.. * The ``helpers.sysConfDir`` variable is supplied by the helpers, it is the
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.. * The ``helpers.sysConfDir`` variable is supplied by the helpers, it is the
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.. directory in which the system-wide configuration files are locateds.
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.. directory in which the system-wide configuration files are located.
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.. For a standard installation it would be: ``/soc/coriolis2``.
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.. For a standard installation it would be: ``/soc/coriolis2``.
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..
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..
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.. .. * Trick and naming convention about ``SYMBOLIC_TECHNOLOGY``, ``REAL_TECHNOLOGY``
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.. .. * Trick and naming convention about ``SYMBOLIC_TECHNOLOGY``, ``REAL_TECHNOLOGY``
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.. and ``DISPLAY``. In the previous releases, thoses files where to read by
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.. and ``DISPLAY``. In the previous releases, those files were to be read by
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.. XML parsers, and still do if you triggers the XML compatibility mode.
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.. XML parsers, and still do if you triggers the XML compatibility mode.
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.. But now, they have Python conterparts. In the configuration files, you
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.. But now, they have Python conterparts. In the configuration files, you
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.. still have to name them as XML files, the Python file name will be
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.. still have to name them as XML files, the Python file name will be
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.. deduced from this one with thoses two translation rules:
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.. deduced from this one with those two translation rules:
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..
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..
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.. #. In the filename, all dots, except for the last (the file extention),
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.. #. In the filename, all dots, except for the last (the file extention),
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.. are replaced by underscores.
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.. are replaced by underscores.
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@ -256,11 +256,11 @@ A typical user's configuration file would be: ::
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Tools Configuration Helpers
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Tools Configuration Helpers
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---------------------------
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---------------------------
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All the tools uses the same helper to load their configuration (a.k.a.
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All the tools use the same helper to load their configuration (a.k.a.
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*Configuration Helper*). Currently the following configuration system-wide
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*Configuration Helper*). Currently the following configuration system-wide
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configuration files are defined:
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configuration files are defined:
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* :cb:`misc.conf`: commons settings or not belonging specifically to a tool.
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* :cb:`misc.conf`: common settings or not belonging specifically to a tool.
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* :cb:`etesian.conf`: for the |Etesian| tool.
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* :cb:`etesian.conf`: for the |Etesian| tool.
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* :cb:`kite.conf`: for the |Kite| tool.
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* :cb:`kite.conf`: for the |Kite| tool.
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* :cb:`stratus1.conf`: for the |stratus1| tool.
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* :cb:`stratus1.conf`: for the |stratus1| tool.
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@ -306,18 +306,18 @@ Here is the contents of :cb:`etesian.conf`: ::
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Taxonomy of the file:
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Taxonomy of the file:
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* It must contains, at least, the two tables:
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* It must contain, at least, the two tables:
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* ``parametersTable``, defines & initialise the configuration variables.
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* ``parametersTable``, defines & initialises the configuration variables.
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* ``layoutTables``, defines how the various parameters will be displayed
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* ``layoutTables``, defines how the various parameters will be displayed
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in the configuration window (:ref:`The Settings Tab`).
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in the configuration window (:ref:`The Settings Tab`).
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* The ``parametersTable``, is a tuple (list) of tuples. Each entry in the list
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* The ``parametersTable``, is a tuple (list) of tuples. Each entry in the list
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describe a configuration parameter. In it's simplest form, it's a quadruplet
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describes a configuration parameter. In its simplest form, it's a quadruplet
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:cb:`(TypeOption, 'paramId', ParameterType, DefaultValue)` with:
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:cb:`(TypeOption, 'paramId', ParameterType, DefaultValue)` with:
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#. ``TypeOption``, tells that this tuple describe a parameter.
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#. ``TypeOption``, tells that this tuple describes a parameter.
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#. ``paramId``, the identifier of the parameter. Identifiers are defined
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#. ``paramId``, the identifier of the parameter. Identifiers are defined
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by the tools. The list of parameters is detailed in each tool section.
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by the tools. The list of parameters is detailed in each tool section.
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@ -337,7 +337,7 @@ Taxonomy of the file:
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Hacking the Configuration Files
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Hacking the Configuration Files
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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Asides from the symbols that gets used by the configuration helpers like
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Aside from the symbols that get used by the configuration helpers like
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:cb:`allianceConfig` or :cb:`parametersTable`, you can put pretty much anything
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:cb:`allianceConfig` or :cb:`parametersTable`, you can put pretty much anything
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in :cb:`<CWD>/.coriolis2/settings.py` (that is, written in |Python|).
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in :cb:`<CWD>/.coriolis2/settings.py` (that is, written in |Python|).
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@ -12,7 +12,7 @@ Installation
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As the sources are being released, the binary packaging is dropped.
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As the sources are being released, the binary packaging is dropped.
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You still may find older version here: http://asim.lip6.fr/pub/coriolis/2.0 .
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You still may find older version here: http://asim.lip6.fr/pub/coriolis/2.0 .
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In a nutshell, building source consist in pulling the |git| repository then
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In a nutshell, building source consistis in pulling the |git| repository then
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running the |ccb| installer.
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running the |ccb| installer.
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Main building prerequisites:
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Main building prerequisites:
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@ -47,7 +47,7 @@ For other distributions, refer to their own packaging system.
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Fixed Directory Tree
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Fixed Directory Tree
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~~~~~~~~~~~~~~~~~~~~
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~~~~~~~~~~~~~~~~~~~~
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In order to simplificate the work of the |ccb| installer, the source, build
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In order to simplify the work of the |ccb| installer, the source, build
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and installation tree is fixed. To successfully compile |Coriolis| you must
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and installation tree is fixed. To successfully compile |Coriolis| you must
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follow it exactly. The tree is relative to the home directory of the user
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follow it exactly. The tree is relative to the home directory of the user
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building it (noted :fboxtt:`~/` or :fboxtt:`$HOME/`). Only the source
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building it (noted :fboxtt:`~/` or :fboxtt:`$HOME/`). Only the source
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@ -124,8 +124,8 @@ Third and final step, build & install: ::
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--project=coriolis \
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--project=coriolis \
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--doc --make="-j1 install"
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--doc --make="-j1 install"
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We need to separate to perform a separate installation of the documentation because it
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We need to perform a separate installation of the documentation because it
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do not support to be generated with a parallel build. So we compile & install in a first
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does not support to be generated with a parallel build. So we compile & install in a first
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stage in ``-j4`` (or whatever) then we generate the documentation in ``-j1``
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stage in ``-j4`` (or whatever) then we generate the documentation in ``-j1``
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Under |RHEL6| or clones, you must build using the |devtoolset|, the version is to
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Under |RHEL6| or clones, you must build using the |devtoolset|, the version is to
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@ -156,7 +156,7 @@ In the |Coriolis| |git| repository, two branches are present:
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dummy@lepka:src> ./bootstrap/ccb.py --project=coriolis \
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dummy@lepka:src> ./bootstrap/ccb.py --project=coriolis \
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--make="-j4 install" --debug
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--make="-j4 install" --debug
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Be aware that it may requires newer versions of the dependencies and may introduce
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Be aware that it may require newer versions of the dependencies and may introduce
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incompatibilites with the stable version.
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incompatibilites with the stable version.
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In the (unlikely) event of a crash of |cgt|, as it is a |Python| script, the right
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In the (unlikely) event of a crash of |cgt|, as it is a |Python| script, the right
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@ -187,11 +187,11 @@ Then proceed with the generic install instructions.
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Packaging Coriolis
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Packaging Coriolis
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~~~~~~~~~~~~~~~~~~
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~~~~~~~~~~~~~~~~~~
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Packager should not uses |ccb|, instead ``bootstrap/Makefile.package`` is provided
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Packager should not use |ccb|, instead ``bootstrap/Makefile.package`` is provided
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to emulate a top-level ``autotool`` makefile. Just copy it in the root of the
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to emulate a top-level ``autotool`` makefile. Just copy it in the root of the
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|Coriolis| git repository (``~/corriolis-2.x/src/coriolis/``) and build.
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|Coriolis| git repository (``~/corriolis-2.x/src/coriolis/``) and build.
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Sligthly outaded packaging configuration files can also be found under ``bootstrap/``:
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Sligthly outdated packaging configuration files can also be found under ``bootstrap/``:
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* ``bootstrap/coriolis2.spec.in`` for |rpm| based distributions.
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* ``bootstrap/coriolis2.spec.in`` for |rpm| based distributions.
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* ``bootstrap/debian`` for |Debian| based distributions.
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* ``bootstrap/debian`` for |Debian| based distributions.
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@ -48,7 +48,7 @@ copyright© |UPMC| 2008-2018 and released under the |GPL|
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license.
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license.
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Others important contributors to |Coriolis| are Christophe |Alexandre|,
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Others important contributors to |Coriolis| are Christophe |Alexandre|,
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Hugo |Clement|, Marek |Sroka| and Wu |Yifei|.
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Roselyne |Chotin|, Hugo |Clement|, Marek |Sroka| and Wu |Yifei|.
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The |Knik| router makes use of the |Flute| software, which is
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The |Knik| router makes use of the |Flute| software, which is
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copyright© Chris C. N. |Chu| from the Iowa State University
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copyright© Chris C. N. |Chu| from the Iowa State University
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@ -84,7 +84,7 @@ Release v2.1
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|Etesian| and its legalization and detailed placement tools.
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|Etesian| and its legalization and detailed placement tools.
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#. Added a Blif format parser to process circuits generated by the Yosys and ABC
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#. Added a Blif format parser to process circuits generated by the Yosys and ABC
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logic synthetizers.
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logic synthetizers.
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#. The multiples user defined configuration files are now grouped under
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#. The multiple user defined configuration files are now grouped under
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a common hidden (dot) directory ``.coriolis2`` and the file extension
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a common hidden (dot) directory ``.coriolis2`` and the file extension
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is back from ``.conf`` to ``.py``.
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is back from ``.conf`` to ``.py``.
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@ -27,7 +27,7 @@ either languages.
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A script could be run directly in text mode from the command line or through
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A script could be run directly in text mode from the command line or through
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the graphical interface (see :ref:`Python Scripts in Cgt`).
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the graphical interface (see :ref:`Python Scripts in Cgt`).
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Asides for this requirement, the python script can contain anything valid
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Aside for this requirement, the python script can contain anything valid
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in |Python|, so don't hesitate to use any package or extention.
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in |Python|, so don't hesitate to use any package or extention.
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Small example of Python/Stratus script: ::
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Small example of Python/Stratus script: ::
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@ -104,7 +104,7 @@ The top-level hierarchy must contains the instances of all the I/O pads and
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|bcenter| |ChipStructure-1| |ecenter|
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|bcenter| |ChipStructure-1| |ecenter|
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The designer must provide a configuration file that define the rules for the
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The designer must provide a configuration file that defines the rules for the
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placement of the top-level hierarchy (that is, the pads and the core).
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placement of the top-level hierarchy (that is, the pads and the core).
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This file must be named after the chip's name, by appending ``_chip.py``
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This file must be named after the chip's name, by appending ``_chip.py``
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(obviously, it is a |Python| file). For instance if the chip netlist file
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(obviously, it is a |Python| file). For instance if the chip netlist file
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@ -230,11 +230,11 @@ Configuration parameters, defaults are defined in ``etc/coriolis2/<STECHNO>/plug
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Clock Tree
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Clock Tree
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----------
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----------
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Insert a clock tree into a block. The clock tree uses the H strategy.
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Inserts a clock tree into a block. The clock tree uses the H strategy.
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The clock net is splitted into sub-nets, one for each branch of the
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The clock net is splitted into sub-nets, one for each branch of the
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tree.
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tree.
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* On **chips** design, the sub-nets are createds in the model of the
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* On **chip** design, the sub-nets are created in the model of the
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core block (then trans-hierarchically flattened to be shown at
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core block (then trans-hierarchically flattened to be shown at
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chip level).
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chip level).
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* On **blocks**, the sub nets are created directly in the top block.
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* On **blocks**, the sub nets are created directly in the top block.
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The clock tree plugin works in four steps:
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The clock tree plugin works in four steps:
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#. Build the clock tree: creates the top-block abutment box, compute the
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#. Builds the clock tree: creates the top-block abutment box, compute the
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levels of H tree neededs and place the clock buffers.
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required levels of H tree and places the clock buffers.
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#. Once the clock buffers are placed, calls the placer (|etesian|) to place
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#. Once the clock buffers are placed, calls the placer (|etesian|) to place
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the ordinary standart cells, whithout disturbing clock H-tree buffers.
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the ordinary standard cells, whithout disturbing clock H-tree buffers.
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#. At this point we know the exact positions of all the DFFs, so we can
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#. At this point we know the exact positions of all the DFFs, so we can
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connect them to the nearest H-tree leaf clock signal.
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connect them to the nearest H-tree leaf clock signal.
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#. Leaf clock signals that are not connecteds to any DFFs are removed.
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#. Leaf clock signals that are not connected to any DFFs are removed.
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Netlist reorganisation:
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Netlist reorganisation:
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* Obviously the top block or chip core model netlist is modificated to
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* Obviously the top block or chip core model netlist is modified to
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contains all the clock sub-nets. The interface is *not* changed.
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contain all the clock sub-nets. The interface is *not* changed.
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* If the top block contains instances of other models *and* those models
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* If the top block contains instances of other models *and* those models
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contains DFFs that get re-connecteds to the clock sub-nets (from the
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contain DFFs that get re-connected to the clock sub-nets (from the
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top level). Change both the model netlist and interface to propagate
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top level). Changes both the model netlist and interface to propagate
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the relevant clock sub-nets to the instanciated model. The new model
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the relevant clock sub-nets to the instanciated model. The new model
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with the added clock signal is renamed with a ``_clocked`` suffix.
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with the added clock signal is renamed with a ``_clocked`` suffix.
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For example, the sub-block model ``ram.vst`` will become ``ram_clocked.vst``.
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For example, the sub-block model ``ram.vst`` will become ``ram_clocked.vst``.
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.. note::
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.. note::
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If you are to re-run the clock tree plugin on a netlist, be careful
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If you are to re-run the clock tree plugin on a netlist, be careful
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to erase any previously generated ``_clocked`` file (both netlist and
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to erase any previously generated ``_clocked`` file (both netlist and
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layout: ``rm *.clocked.{ap,vst}``). And restart |cgt| to clear it's
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layout: ``rm *.clocked.{ap,vst}``). And restart |cgt| to clear its
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memory cache.
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memory cache.
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Configuration parameters, defaults are defined in ``etc/coriolis2/<STECHNO>/plugins.conf``.
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Configuration parameters, defaults are defined in ``etc/coriolis2/<STECHNO>/plugins.conf``.
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@ -303,8 +303,8 @@ Configuration parameters, defaults are defined in ``etc/coriolis2/<STECHNO>/plug
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Recursive-Save (RSave)
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Recursive-Save (RSave)
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----------------------
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----------------------
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Perform a recursive top down save of all the models from the top cell
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Performs a recursive top down save of all the models from the top cell
|
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loaded in |cgt|. Force a write of any non-terminal model. This plugin is used
|
loaded in |cgt|. Forces a write of any non-terminal model. This plugin is used
|
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by the clock tree plugin after the netlist clock sub-nets creation.
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by the clock tree plugin after the netlist clock sub-nets creation.
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|
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Loading…
Reference in New Issue