From 51028980c97b4011352cb15d624031c8d3470941 Mon Sep 17 00:00:00 2001 From: Jean-Paul Chaput Date: Sat, 5 Dec 2020 11:59:48 +0100 Subject: [PATCH] Modify the chain of "save()" calls in chip/block to pass on flags. * Change: In cumulus/plugins.block.configuration.BlockConf.save(), cumulus/plugins.block.Block.save(), cumulus/plugins.chip.Chip.save(), cumulus/plugins.core2chip.core2chip.CoreToChip.buildChip(), Add a "flags" parameter to control the way logical views (aka "vst") are saved. Mainly allowing to pass on the VstUseConcat option in order for Alliance tools to be able to read them back (lvx, asimut). * Change: In cumulus/plugins.core2chip.core2chip.CoreToChip.buildChip(), don't stop at the first I/O pad signal missing on the core, but display all the missing ones (LKCL proposal). --- cumulus/src/plugins/alpha/block/block.py | 4 ++-- cumulus/src/plugins/alpha/block/configuration.py | 4 ++-- cumulus/src/plugins/alpha/chip/chip.py | 8 ++++---- cumulus/src/plugins/alpha/core2chip/core2chip.py | 5 +++-- 4 files changed, 11 insertions(+), 10 deletions(-) diff --git a/cumulus/src/plugins/alpha/block/block.py b/cumulus/src/plugins/alpha/block/block.py index fcad4051..6ad41aa9 100644 --- a/cumulus/src/plugins/alpha/block/block.py +++ b/cumulus/src/plugins/alpha/block/block.py @@ -619,10 +619,10 @@ class Block ( object ): blockIns = BlockInstance( tailInstance, transf ) self.blockInstances.append( blockIns ) - def save ( self ): + def save ( self, flags=0 ): if not self.conf.validated: raise ErrorMessage( 1, 'block.save(): Chip is not valid, aborting.' ) - self.conf.save() + self.conf.save( flags ) # ---------------------------------------------------------------------------- diff --git a/cumulus/src/plugins/alpha/block/configuration.py b/cumulus/src/plugins/alpha/block/configuration.py index 2f1d7e1e..3d16b067 100644 --- a/cumulus/src/plugins/alpha/block/configuration.py +++ b/cumulus/src/plugins/alpha/block/configuration.py @@ -1182,7 +1182,7 @@ class BlockConf ( GaugeConf ): # if not masterCell.isTerminalNetlist(): # self.rsave( masterCell, depth+1 ) - def save ( self ): + def save ( self, flags ): """ Frontend to BlockConf.rsave(). Append the "_cts" suffix to the cloned cells, then call rsave(). @@ -1193,5 +1193,5 @@ class BlockConf ( GaugeConf ): cell.setName( cell.getName()+'_cts' ) if self.chip is None: self.cell.setName( self.cell.getName()+'_r' ) - rsave( self.cell ) + rsave( self.cell, CRL.Catalog.State.Physical|flags ) return diff --git a/cumulus/src/plugins/alpha/chip/chip.py b/cumulus/src/plugins/alpha/chip/chip.py index 0d1af207..fea67a35 100644 --- a/cumulus/src/plugins/alpha/chip/chip.py +++ b/cumulus/src/plugins/alpha/chip/chip.py @@ -145,12 +145,12 @@ class Chip ( Block ): self.conf.refresh( self.conf.chip ) return self.conf.validated - def save ( self ): + def save ( self, flags=0 ): if not self.conf.validated: raise ErrorMessage( 1, 'chip.save(): Chip is not valid, aborting.' ) - super(Chip,self).save() + super(Chip,self).save( flags ) self.conf.corona.setName( self.conf.corona.getName()+'_r' ) self.conf.chip .setName( self.conf.chip .getName()+'_r' ) af = CRL.AllianceFramework.get() - af.saveCell( self.conf.corona, CRL.Catalog.State.Views ) - af.saveCell( self.conf.chip , CRL.Catalog.State.Views ) + af.saveCell( self.conf.corona, CRL.Catalog.State.Views|flags ) + af.saveCell( self.conf.chip , CRL.Catalog.State.Views|flags ) diff --git a/cumulus/src/plugins/alpha/core2chip/core2chip.py b/cumulus/src/plugins/alpha/core2chip/core2chip.py index 45706a2b..5196923c 100644 --- a/cumulus/src/plugins/alpha/core2chip/core2chip.py +++ b/cumulus/src/plugins/alpha/core2chip/core2chip.py @@ -630,8 +630,9 @@ class CoreToChip ( object ): if netName is None: continue coreNet = self.core.getNet( netName ) if not coreNet: - raise ErrorMessage( 1, 'CoreToChip.buildChip(): Pad "{}" refer net "{}" which do not exist in core "{}".' \ - .format(ioPadConf.instanceName,netName,self.core.getName()) ) + print( ErrorMessage( 1, 'CoreToChip.buildChip(): Pad "{}" refer net "{}" which do not exist in core "{}".' \ + .format(ioPadConf.instanceName,netName,self.core.getName()) )) + continue ioNet = self.getIoNet( coreNet ) if ioPadConf.isBidir() or ioPadConf.isTristate(): if coreNet.getName() == ioPadConf.enableNetName: