Ensure that there is at least one free GCell on each side of the corona.

* Change: In Cumulus/plugins/chip/PadsCorona, if the external pins of
    the corona are in GCells that are also under the core block ring
    power lines, they are flagged as "go straight" and this produce
    impossible configurations for the router to solve. Now we ensure
    that there is one free GCell all around the corona border.
* Bug: In Cumulus/plugins/chip/Configuration.py & PadsCorona.py,
    at the begin/end of a side of pad, connectors can be outside the
    corona range (i.e. not directly face to face). Now make a dogleg
    if needed. This is a work in progress as if there are two of them,
    they will short on the perpandicular part. We must compute a
    shift.
This commit is contained in:
Jean-Paul Chaput 2019-08-12 01:11:58 +02:00
parent 1b2c90424a
commit 4b9a6ec4a9
3 changed files with 48 additions and 17 deletions

View File

@ -117,9 +117,31 @@ class PlaceRoute ( object ):
raise ErrorMessage( 1, 'chip.doCoronaFloorplan(): Chip is not valid, aborting.' ) raise ErrorMessage( 1, 'chip.doCoronaFloorplan(): Chip is not valid, aborting.' )
return return
railsNb = Cfg.getParamInt('chip.block.rails.count' ).asInt()
hRailWidth = Cfg.getParamInt('chip.block.rails.hWidth' ).asInt()
vRailWidth = Cfg.getParamInt('chip.block.rails.vWidth' ).asInt()
hRailSpace = Cfg.getParamInt('chip.block.rails.hSpacing').asInt()
vRailSpace = Cfg.getParamInt('chip.block.rails.vSpacing').asInt()
if not self.conf.useClockTree: self.railsNb -= 1
innerBb = Box( self.conf.coreSize )
innerBb.inflate( (railsNb * vRailWidth + (railsNb+1) * vRailSpace + self.conf.getSliceHeight()) * 2
, (railsNb * hRailWidth + (railsNb+1) * hRailSpace + self.conf.getSliceHeight()) * 2 )
coronaAb = self.conf.corona.getAbutmentBox()
if innerBb.getWidth() > coronaAb.getWidth():
raise ErrorMessage( 1, 'Core is too wide to fit into the corona, needs %s but only has %s.'
% ( DbU.getValueString(innerBb .getWidth())
, DbU.getValueString(coronaAb.getWidth()) ) )
if innerBb.getHeight() > coronaAb.getHeight():
raise ErrorMessage( 1, 'Core is too tall to fit into the corona, needs %s but only has %s.'
% ( DbU.getValueString(innerBb .getHeight())
, DbU.getValueString(coronaAb.getHeight()) ) )
UpdateSession.open() UpdateSession.open()
self.conf.core.setAbutmentBox( self.conf.coreSize ) self.conf.core.setAbutmentBox( self.conf.coreSize )
coronaAb = self.conf.corona.getAbutmentBox()
x = (coronaAb.getWidth () - self.conf.coreSize.getWidth ()) / 2 x = (coronaAb.getWidth () - self.conf.coreSize.getWidth ()) / 2
y = (coronaAb.getHeight() - self.conf.coreSize.getHeight()) / 2 y = (coronaAb.getHeight() - self.conf.coreSize.getHeight()) / 2
x = x - (x % self.conf.getSliceHeight()) x = x - (x % self.conf.getSliceHeight())

View File

@ -697,6 +697,15 @@ class ChipConf ( object ):
abMin = ab.getXMin() abMin = ab.getXMin()
abMax = ab.getXMax() abMax = ab.getXMax()
if uMin <= abMin:
shiftRight = abMin - uMin + lg.getPitch()
uMin += shiftRight
uMax += shiftRight
if uMax >= abMax:
shiftLeft = uMax - abMax + lg.getPitch()
uMin -= shiftLeft
uMax -= shiftLeft
iTrackMin = lg.getTrackIndex( abMin, abMax, uMin, RoutingLayerGauge.Superior ) iTrackMin = lg.getTrackIndex( abMin, abMax, uMin, RoutingLayerGauge.Superior )
iTrackMax = lg.getTrackIndex( abMin, abMax, uMax, RoutingLayerGauge.Inferior ) iTrackMax = lg.getTrackIndex( abMin, abMax, uMax, RoutingLayerGauge.Inferior )
if iTrackMax < iTrackMin: iTrackMax = iTrackMin if iTrackMax < iTrackMin: iTrackMax = iTrackMin

View File

@ -703,25 +703,25 @@ class CoreWire ( object ):
if self.arraySize: if self.arraySize:
if self.side == chip.West: xContact = min( xContact, vStrapBb.getXMin() ) if self.side == chip.West: xContact = min( xContact, vStrapBb.getXMin() )
else: xContact = max( xContact, vStrapBb.getXMax() ) else: xContact = max( xContact, vStrapBb.getXMax() )
self.conf.coronaHorizontal( self.chipNet self.conf.coronaHorizontal( self.chipNet
, self.symSegmentLayer , self.symSegmentLayer
, self.bbSegment.getCenter().getY() , self.bbSegment.getCenter().getY()
, self.bbSegment.getHeight() , self.bbSegment.getHeight()
, xContact , xContact
, xCore , xCore
) )
trace( 550, '\tCORONA PIN: %s %d\n' % (self.chipNet, self.count) ) trace( 550, '\tCORONA PIN: %s %d\n' % (self.chipNet, self.count) )
pin = self.conf.coronaPin( self.chipNet pin = self.conf.coronaPin( self.chipNet
, self.count , self.count
, accessDirection , accessDirection
, self.symSegmentLayer , self.symSegmentLayer
, xCore , xCore
, self.bbSegment.getCenter().getY() , self.bbSegment.getCenter().getY()
, DbU.fromLambda( 1.0 ) , DbU.fromLambda( 1.0 )
, self.bbSegment.getHeight() , self.bbSegment.getHeight()
) )
else: else:
flags = chip.OnVerticalPitch flags = chip.OnVerticalPitch
@ -790,7 +790,7 @@ class CoreWire ( object ):
if self.arraySize: if self.arraySize:
if self.side == chip.South: yContact = min( yContact, hStrapBb.getYMin() ) if self.side == chip.South: yContact = min( yContact, hStrapBb.getYMin() )
else: yContact = max( yContact, hStrapBb.getYMax() ) else: yContact = max( yContact, hStrapBb.getYMax() )
self.conf.coronaVertical( self.chipNet self.conf.coronaVertical( self.chipNet
, self.symSegmentLayer , self.symSegmentLayer