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Bad guessing of the output of zero_x0 & one_x0 in BlifParser. 

* Bug: In CRL::BlifParser::Model::staticInit(), when looking for the
    output of the Cell, discard power supplies *and* automatic Nets.
This commit is contained in:
Jean-Paul Chaput 2018-03-19 12:55:22 +01:00
parent 2a36a72e34
commit 3a6760f52a
1 changed files with 4 additions and 2 deletions
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6
crlcore/src/ccore/blif/BlifParser.cpp
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@ -350,13 +350,15 @@ namespace {
_powerName = Cfg::getParamString("crlcore.powerName" ,"vdd")->asString();
if (_zero) {
for ( Net* net : _zero->getNets() ) if (not net->isSupply()) { _masterNetZero = net; break; }
for ( Net* net : _zero->getNets() )
if (not net->isSupply() and not net->isAutomatic()) { _masterNetZero = net; break; }
} else
cerr << Warning( "BlifParser::Model::connectSubckts(): The zero (tie high) cell \"%s\" has not been found."
, zeroName.c_str() ) << endl;
if (_one) {
for ( Net* net : _one->getNets() ) if (not net->isSupply()) { _masterNetOne = net; break; }
for ( Net* net : _one->getNets() )
if (not net->isSupply() and not net->isAutomatic()) { _masterNetOne = net; break; }
} else
cerr << Warning( "BlifParser::Model::connectSubckts(): The one (tie low) cell \"%s\" has not been found."
, oneName.c_str() ) << endl;