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Fixed typo

This commit is contained in:
Gabriel Gouvine 2015-04-01 12:05:48 +02:00
parent 69b6f5acba
commit 3351574077
2 changed files with 2 additions and 5 deletions
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3
bootstrap/coriolis2.spec.in
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@ -21,7 +21,7 @@ print os.path.join ( pathes[-2], pathes[-1] )
Name: coriolis2
Summary: Coriolis 2 VLSI CAD Sytem
Summary: Coriolis 2 VLSI CAD System
Version: %{coriolisVersion}.%{svntag}
Release: 1%{dist}
License: BSD/LGPL/GPL/FLUTE
@ -163,6 +163,7 @@ Development files for the Coriolis 2 package.
%dir %{coriolisTop}/include/coriolis2
%dir %{coriolisTop}/include/coriolis2/crlcore
%dir %{coriolisTop}/include/coriolis2/nimbus
%dir %{coriolisTop}/include/coriolis2/etesian
%dir %{coriolisTop}/include/coriolis2/metis
%dir %{coriolisTop}/include/coriolis2/mauka
%dir %{coriolisTop}/include/coriolis2/knik

4
crlcore/src/ccore/blif/BlifDriver.cpp
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@ -8,11 +8,7 @@
// | |
// | Author : Jean-Paul CHAPUT |
// | E-mail : Jean-Paul.Chaput@asim.lip6.fr |
// | =============================================================== |
// | Yacc : "./VstParserGrammar.yy" |
// | |
// | This file is based on the Alliance VHDL parser written by |
// | L.A. Tabusse, Vuong H.N., P. Bazargan-Sabet & D. Hommais |
// +-----------------------------------------------------------------+