# DpgenShift

- Name : DpgenShift - Shifter Macro-Generator
- Synopsys :

      Generate ( 'DpgenShift', modelname
               , param = { 'nbit'     : n
                         , 'physical' : True
                         }
               )

- Description : Generates a `n` bits shifter named `modelname`.
- Terminal Names :
  - op : select the kind of shift (input, 2 bits)
  - shamt : the shift amount (input, `Y` bits)
  - i : value to shift (input, `n` bits)
  - o : output (`n` bits)
  - vdd : power
  - vss : ground
- Parameters : Parameters are given in the map `param`.
  - nbit (mandatory) : Defines the size of the generator
  - physical (optional, default value : False) : In order to generate a layout
- How it works :
  - If the `op[0]` signal is set to `one`, performs a right shift, performs a left shift otherwise.
  - If the `op[1]` signal is set to `one`, performs an arithmetic shift (only meaningful in case of a right shift).
  - shamt : specifies the shift amount. The width of this signal (`Y`) is computed from the operator's width : `Y = ceil(log2(n))` - 1
- Example :

      from stratus import *

      class inst_shifter ( Model ) :

        def Interface ( self ) :
          self.instop    = SignalIn  (    "instop", 2 )
          self.instshamt = SignalIn  ( "instshamt", 2 )
          self.insti     = SignalIn  (     "insti", 4 )
          self.insto     = SignalOut (     "insto", 4 )

          self.vdd = VddIn ( "vdd" )
          self.vss = VssIn ( "vss" )

        def Netlist ( self ) :
          Generate ( 'DpgenShifter', 'shifter_4'
                   , param = { 'nbit'     : 4
                             , 'physical' : True
                             }
                   )
          self.I = Inst ( 'shifter_4', 'inst'
                        , map = { 'op'    : self.instop
                                , 'shamt' : self.instshamt
                                , 'i'     : self.insti
                                , 'o'     : self.insto
                                , 'vdd'   : self.vdd
                                , 'vss'   : self.vss
                                }
                        )

        def Layout ( self ) :
          Place ( self.I, NOSYM, Ref(0, 0) )