.. -*- Mode: rst -*-

.. include:: ../../../etc/definitions.rst
.. include:: ./definitions.rst

.. |fulladder_1|            image:: ./images/fulladder-1.png
                            :alt:   The fulladder netlist
                            :align: middle
                            :width: 80%


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    \hfill \includegraphics[height=1.8cm]{../../../etc/images/Logo-SU}
    \hfill \includegraphics[height=2.0cm]{../../../etc/images/Logo-CNRS}
    \hfill
    \\*[2cm]

    \huge \textsc{Sorbonne Université} \\*[1cm]
  
    \huge {\textsc{lip6} Laboratory} \\*[3cm]

    \Huge \textbf{\textsc{Hurricane+Python Tutorial}} \\*[1cm]

    \huge {Jean-Paul \textsc{Chaput}} \\
    \Large\href{mailto:Jean-Paul.Chaput@lip6.fr}{Jean-Paul.Chaput@lip6.fr}\\*[4cm]

    \includegraphics[scale=1.0]{../../../etc/images/logoCC.pdf}

    \normalsize
    This work is licensed under a \\
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  \end{center}


  \newpage
  \pagestyle{fancy} 


|noindent|
**First, a small disclaimer.** This tutorial  assumes that you are already familiar
with the concepts  of |VLSI| designs, such as  *netlist*, *layout*, *instances*
and hierarchical design.

|pagestylefancy|


.. contents::

|newpage|

.. include:: Introduction.rst
.. include:: Environment.rst
.. include:: CellNetComponent.rst
.. include:: Collections.rst
.. include:: CgtScript.rst
.. include:: Netlist.rst
.. include:: RealDesigns.rst
.. include:: ToolEngines.rst
.. include:: AdvancedTopics.rst
