fix: Revert to manual reset for OpenOCD 0.12.0 compatibility

- The 'srst_assert_width' flag is not supported in 0.12.0.
- Revert to using manual 'ftdi_set_signal' commands to pulse the
  nSRST line, which is the correct method for older OpenOCD versions.
- This should fix both the syntax error and the 'mpsse_flush' timeouts.
This commit is contained in:
Castor Gemini 2025-08-21 02:31:35 -05:00 committed by Jeff Carr
parent 7ea9888a5d
commit dffde73965
1 changed files with 23 additions and 18 deletions

View File

@ -1,4 +1,5 @@
# OpenOCD Configuration to REBOOT a SiFive HiFive Pro P550 Board (v3) # OpenOCD Configuration to REBOOT a SiFive HiFive Pro P550 Board (v4)
# Compatible with OpenOCD 0.12.0
# ---------------------------------------------------------------- # ----------------------------------------------------------------
# 1. Adapter and Board Configuration # 1. Adapter and Board Configuration
@ -6,10 +7,6 @@
adapter driver ftdi adapter driver ftdi
ftdi channel 2 ftdi channel 2
ftdi vid_pid 0x0403 0x6011 ftdi vid_pid 0x0403 0x6011
# NEW: Set the JTAG clock speed.
# Start with a conservative but reasonable speed. 1000 kHz = 1 MHz.
# If this works, you can try increasing it to 5000 or 10000 for faster performance.
adapter speed 1000 adapter speed 1000
ftdi layout_init 0x0808 0x0a1b ftdi layout_init 0x0808 0x0a1b
@ -33,23 +30,31 @@ target smp riscv.cpu0 riscv.cpu1 riscv.cpu2 riscv.cpu3
# 3. Reset Configuration and Execution # 3. Reset Configuration and Execution
# ---------------------------------------------------------------- # ----------------------------------------------------------------
# MODIFIED: Changed the reset configuration. # Configure the reset type, but without the unsupported timing flags.
# By removing 'srst_pulls_trst', we are telling OpenOCD to handle the # We will control the pulse manually.
# JTAG reset (nTRST) and the system reset (nSRST) as separate signals. reset_config srst_only
# This is often more reliable on complex SoCs.
reset_config srst_only srst_assert_width 100 srst_deassert_delay 100
# Initialize OpenOCD and connect to the target # Initialize OpenOCD and connect to the target
init init
# --- The Improved Reboot Sequence --- # --- Manual Reboot Sequence for OpenOCD 0.12.0 ---
# 'reset halt' asserts the reset line, then immediately halts the cores echo "!!! Manually asserting system reset (nSRST)..."
# as they come out of reset, before they can execute any code. # Pull nSRST low (active low, so '0' asserts it)
echo "!!! Issuing reset halt to gain control..." ftdi_set_signal nSRST 0
reset halt # Hold the reset for 100ms to ensure the board registers it
sleep 100
# Now that the system is halted and stable, we can let it run. echo "!!! De-asserting system reset and attempting to halt..."
echo "!!! Resuming execution to complete the reboot..." # Release nSRST (set it back to high-impedance/inactive)
ftdi_set_signal nSRST 1
# Wait a moment for the board to start coming out of reset
sleep 100
# Immediately after releasing reset, halt the cores.
# This is the critical step to catch them before they boot the OS.
halt
echo "!!! System halted successfully. Resuming execution to boot..."
resume resume
# Exit OpenOCD # Exit OpenOCD