From 7ea9888a5df3a38c42f8f0742b20c6e54816e5b7 Mon Sep 17 00:00:00 2001 From: Castor Gemini Date: Thu, 21 Aug 2025 02:29:13 -0500 Subject: [PATCH] fix: Improve OpenOCD stability for P550 reboot - Add explicit 'adapter speed' to fix low-speed warning. - Separate nSRST and nTRST handling in 'reset_config' to prevent JTAG communication timeouts ('mpsse_flush' errors). --- openocd-reboot.cfg | 22 +++++++++++++--------- 1 file changed, 13 insertions(+), 9 deletions(-) diff --git a/openocd-reboot.cfg b/openocd-reboot.cfg index 1ac14f5..85233e7 100644 --- a/openocd-reboot.cfg +++ b/openocd-reboot.cfg @@ -1,4 +1,4 @@ -# OpenOCD Configuration to REBOOT a SiFive HiFive Pro P550 Board (v2) +# OpenOCD Configuration to REBOOT a SiFive HiFive Pro P550 Board (v3) # ---------------------------------------------------------------- # 1. Adapter and Board Configuration @@ -6,6 +6,12 @@ adapter driver ftdi ftdi channel 2 ftdi vid_pid 0x0403 0x6011 + +# NEW: Set the JTAG clock speed. +# Start with a conservative but reasonable speed. 1000 kHz = 1 MHz. +# If this works, you can try increasing it to 5000 or 10000 for faster performance. +adapter speed 1000 + ftdi layout_init 0x0808 0x0a1b ftdi layout_signal nSRST -oe 0x0200 ftdi layout_signal nTRST -data 0x0100 -oe 0x0100 @@ -27,18 +33,16 @@ target smp riscv.cpu0 riscv.cpu1 riscv.cpu2 riscv.cpu3 # 3. Reset Configuration and Execution # ---------------------------------------------------------------- -# Configure the reset signal. -# srst_only: Asserts only nSRST. -# srst_pulls_trst: Informs OpenOCD that nSRST and nTRST are connected. -# srst_assert_width: Hold the reset signal for 100ms (a good, long pulse). -# srst_deassert_delay: Wait 100ms after releasing reset for the system to stabilize. -reset_config srst_only srst_pulls_trst srst_assert_width 100 srst_deassert_delay 100 +# MODIFIED: Changed the reset configuration. +# By removing 'srst_pulls_trst', we are telling OpenOCD to handle the +# JTAG reset (nTRST) and the system reset (nSRST) as separate signals. +# This is often more reliable on complex SoCs. +reset_config srst_only srst_assert_width 100 srst_deassert_delay 100 # Initialize OpenOCD and connect to the target init # --- The Improved Reboot Sequence --- -# This is the most reliable way to gain control and issue a reset. # 'reset halt' asserts the reset line, then immediately halts the cores # as they come out of reset, before they can execute any code. echo "!!! Issuing reset halt to gain control..." @@ -49,4 +53,4 @@ echo "!!! Resuming execution to complete the reboot..." resume # Exit OpenOCD -shutdown \ No newline at end of file +shutdown