24 lines
659 B
INI
24 lines
659 B
INI
# SPDX-License-Identifier: GPL-2.0-or-later
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# Copyright (C) 2014-2016,2020 Synopsys, Inc.
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# Anton Kolesov <anton.kolesov@synopsys.com>
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# Didin Evgeniy <didin@synopsys.com>
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#
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# Synopsys DesignWare ARC EM Starter Kit v2.1
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#
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# Configure JTAG cable
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# EM Starter Kit has built-in FT2232 chip, which is similar to Digilent HS-1.
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source [find interface/ftdi/digilent-hs1.cfg]
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# JTAG 10MHz is too fast for EM7D FPU in EM SK 2.1 which has core frequency
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# 20MHz. 7.5 MHz seems to work fine.
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adapter speed 7500
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# ARCs support only JTAG.
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transport select jtag
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# Configure FPGA. This script supports both LX45 and LX150.
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source [find target/snps_em_sk_fpga.cfg]
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