32 lines
985 B
C
32 lines
985 B
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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#ifndef OPENOCD_TARGET_RISCV_RISCV_REG_013_H
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#define OPENOCD_TARGET_RISCV_RISCV_REG_013_H
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#include "target/target.h"
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#include "gdb_regs.h"
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#include "riscv.h"
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/**
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* This file describes additional register cache interface available to the
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* RISC-V Debug Specification v0.13+ targets.
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*/
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/**
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* Init initialize register cache. After this function all registers can be
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* safely accessed via functions described here and in `riscv_reg.h`.
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*/
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int riscv013_reg_init_all(struct target *target);
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/**
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* This function is used to save the value of a register in cache. The register
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* is marked as dirty, and writeback is delayed for as long as possible.
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* Generally used to save registers before program buffer execution.
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*
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* TODO: The interface should be restricted in such a way that only GPRs can be
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* saved.
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*/
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int riscv013_reg_save(struct target *target, enum gdb_regno regid);
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#endif /*OPENOCD_TARGET_RISCV_RISCV_REG_013_H*/
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