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Tim Newsome 35f284fe7c flash/nor/fespi: algorithm, large address, errors 
* Move more smarts into the target algorithm code, and rewrite that in C
  so it's easier to understand/maintain.
* Support >24-bit addresses.
* Check for errors.

Change-Id: I3b1a143589fe6defafb8f95820aa682acc9646e7
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6679
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
 		2021-12-03 21:58:55 +00:00
..
checksum Implement CRC32 algorithm for RISC-V. 2021-03-19 21:58:17 +00:00
debug/xscale coding style: contrib: remove empty lines at end of text files 2020-05-02 15:40:26 +01:00
erase_check STM8 Target relicensing to GPLv2 and later 2019-11-07 08:21:40 +00:00
flash flash/nor/fespi: algorithm, large address, errors 2021-12-03 21:58:55 +00:00
watchdog coding style: contrib: remove empty lines at end of text files 2020-05-02 15:40:26 +01:00
Makefile max32xxx: Support for MAX32XXX devices. 2018-08-21 19:24:58 +01:00
README cortex_m: target implementation renames cortex_m3 to cortex_m 2013-10-10 20:51:03 +00:00

README 

Included in these directories are the src to the various ram loaders used
within openocd.

** target checksum loaders **

checksum/armv4_5_crc.s :
 - ARMv4 and ARMv5 checksum loader : see target/arm_crc_code.c:arm_crc_code

checksum/armv7m_crc.s :
 - ARMv7m checksum loader : see target/armv7m.c:cortex_m_crc_code

checksum/mips32.s :
 - MIPS32 checksum loader : see target/mips32.c:mips_crc_code

** target flash loaders **

flash/pic32mx.s :
 - Microchip PIC32 flash loader : see flash/nor/pic32mx.c:pic32mx_flash_write_code

flash/stellaris.s :
 - TI Stellaris flash loader : see flash/nor/stellaris.c:stellaris_write_code

flash/stm32x.s :
 - ST STM32 flash loader : see flash/nor/stm32x.c:stm32x_flash_write_code

flash/str7x.s :
 - ST STR7 flash loader : see flash/nor/str7x.c:str7x_flash_write_code

flash/str9x.s :
 - ST STR9 flash loader : see flash/nor/str9x.c:str9x_flash_write_code

Spencer Oliver
spen@spen-soft.co.uk