Marek Vasut d5b9c7998c CortexA8: Introduce Freescale i.MX51 variant ... This patch introduces support for Cortex A8 based Freescale i.MX51 CPU. This CPU has the Debug Access Port located at a different address (0x60008000) than TI OMAP3 series of CPUs. i.MX51 configuration file based on OMAP3 configuration file and an email from Alan Carvalho de Assis <acassis@gmail.com>. Signed-off-by: Marek Vasut <marek.vasut@gmail.com>		2010-11-05 11:25:57 +01:00
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board	imx31pdk: use rclk w/1MHz fallback	2010-10-28 08:43:04 +02:00
chip	tcl: remove silly ocd_ prefix to array2mem and mem2array	2010-08-11 17:24:55 +02:00
cpld	Xilinx xcr3256.cfg basic config script	2009-10-12 15:12:35 +02:00
cpu/arm	Move TCL script files -- Step 2 of 2:	2009-05-27 06:49:24 +00:00
interface	Added support for Lisa/L builtin JTAG interface.	2010-08-13 09:52:27 +02:00
target	CortexA8: Introduce Freescale i.MX51 variant	2010-11-05 11:25:57 +01:00
test	rename jtag_nsrst_delay as adapter_nsrst_delay	2010-03-15 08:41:30 -07:00
bitsbytes.tcl	Remove annoying end-of-line whitespace from tcl/* files	2009-09-21 18:48:22 +00:00
mem_helper.tcl	TCL scripts: fix ocd_mem2array/mem2array	2010-09-28 10:44:50 +02:00
memory.tcl	tcl: remove silly ocd_ prefix to array2mem and mem2array	2010-08-11 17:24:55 +02:00
mmr_helpers.tcl	Remove annoying end-of-line whitespace from tcl/* files	2009-09-21 18:48:22 +00:00