350 lines
9.6 KiB
C
350 lines
9.6 KiB
C
#include <stdbool.h>
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#include <stdint.h>
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#include <stdio.h>
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#include "../../../../src/flash/nor/spi.h"
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/* Register offsets */
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#define NUSPI_REG_SCKDIV (0x00)
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#define NUSPI_REG_SCKMODE (0x04)
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#define NUSPI_REG_SCKSAMPLE (0x08)
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#define NUSPI_REG_FORCE (0x0C)
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#define NUSPI_REG_CSID (0x10)
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#define NUSPI_REG_CSDEF (0x14)
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#define NUSPI_REG_CSMODE (0x18)
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#define NUSPI_REG_VERSION (0x1C)
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#define NUSPI_REG_DCSSCK (0x28)
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#define NUSPI_REG_DSCKCS (0x2a)
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#define NUSPI_REG_DINTERCS (0x2c)
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#define NUSPI_REG_DINTERXFR (0x2e)
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#define NUSPI_REG_FMT (0x40)
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#define NUSPI_REG_TXDATA (0x48)
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#define NUSPI_REG_RXDATA (0x4C)
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#define NUSPI_REG_TXMARK (0x50)
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#define NUSPI_REG_RXMARK (0x54)
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#define NUSPI_REG_FCTRL (0x60)
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#define NUSPI_REG_FFMT (0x64)
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#define NUSPI_REG_IE (0x70)
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#define NUSPI_REG_IP (0x74)
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#define NUSPI_REG_FFMT1 (0x78)
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#define NUSPI_REG_STATUS (0x7C)
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#define NUSPI_REG_RXEDGE (0x80)
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#define NUSPI_REG_CR (0x84)
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/* Fields */
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#define NUSPI_SCK_POL (0x1)
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#define NUSPI_SCK_PHA (0x2)
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#define NUSPI_FMT_PROTO(x) ((x) & 0x3)
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#define NUSPI_FMT_ENDIAN(x) (((x) & 0x1) << 2)
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#define NUSPI_FMT_DIR(x) (((x) & 0x1) << 3)
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#define NUSPI_FMT_LEN(x) (((x) & 0xf) << 16)//TODO:
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/* TXMARK register */
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#define NUSPI_TXWM(x) ((x) & 0xFFFF)//TODO:
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/* RXMARK register */
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#define NUSPI_RXWM(x) ((x) & 0xFFFF)//TODO:
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#define NUSPI_IP_TXWM (0x1)
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#define NUSPI_IP_RXWM (0x2)
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#define NUSPI_FCTRL_EN (0x1)
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#define NUSPI_INSN_CMD_EN (0x1)
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#define NUSPI_INSN_ADDR_LEN(x) (((x) & 0x7) << 1)
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#define NUSPI_INSN_PAD_CNT(x) (((x) & 0xf) << 4)
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#define NUSPI_INSN_CMD_PROTO(x) (((x) & 0x3) << 8)
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#define NUSPI_INSN_ADDR_PROTO(x) (((x) & 0x3) << 10)
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#define NUSPI_INSN_DATA_PROTO(x) (((x) & 0x3) << 12)
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#define NUSPI_INSN_CMD_CODE(x) (((x) & 0xff) << 16)
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#define NUSPI_INSN_PAD_CODE(x) (((x) & 0xff) << 24)
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#define NUSPI_STAT_BUSY (0x1 << 0)
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#define NUSPI_STAT_TXFULL (0x1 << 4)
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#define NUSPI_STAT_RXEMPTY (0x1 << 5)
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/* Values */
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#define SPIFLASH_3BYTE_FAST_READ (0x03)
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#define SPIFLASH_4BYTE_FAST_READ (0x13)
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#define SPIFLASH_ENTER_4BYTE (0xB7)
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#define SPIFLASH_EXIT_4BYTE (0xE9)
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#define SPIFLASH_ENABLE_RESET (0x66)
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#define SPIFLASH_RESET_DEVICE (0x99)
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#define NUSPI_CSMODE_AUTO (0)
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#define NUSPI_CSMODE_HOLD (2)
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#define NUSPI_CSMODE_OFF (3)
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#define NUSPI_DIR_RX (0)
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#define NUSPI_DIR_TX (1)
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#define NUSPI_PROTO_S (0)
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#define NUSPI_PROTO_D (1)
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#define NUSPI_PROTO_Q (2)
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#define NUSPI_ENDIAN_MSB (0)
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#define NUSPI_ENDIAN_LSB (1)
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/* Timeouts we use, in number of status checks. */
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#define TIMEOUT (2000)
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#define NUSPI_FLAGS_32B_DAT (1 << 0)
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/* #define DEBUG to make the return error codes provide enough information to
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* reconstruct the stack from where the error occurred. This is not enabled
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* usually to reduce the program size. */
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#define ERROR_STACK(x) (x)
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#define ERROR_NUSPI_TXWM_WAIT (0x10)
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#define ERROR_NUSPI_TX (0x100)
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#define ERROR_NUSPI_RX (0x1000)
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#define ERROR_NUSPI_WIP (0x50000)
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#define ERROR_OK (0)
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typedef struct
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{
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uint32_t info;
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uint32_t flags;
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} nuspi_info_t;
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static uint32_t nuspi_read_reg(volatile uint32_t *ctrl_base, uint32_t address);
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static int nuspi_txwm_wait(volatile uint32_t *ctrl_base, nuspi_info_t* nuspi_info);
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static int nuspi_wip(volatile uint32_t *ctrl_base, nuspi_info_t* nuspi_info);
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static int nuspi_write_buffer(volatile uint32_t *ctrl_base,
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const uint8_t *buffer, uint32_t offset, uint32_t len,
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nuspi_info_t* nuspi_info);
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/* Can set bits 3:0 in result. */
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/* flash_info contains:
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* bits 7:0 -- pprog_cmd
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* bit 8 -- 0 means send 3 bytes after pprog_cmd, 1 means send 4 bytes
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* after pprog_cmd
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*/
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int flash_nuspi(volatile uint32_t *ctrl_base, uint32_t page_size,
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const uint8_t *buffer, uint32_t offset, uint32_t count,
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uint32_t flash_info)
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{
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int result;
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nuspi_info_t nuspi_info = {0};
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nuspi_info.info = flash_info;
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if(nuspi_read_reg(ctrl_base, NUSPI_REG_VERSION) >= 0x00010100)
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nuspi_info.flags |= NUSPI_FLAGS_32B_DAT;
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result = nuspi_txwm_wait(ctrl_base, &nuspi_info);
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if (result != ERROR_OK)
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return result | ERROR_STACK(0x1);
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/* poll WIP */
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result = nuspi_wip(ctrl_base, &nuspi_info);
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if (result != ERROR_OK) {
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result |= ERROR_STACK(0x2);
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goto err;
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}
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/* Assume page_size is a power of two so we don't need the modulus code. */
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uint32_t page_offset = offset & (page_size - 1);
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/* central part, aligned words */
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while (count > 0) {
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uint32_t cur_count;
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/* clip block at page boundary */
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if (page_offset + count > page_size)
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cur_count = page_size - page_offset;
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else
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cur_count = count;
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result = nuspi_write_buffer(ctrl_base, buffer, offset, cur_count, &nuspi_info);
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if (result != ERROR_OK) {
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result |= ERROR_STACK(0x3);
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goto err;
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}
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page_offset = 0;
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buffer += cur_count;
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offset += cur_count;
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count -= cur_count;
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}
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err:
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return result;
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}
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static uint32_t nuspi_read_reg(volatile uint32_t *ctrl_base, uint32_t address)
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{
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return ctrl_base[address / 4];
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}
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static void nuspi_write_reg(volatile uint32_t *ctrl_base, uint32_t address, uint32_t value)
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{
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ctrl_base[address / 4] = value;
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}
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/* Can set bits 7:4 in result. */
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static int nuspi_txwm_wait(volatile uint32_t *ctrl_base, nuspi_info_t* nuspi_info)
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{
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unsigned timeout = TIMEOUT;
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if (nuspi_info->flags & NUSPI_FLAGS_32B_DAT) {
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while (timeout--) {
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uint32_t status = nuspi_read_reg(ctrl_base, NUSPI_REG_STATUS);
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if (0 == (status & NUSPI_STAT_BUSY))
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return ERROR_OK;
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}
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} else {
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while (timeout--) {
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uint32_t ip = nuspi_read_reg(ctrl_base, NUSPI_REG_IP);
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if (ip & NUSPI_IP_TXWM)
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return ERROR_OK;
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}
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}
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return ERROR_NUSPI_TXWM_WAIT;
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}
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static void nuspi_set_dir(volatile uint32_t *ctrl_base, bool dir)
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{
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uint32_t fmt = nuspi_read_reg(ctrl_base, NUSPI_REG_FMT);
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nuspi_write_reg(ctrl_base, NUSPI_REG_FMT,
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(fmt & ~(NUSPI_FMT_DIR(0xFFFFFFFF))) | NUSPI_FMT_DIR(dir));
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}
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/* Can set bits 11:8 in result. */
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static int nuspi_tx(volatile uint32_t *ctrl_base, uint8_t in, uint32_t flags)
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{
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unsigned timeout = TIMEOUT;
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if (flags & NUSPI_FLAGS_32B_DAT) {
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while (timeout--) {
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if (!(nuspi_read_reg(ctrl_base, NUSPI_REG_STATUS) & NUSPI_STAT_TXFULL)) {
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nuspi_write_reg(ctrl_base, NUSPI_REG_TXDATA, in);
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return ERROR_OK;
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}
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}
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} else {
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while (timeout--) {
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uint32_t txfifo = nuspi_read_reg(ctrl_base, NUSPI_REG_TXDATA);
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if (!(txfifo >> 31)) {
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nuspi_write_reg(ctrl_base, NUSPI_REG_TXDATA, in);
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return ERROR_OK;
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}
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}
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}
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return ERROR_NUSPI_TX;
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}
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/* Can set bits 15:12 in result. */
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static int nuspi_rx(volatile uint32_t *ctrl_base, uint8_t *out, uint32_t flags)
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{
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unsigned timeout = TIMEOUT;
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if (flags & NUSPI_FLAGS_32B_DAT) {
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while (timeout--) {
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if (!(nuspi_read_reg(ctrl_base, NUSPI_REG_STATUS) & NUSPI_STAT_RXEMPTY)) {
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uint32_t value = nuspi_read_reg(ctrl_base, NUSPI_REG_RXDATA);
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if (out)
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*out = value & 0xff;
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return ERROR_OK;
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}
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}
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} else {
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while (timeout--) {
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uint32_t value = nuspi_read_reg(ctrl_base, NUSPI_REG_RXDATA);
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if (!(value >> 31)) {
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if (out)
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*out = value & 0xff;
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return ERROR_OK;
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}
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}
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}
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return ERROR_NUSPI_RX;
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}
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/* Can set bits 19:16 in result. */
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static int nuspi_wip(volatile uint32_t *ctrl_base, nuspi_info_t* nuspi_info)
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{
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nuspi_set_dir(ctrl_base, NUSPI_DIR_RX);
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nuspi_write_reg(ctrl_base, NUSPI_REG_CSMODE, NUSPI_CSMODE_HOLD);
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int result = nuspi_tx(ctrl_base, SPIFLASH_READ_STATUS, nuspi_info->flags);
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if (result != ERROR_OK)
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return result | ERROR_STACK(0x10000);
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result = nuspi_rx(ctrl_base, NULL, nuspi_info->flags);
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if (result != ERROR_OK)
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return result | ERROR_STACK(0x20000);
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unsigned timeout = TIMEOUT;
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while (timeout--) {
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result = nuspi_tx(ctrl_base, 0, nuspi_info->flags);
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if (result != ERROR_OK)
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return result | ERROR_STACK(0x30000);
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uint8_t rx;
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result = nuspi_rx(ctrl_base, &rx, nuspi_info->flags);
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if (result != ERROR_OK)
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return result | ERROR_STACK(0x40000);
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if ((rx & SPIFLASH_BSY_BIT) == 0) {
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nuspi_write_reg(ctrl_base, NUSPI_REG_CSMODE, NUSPI_CSMODE_AUTO);
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nuspi_set_dir(ctrl_base, NUSPI_DIR_TX);
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return ERROR_OK;
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}
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}
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return ERROR_NUSPI_WIP;
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}
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/* Can set bits 23:20 in result. */
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static int nuspi_write_buffer(volatile uint32_t *ctrl_base,
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const uint8_t *buffer, uint32_t offset, uint32_t len,
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nuspi_info_t* nuspi_info)
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{
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int result = nuspi_tx(ctrl_base, SPIFLASH_WRITE_ENABLE, nuspi_info->flags);
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if (result != ERROR_OK)
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return result | ERROR_STACK(0x100000);
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result = nuspi_txwm_wait(ctrl_base, nuspi_info);
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if (result != ERROR_OK)
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return result | ERROR_STACK(0x200000);
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nuspi_write_reg(ctrl_base, NUSPI_REG_CSMODE, NUSPI_CSMODE_HOLD);
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result = nuspi_tx(ctrl_base, nuspi_info->info & 0xff, nuspi_info->flags);
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if (result != ERROR_OK)
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return result | ERROR_STACK(0x300000);
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if (nuspi_info->info & 0x100) {
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result = nuspi_tx(ctrl_base, offset >> 24, nuspi_info->flags);
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if (result != ERROR_OK)
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return result | ERROR_STACK(0x400000);
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}
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result = nuspi_tx(ctrl_base, offset >> 16, nuspi_info->flags);
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if (result != ERROR_OK)
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return result | ERROR_STACK(0x400000);
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result = nuspi_tx(ctrl_base, offset >> 8, nuspi_info->flags);
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if (result != ERROR_OK)
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return result | ERROR_STACK(0x500000);
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result = nuspi_tx(ctrl_base, offset, nuspi_info->flags);
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if (result != ERROR_OK)
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return result | ERROR_STACK(0x600000);
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for (unsigned i = 0; i < len; i++) {
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result = nuspi_tx(ctrl_base, buffer[i], nuspi_info->flags);
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if (result != ERROR_OK)
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return result | ERROR_STACK(0x700000);
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}
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result = nuspi_txwm_wait(ctrl_base, nuspi_info);
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if (result != ERROR_OK)
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return result | ERROR_STACK(0x800000);
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nuspi_write_reg(ctrl_base, NUSPI_REG_CSMODE, NUSPI_CSMODE_AUTO);
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result = nuspi_wip(ctrl_base, nuspi_info);
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if (result != ERROR_OK)
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return result | ERROR_STACK(0x900000);
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return ERROR_OK;
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}
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