47 lines
1.2 KiB
ArmAsm
47 lines
1.2 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/***************************************************************************
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* Copyright (C) 2010 by Spencer Oliver *
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* spen@spen-soft.co.uk *
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***************************************************************************/
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.text
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.arm
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.arch armv4t
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.section .init
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/*
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r0 source address
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r1 address
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r2 FLASH_CR0
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r3 dword count
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r4 result
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r5 busy mask
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*/
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write:
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mov r4, #0x10000000 /* set DWPG bit */
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str r4, [r2, #0x0] /* FLASH_CR0 */
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str r1, [r2, #0x10] /* FLASH_AR */
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ldr r4, [r0], #4 /* load data */
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str r4, [r2, #0x8] /* FLASH_DR0 */
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ldr r4, [r0], #4 /* load data */
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str r4, [r2, #0xc] /* FLASH_DR1 */
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mov r4, #0x90000000 /* set DWPG and WMS bits */
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str r4, [r2, #0x0] /* FLASH_CR0 */
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busy:
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ldr r4, [r2, #0x0] /* FLASH_CR0 */
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tst r4, r5
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bne busy
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ldr r4, [r2, #0x14] /* FLASH_ER */
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tst r4, #0xff /* do we have errors */
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tsteq r4, #0x100 /* write protection set */
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bne exit
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add r1, r1, #0x8 /* next 8 bytes */
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subs r3, r3, #1 /* decrement dword count */
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bne write
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exit:
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b exit
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.end
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