riscv-openocd/doc
Erhan Kurubas 2053120ba1 target: add Espressif ESP32-S3 basic support
ESP32-S3 is a dual core Xtensa SoC
Not full featured yet. Some of the missing functionality:
-Semihosting
-Flash breakpoints
-Flash loader
-Apptrace
-FreeRTOS

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I44e17088030c96a9be9809f6579a4f16dbfc5794
Reviewed-on: https://review.openocd.org/c/openocd/+/6990
Tested-by: jenkins
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-06-24 21:46:42 +00:00
..
manual doc: use the new jimtcl syntax for 'expr' 2022-01-22 10:13:36 +00:00
.gitattributes doc: fix texinfo files attributes on Windows 2020-03-24 17:20:19 +00:00
Makefile.am Convert to non-recursive make 2016-12-08 16:23:10 +00:00
fdl.texi LICENSES: add the GFDL-1.2 license 2021-04-11 20:52:14 +01:00
openocd.1 docs: update incorrect urls 2013-03-28 23:24:40 +00:00
openocd.texi target: add Espressif ESP32-S3 basic support 2022-06-24 21:46:42 +00:00