interesting
/
riscv-openocd
mirror of https://github.com/riscv/riscv-openocd.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
riscv-openocd/contrib/loaders/reset/espressif/esp32
History
Erhan Kurubas 77287b8d47 target: add Espressif ESP32 basic support 
ESP32 is a dual core Xtensa SoC
Not full featured yet. Some of the missing functionality:
-Semihosting
-Flash breakpoints
-Flash loader
-Apptrace
-FreeRTOS

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I76fb184aa38ab9f4e30290c038b5ff8850060750
Reviewed-on: https://review.openocd.org/c/openocd/+/6989
Tested-by: jenkins
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
 		2022-06-24 21:46:07 +00:00
..
Makefile target: add Espressif ESP32 basic support 2022-06-24 21:46:07 +00:00
cpu_reset_handler_code.inc target: add Espressif ESP32 basic support 2022-06-24 21:46:07 +00:00
esp32_cpu_reset_handler.S target: add Espressif ESP32 basic support 2022-06-24 21:46:07 +00:00