riscv-openocd/tcl
Laurent LEMELE 4a96776178 jtag/stlink: add STLINK-V3PWR support
STLINK-V3PWR is both a standalone debugger probe compatible with
STLINK-V3 and a source measurement unit (SMU).
Link: http://www.st.com/stlink-v3pwr

This code adds support for the debugger probe functionality.

Change-Id: Ib056e55722528f922c5574bb6fbf77e2f2b2b0c1
Signed-off-by: Laurent LEMELE <laurent.lemele@st.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7755
Tested-by: jenkins
2023-07-08 18:06:33 +00:00
..
board tcl/board/bemicro: source cycloneiii.cfg from correct path 2023-07-08 18:00:11 +00:00
chip tcl: add SPDX tag 2022-06-24 21:54:12 +00:00
cpld pld/virtex2: add program/refresh command 2023-07-08 18:03:18 +00:00
cpu tcl: add SPDX tag 2022-06-24 21:54:12 +00:00
fpga ipdbg/pld: ipdbg can get tap and hub/ir from pld driver. 2023-07-08 18:04:24 +00:00
interface jtag/stlink: add STLINK-V3PWR support 2023-07-08 18:06:33 +00:00
target pld/virtex2: add program/refresh command 2023-07-08 18:03:18 +00:00
test tcl: add SPDX tag 2022-06-24 21:54:12 +00:00
tools tcl/tools/test_cpu_speed: Fix register name 2023-03-18 21:59:47 +00:00
bitsbytes.tcl tcl: add SPDX tag 2022-06-24 21:54:12 +00:00
mem_helper.tcl tcl: add SPDX tag 2022-06-24 21:54:12 +00:00
memory.tcl tcl: add SPDX tag 2022-06-24 21:54:12 +00:00
mmr_helpers.tcl tcl: add SPDX tag 2022-06-24 21:54:12 +00:00