89 lines
2.4 KiB
C
89 lines
2.4 KiB
C
/* src/flash/s3c2443_nand.c
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*
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* S3C2443 OpenOCD NAND Flash controller support.
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*
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* Copyright 2007,2008 Ben Dooks <ben@fluff.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* Many thanks to Simtec Electronics for sponsoring this work.
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include "replacements.h"
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#include "log.h"
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#include <stdlib.h>
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#include <string.h>
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#include "nand.h"
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#include "s3c24xx_nand.h"
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#include "target.h"
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int s3c2443_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device);
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int s3c2443_init(struct nand_device_s *device);
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int s3c2443_nand_ready(struct nand_device_s *device, int timeout);
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nand_flash_controller_t s3c2443_nand_controller =
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{
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.name = "s3c2443",
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.nand_device_command = s3c2443_nand_device_command,
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.register_commands = s3c24xx_register_commands,
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.init = s3c2443_init,
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.reset = s3c24xx_reset,
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.command = s3c24xx_command,
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.address = s3c24xx_address,
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.write_data = s3c24xx_write_data,
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.read_data = s3c24xx_read_data,
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.write_page = s3c24xx_write_page,
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.read_page = s3c24xx_read_page,
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.write_block_data = s3c2440_write_block_data,
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.read_block_data = s3c2440_read_block_data,
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.controller_ready = s3c24xx_controller_ready,
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.nand_ready = s3c2440_nand_ready,
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};
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int s3c2443_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
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char **args, int argc,
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struct nand_device_s *device)
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{
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s3c24xx_nand_controller_t *info;
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info = s3c24xx_nand_device_command(cmd_ctx, cmd, args, argc, device);
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if (info == NULL) {
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return ERROR_NAND_DEVICE_INVALID;
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}
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/* fill in the address fields for the core device */
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info->cmd = S3C2440_NFCMD;
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info->addr = S3C2440_NFADDR;
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info->data = S3C2440_NFDATA;
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info->nfstat = S3C2412_NFSTAT;
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return ERROR_OK;
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}
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int s3c2443_init(struct nand_device_s *device)
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{
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s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
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target_t *target = s3c24xx_info->target;
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target_write_u32(target, S3C2410_NFCONF,
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S3C2440_NFCONF_TACLS(3) |
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S3C2440_NFCONF_TWRPH0(7) |
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S3C2440_NFCONF_TWRPH1(7));
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target_write_u32(target, S3C2440_NFCONT,
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S3C2412_NFCONT_INIT_MAIN_ECC |
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S3C2440_NFCONT_ENABLE);
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return ERROR_OK;
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}
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