riscv-openocd/tcl/target/ti_tms570.cfg

55 lines
1.4 KiB
INI

adapter_khz 1500
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME tms570
}
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
set _ENDIAN big
}
# TMS570 has an ICEpick-C on which we need the router commands.
source [find target/icepick.cfg]
# Main DAP
# DAP_TAPID should be set before source-ing this file
if { [info exists DAP_TAPID] } {
set _DAP_TAPID $DAP_TAPID
}
jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
jtag configure $_CHIPNAME.dap -event tap-enable "icepick_c_tapenable $_CHIPNAME.jrc 0"
# ICEpick-C (JTAG route controller)
# JRC_TAPID should be set before source-ing this file
if { [info exists JRC_TAPID] } {
set _JRC_TAPID $JRC_TAPID
}
jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f \
-expected-id $_JRC_TAPID -ignore-version
jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.dap"
jtag configure $_CHIPNAME.jrc -event post-reset "runtest 100"
# Cortex R4 target
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_r4 -endian $_ENDIAN \
-chain-position $_CHIPNAME.dap -coreid 0 -dbgbase 0x00001003
# TMS570 uses quirky BE-32 mode
$_TARGETNAME dap ti_be_32_quirks 1
$_TARGETNAME configure -event gdb-attach {
cortex_r4 dbginit
halt
}
$_TARGETNAME configure -event "reset-assert" {
global _CHIPNAME
# assert warm system reset through ICEPick
icepick_c_wreset $_CHIPNAME.jrc
}