Karl Palsson c3ec1940b5 stm32l: split l0/l1 support no jtag, different HSI settings ... L0 is cortex m0+, so different id codes, SWD only, different addresses for the clock speedup. It has no endian options, no boundary scan. Removed all L0 specific portions from L1 files, and renamed files to clarify their purpose. The deprecated stm32lx_stlink.cfg is kept as is, as it is only around for backwards compatibility with prior releases. Tested on STM32L053 Discovery and STM32L151 Discovery. Has _not_ been tested with jtag on L1. Change-Id: I8eea890d2f92a302d9e9c8a8832d218ee1b6bcfc Signed-off-by: Karl Palsson <karlp@tweak.net.au> Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2405 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-by: Juha Niskanen <juha.niskanen@haltian.com>		2014-12-03 09:10:21 +00:00
..
board	stm32l: split l0/l1 support no jtag, different HSI settings	2014-12-03 09:10:21 +00:00
chip	Fix a typo.	2013-07-07 13:00:59 +00:00
cpld	Add config file for Lattice LC4032ZE CPLD (ispMACH 4000ZE family)	2012-07-17 08:29:32 +00:00
cpu/arm	Move TCL script files -- Step 2 of 2:	2009-05-27 06:49:24 +00:00
interface	tcl/interface/ftdi/swd-resistor-hack: clarify and add schematic diagram	2014-11-02 18:04:14 +00:00
target	stm32l: split l0/l1 support no jtag, different HSI settings	2014-12-03 09:10:21 +00:00
test	TCL scripts: replace "puts" with "echo"	2010-11-09 08:12:51 +01:00
tools	tcl: add ASUS RT-N66U config	2014-06-01 18:27:09 +00:00
bitsbytes.tcl	TCL scripts: replace "puts" with "echo"	2010-11-09 08:12:51 +01:00
mem_helper.tcl	TCL scripts: fix ocd_mem2array/mem2array	2010-09-28 10:44:50 +02:00
memory.tcl	tcl: remove silly ocd_ prefix to array2mem and mem2array	2010-08-11 17:24:55 +02:00
mmr_helpers.tcl	TCL scripts: replace "puts" with "echo"	2010-11-09 08:12:51 +01:00