43 lines
1.1 KiB
INI
43 lines
1.1 KiB
INI
#use combined on interfaces or targets that can't set TRST/SRST separately
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reset_config trst_and_srst
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME imx27
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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# Note above there are 2 taps
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# The bs tap
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if { [info exists BSTAPID ] } {
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set _BSTAPID $BSTAPID
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} else {
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set _BSTAPID 0x1b900f0f
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}
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jtag newtap $_CHIPNAME bs -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_BSTAPID
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# The CPU tap
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x07926121
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}
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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# Create the GDB Target.
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set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
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target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
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$_TARGETNAME configure -work-area-virt 0xffff4c00 -work-area-phys 0xffff4c00 -work-area-size 0x8000 -work-area-backup 1
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# Internal to the chip, there is 45K of SRAM
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#
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arm7_9 dcc_downloads enable
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