126 lines
3.6 KiB
ArmAsm
126 lines
3.6 KiB
ArmAsm
/***************************************************************************
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* Copyright (C) 2011 by Andreas Fritiofson *
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* andreas.fritiofson@gmail.com *
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* *
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* Copyright (C) 2013 by Paul Fertser *
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* fercerpav@gmail.com *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, write to the *
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* Free Software Foundation, Inc., *
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
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***************************************************************************/
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.text
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.syntax unified
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.cpu cortex-m0
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.thumb
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.thumb_func
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.global write
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/* Params:
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* r0 - flash base (in), status (out)
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* r1 - count (32bit)
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* r2 - workarea start
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* r3 - workarea end
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* r4 - target address
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* Clobbered:
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* r5 - rp
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* r6 - wp, tmp
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* r7 - current FLASH_CMD
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*/
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#define FLASH_CMD 0x00
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#define FLASH_ADR 0x04
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#define FLASH_DI 0x08
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#define FLASH_NVSTR (1 << 13)
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#define FLASH_PROG (1 << 12)
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#define FLASH_MAS1 (1 << 11)
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#define FLASH_ERASE (1 << 10)
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#define FLASH_SE (1 << 8)
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#define FLASH_YE (1 << 7)
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#define FLASH_XE (1 << 6)
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ldr r7, [r0, #FLASH_CMD]
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wait_fifo:
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ldr r6, [r2, #0] /* read wp */
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cmp r6, #0 /* abort if wp == 0 */
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beq exit
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ldr r5, [r2, #4] /* read rp */
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cmp r5, r6 /* wait until rp != wp */
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beq wait_fifo
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ldr r6, [r5] /* "*target_address++ = *rp++" */
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str r4, [r0, #FLASH_ADR]
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str r6, [r0, #FLASH_DI]
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ldr r6, =(FLASH_XE | FLASH_PROG)
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orrs r7, r7, r6
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str r7, [r0, #FLASH_CMD]
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# wait 5us
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movs r6, #5
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bl delay
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ldr r6, =#FLASH_NVSTR
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orrs r7, r7, r6
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str r7, [r0, #FLASH_CMD]
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# wait 10us
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movs r6, #13
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bl delay
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movs r6, #FLASH_YE
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orrs r7, r7, r6
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str r7, [r0, #FLASH_CMD]
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# wait 40us
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movs r6, #61
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bl delay
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movs r6, #FLASH_YE
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bics r7, r7, r6
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str r7, [r0, #FLASH_CMD]
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ldr r6, =#FLASH_PROG
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bics r7, r7, r6
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str r7, [r0, #FLASH_CMD]
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# wait 5us
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movs r6, #5
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bl delay
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ldr r6, =#(FLASH_XE | FLASH_NVSTR)
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bics r7, r7, r6
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str r7, [r0, #FLASH_CMD]
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adds r5, #4
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adds r4, #4
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cmp r5, r3 /* wrap rp at end of buffer */
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bcc no_wrap
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mov r5, r2
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adds r5, #8
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no_wrap:
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str r5, [r2, #4] /* store rp */
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subs r1, r1, #1 /* decrement word count */
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cmp r1, #0
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beq exit /* loop if not done */
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b wait_fifo
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exit:
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mov r0, r6 /* return status in r0 */
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bkpt #0
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/* r6 - in
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* for r6 == 1 it'll take:
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* 1 (prepare operand) + 4 (bl) + 2 (subs+cmp) + 1 (bne) + 3 (b) ->
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* 11 tacts == 1.4us with 8MHz
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* every extra iteration will take 5 tacts == 0.6us */
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delay:
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subs r6, r6, #1
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cmp r6, #0
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bne delay
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bx lr
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