508 lines
16 KiB
C
508 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/***************************************************************************
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* Copyright (C) 2022 by Daniel Anselmi *
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* danselmi@gmx.ch *
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***************************************************************************/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <jtag/jtag.h>
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#include <jtag/adapter.h>
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#include <helper/system.h>
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#include <helper/log.h>
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#include "pld.h"
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#include "raw_bit.h"
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#define BYPASS 0x3FF
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#define USER0 0x00C
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#define USER1 0x00E
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enum intel_family_e {
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INTEL_CYCLONEIII,
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INTEL_CYCLONEIV,
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INTEL_CYCLONEV,
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INTEL_CYCLONE10,
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INTEL_ARRIAII,
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INTEL_UNKNOWN
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};
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struct intel_pld_device {
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struct jtag_tap *tap;
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unsigned int boundary_scan_length;
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int checkpos;
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enum intel_family_e family;
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};
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struct intel_device_parameters_elem {
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uint32_t id;
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unsigned int boundary_scan_length;
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int checkpos;
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enum intel_family_e family;
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};
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static const struct intel_device_parameters_elem intel_device_parameters[] = {
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{0x020f10dd, 603, 226, INTEL_CYCLONEIII}, /* EP3C5 EP3C10 */
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{0x020f20dd, 1080, 409, INTEL_CYCLONEIII}, /* EP3C16 */
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{0x020f30dd, 732, 286, INTEL_CYCLONEIII}, /* EP3C25 */
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{0x020f40dd, 1632, 604, INTEL_CYCLONEIII}, /* EP3C40 */
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{0x020f50dd, 1164, 442, INTEL_CYCLONEIII}, /* EP3C55 */
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{0x020f60dd, 1314, 502, INTEL_CYCLONEIII}, /* EP3C80 */
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{0x020f70dd, 1620, 613, INTEL_CYCLONEIII}, /* EP3C120*/
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{0x027010dd, 1314, 226, INTEL_CYCLONEIII}, /* EP3CLS70 */
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{0x027000dd, 1314, 226, INTEL_CYCLONEIII}, /* EP3CLS100 */
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{0x027030dd, 1314, 409, INTEL_CYCLONEIII}, /* EP3CLS150 */
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{0x027020dd, 1314, 409, INTEL_CYCLONEIII}, /* EP3CLS200 */
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{0x020f10dd, 603, 226, INTEL_CYCLONEIV}, /* EP4CE6 EP4CE10 */
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{0x020f20dd, 1080, 409, INTEL_CYCLONEIV}, /* EP4CE15 */
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{0x020f30dd, 732, 286, INTEL_CYCLONEIV}, /* EP4CE22 */
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{0x020f40dd, 1632, 604, INTEL_CYCLONEIV}, /* EP4CE30 EP4CE40 */
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{0x020f50dd, 1164, 442, INTEL_CYCLONEIV}, /* EP4CE55 */
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{0x020f60dd, 1314, 502, INTEL_CYCLONEIV}, /* EP4CE75 */
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{0x020f70dd, 1620, 613, INTEL_CYCLONEIV}, /* EP4CE115 */
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{0x028010dd, 260, 229, INTEL_CYCLONEIV}, /* EP4CGX15 */
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{0x028120dd, 494, 463, INTEL_CYCLONEIV}, /* EP4CGX22 */
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{0x028020dd, 494, 463, INTEL_CYCLONEIV}, /* EP4CGX30 */
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{0x028230dd, 1006, 943, INTEL_CYCLONEIV}, /* EP4CGX30 */
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{0x028130dd, 1006, 943, INTEL_CYCLONEIV}, /* EP4CGX50 */
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{0x028030dd, 1006, 943, INTEL_CYCLONEIV}, /* EP4CGX75 */
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{0x028140dd, 1495, 1438, INTEL_CYCLONEIV}, /* EP4CGX110 */
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{0x028040dd, 1495, 1438, INTEL_CYCLONEIV}, /* EP4CGX150 */
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{0x02b150dd, 864, 163, INTEL_CYCLONEV}, /* 5CEBA2F23 5CEBA2F17 5CEFA2M13 5CEFA2F23 5CEBA2U15 5CEFA2U19 5CEBA2U19 */
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{0x02d020dd, 1485, 19, INTEL_CYCLONEV}, /* 5CSXFC6D6F31 5CSTFD6D5F31 5CSEBA6U23 5CSEMA6U23 5CSEBA6U19 5CSEBA6U23
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5CSEBA6U19 5CSEMA6F31 5CSXFC6C6U23 */
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{0x02b040dd, 1728, -1, INTEL_CYCLONEV}, /* 5CGXFC9EF35 5CGXBC9AU19 5CGXBC9CF23 5CGTFD9CF23 5CGXFC9AU19 5CGXFC9CF23
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5CGXFC9EF31 5CGXFC9DF27 5CGXBC9DF27 5CGXBC9EF31 5CGTFD9EF31 5CGTFD9EF35
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5CGTFD9AU19 5CGXBC9EF35 5CGTFD9DF27 */
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{0x02b050dd, 864, 163, INTEL_CYCLONEV}, /* 5CEFA4U19 5CEFA4F23 5CEFA4M13 5CEBA4F17 5CEBA4U15 5CEBA4U19 5CEBA4F23 */
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{0x02b030dd, 1488, 19, INTEL_CYCLONEV}, /* 5CGXBC7CU19 5CGTFD7CU19 5CGTFD7DF27 5CGXFC7BM15 5CGXFC7DF27 5CGXFC7DF31
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5CGTFD7CF23 5CGXBC7CF23 5CGXBC7DF31 5CGTFD7BM15 5CGXFC7CU19 5CGTFD7DF31
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5CGXBC7BM15 5CGXFC7CF23 5CGXBC7DF27 */
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{0x02d120dd, 1485, -1, INTEL_CYCLONEV}, /* 5CSEBA5U23 5CSEBA5U23 5CSTFD5D5F31 5CSEBA5U19 5CSXFC5D6F31 5CSEMA5U23
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5CSEMA5F31 5CSXFC5C6U23 5CSEBA5U19 */
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{0x02b220dd, 1104, 19, INTEL_CYCLONEV}, /* 5CEBA5U19 5CEFA5U19 5CEFA5M13 5CEBA5F23 5CEFA5F23 */
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{0x02b020dd, 1104, 19, INTEL_CYCLONEV}, /* 5CGXBC5CU19 5CGXFC5F6M11 5CGXFC5CM13 5CGTFD5CF23 5CGXBC5CF23 5CGTFD5CF27
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5CGTFD5F5M11 5CGXFC5CF27 5CGXFC5CU19 5CGTFD5CM13 5CGXFC5CF23 5CGXBC5CF27
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5CGTFD5CU19 */
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{0x02d010dd, 1197, -1, INTEL_CYCLONEV}, /* 5CSEBA4U23 5CSXFC4C6U23 5CSEMA4U23 5CSEBA4U23 5CSEBA4U19 5CSEBA4U19
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5CSXFC2C6U23 */
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{0x02b120dd, 1104, 19, INTEL_CYCLONEV}, /* 5CGXFC4CM13 5CGXFC4CU19 5CGXFC4F6M11 5CGXBC4CU19 5CGXFC4CF27 5CGXBC4CF23
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5CGXBC4CF27 5CGXFC4CF23 */
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{0x02b140dd, 1728, -1, INTEL_CYCLONEV}, /* 5CEFA9F31 5CEBA9F31 5CEFA9F27 5CEBA9U19 5CEBA9F27 5CEFA9U19 5CEBA9F23
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5CEFA9F23 */
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{0x02b010dd, 720, 19, INTEL_CYCLONEV}, /* 5CGXFC3U15 5CGXBC3U15 5CGXFC3F23 5CGXFC3U19 5CGXBC3U19 5CGXBC3F23 */
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{0x02b130dd, 1488, 19, INTEL_CYCLONEV}, /* 5CEFA7F31 5CEBA7F27 5CEBA7M15 5CEFA7U19 5CEBA7F23 5CEFA7F23 5CEFA7F27
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5CEFA7M15 5CEBA7U19 5CEBA7F31 */
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{0x02d110dd, 1197, -1, INTEL_CYCLONEV}, /* 5CSEBA2U23 5CSEMA2U23 5CSEBA2U23 5CSEBA2U19 5CSEBA2U19 */
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{0x020f10dd, 603, 226, INTEL_CYCLONE10}, /* 10CL006E144 10CL006U256 10CL010M164 10CL010U256 10CL010E144 */
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{0x020f20dd, 1080, 409, INTEL_CYCLONE10}, /* 10CL016U256 10CL016E144 10CL016U484 10CL016F484 10CL016M164 */
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{0x020f30dd, 732, 286, INTEL_CYCLONE10}, /* 10CL025U256 10CL025E144 */
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{0x020f40dd, 1632, 604, INTEL_CYCLONE10}, /* 10CL040F484 10CL040U484 */
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{0x020f50dd, 1164, 442, INTEL_CYCLONE10}, /* 10CL055F484 10CL055U484 */
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{0x020f60dd, 1314, 502, INTEL_CYCLONE10}, /* 10CL080F484 10CL080F780 10CL080U484 */
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{0x020f70dd, 1620, 613, INTEL_CYCLONE10}, /* 10CL120F484 10CL120F780 */
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{0x02e120dd, 1339, -1, INTEL_CYCLONE10}, /* 10CX085U484 10CX085F672 */
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{0x02e320dd, 1339, -1, INTEL_CYCLONE10}, /* 10CX105F780 10CX105U484 10CX105F672 */
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{0x02e720dd, 1339, -1, INTEL_CYCLONE10}, /* 10CX150F672 10CX150F780 10CX150U484 */
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{0x02ef20dd, 1339, -1, INTEL_CYCLONE10}, /* 10CX220F672 10CX220F780 10CX220U484 */
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{0x025120dd, 1227, 1174, INTEL_ARRIAII}, /* EP2AGX45 */
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{0x025020dd, 1227, -1, INTEL_ARRIAII}, /* EP2AGX65 */
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{0x025130dd, 1467, -1, INTEL_ARRIAII}, /* EP2AGX95 */
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{0x025030dd, 1467, -1, INTEL_ARRIAII}, /* EP2AGX125 */
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{0x025140dd, 1971, -1, INTEL_ARRIAII}, /* EP2AGX190 */
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{0x025040dd, 1971, -1, INTEL_ARRIAII}, /* EP2AGX260 */
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{0x024810dd, 2274, -1, INTEL_ARRIAII}, /* EP2AGZ225 */
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{0x0240a0dd, 2682, -1, INTEL_ARRIAII}, /* EP2AGZ300 */
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{0x024820dd, 2682, -1, INTEL_ARRIAII}, /* EP2AGZ350 */
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};
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static int intel_fill_device_parameters(struct intel_pld_device *intel_info)
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{
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for (size_t i = 0; i < ARRAY_SIZE(intel_device_parameters); ++i) {
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if (intel_device_parameters[i].id == intel_info->tap->idcode &&
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intel_info->family == intel_device_parameters[i].family) {
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if (intel_info->boundary_scan_length == 0)
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intel_info->boundary_scan_length = intel_device_parameters[i].boundary_scan_length;
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if (intel_info->checkpos == -1)
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intel_info->checkpos = intel_device_parameters[i].checkpos;
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return ERROR_OK;
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}
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}
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return ERROR_FAIL;
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}
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static int intel_check_for_unique_id(struct intel_pld_device *intel_info)
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{
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int found = 0;
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for (size_t i = 0; i < ARRAY_SIZE(intel_device_parameters); ++i) {
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if (intel_device_parameters[i].id == intel_info->tap->idcode) {
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++found;
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intel_info->family = intel_device_parameters[i].family;
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}
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}
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return (found == 1) ? ERROR_OK : ERROR_FAIL;
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}
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static int intel_check_config(struct intel_pld_device *intel_info)
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{
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if (!intel_info->tap->hasidcode) {
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LOG_ERROR("no IDCODE");
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return ERROR_FAIL;
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}
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if (intel_info->family == INTEL_UNKNOWN) {
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if (intel_check_for_unique_id(intel_info) != ERROR_OK) {
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LOG_ERROR("id is ambiguous, please specify family");
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return ERROR_FAIL;
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}
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}
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if (intel_info->boundary_scan_length == 0 || intel_info->checkpos == -1) {
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int ret = intel_fill_device_parameters(intel_info);
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if (ret != ERROR_OK)
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return ret;
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}
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if (intel_info->checkpos >= 0 && (unsigned int)intel_info->checkpos >= intel_info->boundary_scan_length) {
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LOG_ERROR("checkpos has to be smaller than scan length %d < %u",
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intel_info->checkpos, intel_info->boundary_scan_length);
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return ERROR_FAIL;
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}
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return ERROR_OK;
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}
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static int intel_read_file(struct raw_bit_file *bit_file, const char *filename)
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{
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if (!filename || !bit_file)
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return ERROR_COMMAND_SYNTAX_ERROR;
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/* check if binary .bin or ascii .bit/.hex */
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const char *file_ending_pos = strrchr(filename, '.');
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if (!file_ending_pos) {
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LOG_ERROR("Unable to detect filename suffix");
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return ERROR_PLD_FILE_LOAD_FAILED;
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}
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if (strcasecmp(file_ending_pos, ".rbf") == 0)
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return cpld_read_raw_bit_file(bit_file, filename);
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LOG_ERROR("Unable to detect filetype");
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return ERROR_PLD_FILE_LOAD_FAILED;
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}
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static int intel_set_instr(struct jtag_tap *tap, uint16_t new_instr)
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{
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struct scan_field field;
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field.num_bits = tap->ir_length;
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void *t = calloc(DIV_ROUND_UP(field.num_bits, 8), 1);
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if (!t) {
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LOG_ERROR("Out of memory");
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return ERROR_FAIL;
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}
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field.out_value = t;
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buf_set_u32(t, 0, field.num_bits, new_instr);
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field.in_value = NULL;
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jtag_add_ir_scan(tap, &field, TAP_IDLE);
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free(t);
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return ERROR_OK;
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}
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static int intel_load(struct pld_device *pld_device, const char *filename)
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{
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unsigned int speed = adapter_get_speed_khz();
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if (speed < 1)
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speed = 1;
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unsigned int cycles = DIV_ROUND_UP(speed, 200);
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if (cycles < 1)
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cycles = 1;
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if (!pld_device || !pld_device->driver_priv)
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return ERROR_FAIL;
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struct intel_pld_device *intel_info = pld_device->driver_priv;
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if (!intel_info || !intel_info->tap)
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return ERROR_FAIL;
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struct jtag_tap *tap = intel_info->tap;
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int retval = intel_check_config(intel_info);
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if (retval != ERROR_OK)
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return retval;
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struct raw_bit_file bit_file;
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retval = intel_read_file(&bit_file, filename);
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if (retval != ERROR_OK)
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return retval;
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if (retval != ERROR_OK)
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return retval;
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retval = intel_set_instr(tap, 0x002);
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if (retval != ERROR_OK) {
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free(bit_file.data);
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return retval;
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}
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jtag_add_runtest(speed, TAP_IDLE);
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retval = jtag_execute_queue();
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if (retval != ERROR_OK) {
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free(bit_file.data);
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return retval;
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}
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/* shift in the bitstream */
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struct scan_field field;
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field.num_bits = bit_file.length * 8;
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field.out_value = bit_file.data;
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field.in_value = NULL;
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jtag_add_dr_scan(tap, 1, &field, TAP_DRPAUSE);
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retval = jtag_execute_queue();
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free(bit_file.data);
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if (retval != ERROR_OK)
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return retval;
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retval = intel_set_instr(tap, 0x004);
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if (retval != ERROR_OK)
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return retval;
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jtag_add_runtest(cycles, TAP_IDLE);
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retval = jtag_execute_queue();
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if (retval != ERROR_OK)
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return retval;
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if (intel_info->boundary_scan_length != 0) {
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uint8_t *buf = calloc(DIV_ROUND_UP(intel_info->boundary_scan_length, 8), 1);
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if (!buf) {
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LOG_ERROR("Out of memory");
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return ERROR_FAIL;
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}
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field.num_bits = intel_info->boundary_scan_length;
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field.out_value = buf;
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field.in_value = buf;
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jtag_add_dr_scan(tap, 1, &field, TAP_DRPAUSE);
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retval = jtag_execute_queue();
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if (retval != ERROR_OK) {
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free(buf);
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return retval;
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}
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if (intel_info->checkpos != -1)
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retval = ((buf[intel_info->checkpos / 8] & (1 << (intel_info->checkpos % 8)))) ?
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ERROR_OK : ERROR_FAIL;
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free(buf);
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if (retval != ERROR_OK) {
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LOG_ERROR("Check failed");
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return ERROR_FAIL;
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}
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}
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retval = intel_set_instr(tap, 0x003);
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if (retval != ERROR_OK)
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return retval;
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switch (intel_info->family) {
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case INTEL_CYCLONEIII:
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case INTEL_CYCLONEIV:
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jtag_add_runtest(5 * speed + 512, TAP_IDLE);
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break;
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case INTEL_CYCLONEV:
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jtag_add_runtest(5 * speed + 512, TAP_IDLE);
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break;
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case INTEL_CYCLONE10:
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jtag_add_runtest(DIV_ROUND_UP(512ul * speed, 125ul) + 512, TAP_IDLE);
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break;
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case INTEL_ARRIAII:
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jtag_add_runtest(DIV_ROUND_UP(64ul * speed, 125ul) + 512, TAP_IDLE);
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break;
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case INTEL_UNKNOWN:
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LOG_ERROR("unknown family");
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return ERROR_FAIL;
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}
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retval = intel_set_instr(tap, BYPASS);
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if (retval != ERROR_OK)
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return retval;
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jtag_add_runtest(speed, TAP_IDLE);
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return jtag_execute_queue();
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}
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static int intel_get_ipdbg_hub(int user_num, struct pld_device *pld_device, struct pld_ipdbg_hub *hub)
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{
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if (!pld_device)
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return ERROR_FAIL;
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struct intel_pld_device *pld_device_info = pld_device->driver_priv;
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if (!pld_device_info || !pld_device_info->tap)
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return ERROR_FAIL;
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hub->tap = pld_device_info->tap;
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if (user_num == 0) {
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hub->user_ir_code = USER0;
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} else if (user_num == 1) {
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hub->user_ir_code = USER1;
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} else {
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LOG_ERROR("intel devices only have user register 0 & 1");
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return ERROR_FAIL;
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}
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return ERROR_OK;
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}
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static int intel_get_jtagspi_userircode(struct pld_device *pld_device, unsigned int *ir)
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{
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*ir = USER1;
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return ERROR_OK;
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}
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COMMAND_HANDLER(intel_set_bscan_command_handler)
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{
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unsigned int boundary_scan_length;
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if (CMD_ARGC != 2)
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return ERROR_COMMAND_SYNTAX_ERROR;
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struct pld_device *pld_device = get_pld_device_by_name_or_numstr(CMD_ARGV[0]);
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if (!pld_device) {
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command_print(CMD, "pld device '#%s' is out of bounds or unknown", CMD_ARGV[0]);
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return ERROR_FAIL;
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}
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COMMAND_PARSE_NUMBER(uint, CMD_ARGV[1], boundary_scan_length);
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struct intel_pld_device *intel_info = pld_device->driver_priv;
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if (!intel_info)
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return ERROR_FAIL;
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intel_info->boundary_scan_length = boundary_scan_length;
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return ERROR_OK;
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}
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COMMAND_HANDLER(intel_set_check_pos_command_handler)
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{
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int checkpos;
|
|
|
|
if (CMD_ARGC != 2)
|
|
return ERROR_COMMAND_SYNTAX_ERROR;
|
|
|
|
struct pld_device *pld_device = get_pld_device_by_name_or_numstr(CMD_ARGV[0]);
|
|
if (!pld_device) {
|
|
command_print(CMD, "pld device '#%s' is out of bounds or unknown", CMD_ARGV[0]);
|
|
return ERROR_FAIL;
|
|
}
|
|
|
|
COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], checkpos);
|
|
|
|
struct intel_pld_device *intel_info = pld_device->driver_priv;
|
|
|
|
if (!intel_info)
|
|
return ERROR_FAIL;
|
|
|
|
intel_info->checkpos = checkpos;
|
|
|
|
return ERROR_OK;
|
|
}
|
|
|
|
PLD_CREATE_COMMAND_HANDLER(intel_pld_create_command)
|
|
{
|
|
if (CMD_ARGC != 4 && CMD_ARGC != 6)
|
|
return ERROR_COMMAND_SYNTAX_ERROR;
|
|
|
|
if (strcmp(CMD_ARGV[2], "-chain-position") != 0)
|
|
return ERROR_COMMAND_SYNTAX_ERROR;
|
|
|
|
struct jtag_tap *tap = jtag_tap_by_string(CMD_ARGV[3]);
|
|
if (!tap) {
|
|
command_print(CMD, "Tap: %s does not exist", CMD_ARGV[3]);
|
|
return ERROR_FAIL;
|
|
}
|
|
|
|
enum intel_family_e family = INTEL_UNKNOWN;
|
|
if (CMD_ARGC == 6) {
|
|
if (strcmp(CMD_ARGV[4], "-family") != 0)
|
|
return ERROR_COMMAND_SYNTAX_ERROR;
|
|
|
|
if (strcmp(CMD_ARGV[5], "cycloneiii") == 0) {
|
|
family = INTEL_CYCLONEIII;
|
|
} else if (strcmp(CMD_ARGV[5], "cycloneiv") == 0) {
|
|
family = INTEL_CYCLONEIV;
|
|
} else if (strcmp(CMD_ARGV[5], "cyclonev") == 0) {
|
|
family = INTEL_CYCLONEV;
|
|
} else if (strcmp(CMD_ARGV[5], "cyclone10") == 0) {
|
|
family = INTEL_CYCLONE10;
|
|
} else if (strcmp(CMD_ARGV[5], "arriaii") == 0) {
|
|
family = INTEL_ARRIAII;
|
|
} else {
|
|
command_print(CMD, "unknown family");
|
|
return ERROR_FAIL;
|
|
}
|
|
}
|
|
|
|
struct intel_pld_device *intel_info = malloc(sizeof(struct intel_pld_device));
|
|
if (!intel_info) {
|
|
LOG_ERROR("Out of memory");
|
|
return ERROR_FAIL;
|
|
}
|
|
|
|
intel_info->tap = tap;
|
|
intel_info->boundary_scan_length = 0;
|
|
intel_info->checkpos = -1;
|
|
intel_info->family = family;
|
|
|
|
pld->driver_priv = intel_info;
|
|
|
|
return ERROR_OK;
|
|
}
|
|
|
|
static const struct command_registration intel_exec_command_handlers[] = {
|
|
{
|
|
.name = "set_bscan",
|
|
.mode = COMMAND_ANY,
|
|
.handler = intel_set_bscan_command_handler,
|
|
.help = "set boundary scan register length of FPGA",
|
|
.usage = "pld_name len",
|
|
}, {
|
|
.name = "set_check_pos",
|
|
.mode = COMMAND_ANY,
|
|
.handler = intel_set_check_pos_command_handler,
|
|
.help = "set check_pos of FPGA",
|
|
.usage = "pld_name pos",
|
|
},
|
|
COMMAND_REGISTRATION_DONE
|
|
};
|
|
|
|
static const struct command_registration intel_command_handler[] = {
|
|
{
|
|
.name = "intel",
|
|
.mode = COMMAND_ANY,
|
|
.help = "intel specific commands",
|
|
.usage = "",
|
|
.chain = intel_exec_command_handlers,
|
|
},
|
|
COMMAND_REGISTRATION_DONE
|
|
};
|
|
|
|
struct pld_driver intel_pld = {
|
|
.name = "intel",
|
|
.commands = intel_command_handler,
|
|
.pld_create_command = &intel_pld_create_command,
|
|
.load = &intel_load,
|
|
.get_ipdbg_hub = intel_get_ipdbg_hub,
|
|
.get_jtagspi_userircode = intel_get_jtagspi_userircode,
|
|
};
|