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Marek Vasut 82e3a0e7cf tcl/target: Add Renesas RZ/A1H target 
Add configuration for the Renesas RZ/A1H target.
This is an SoC with one Cortex A9 ARMv7a core and
up to 10 MiB of on-SoC SRAM.

Change-Id: I20fd54b385fe1ba1cc325451c3fdfa3a835d4884
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5141
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
 		2019-05-20 11:16:54 +01:00
..
board tcl/board: Add Renesas RZ/A1H GR-Peach board 2019-05-20 11:16:42 +01:00
chip Fix a typo. 2013-07-07 13:00:59 +00:00
cpld xilinx-xc7: Add additional IDCODEs. 2018-10-27 14:37:43 +01:00
cpu/arm Move TCL script files -- Step 2 of 2: 2009-05-27 06:49:24 +00:00
fpga fpga/altera-10m50: add all device id 2018-07-31 18:56:14 +01:00
interface stlink: add support for STLINK-V3 2018-12-06 13:06:59 +00:00
target tcl/target: Add Renesas RZ/A1H target 2019-05-20 11:16:54 +01:00
test TCL scripts: replace "puts" with "echo" 2010-11-09 08:12:51 +01:00
tools tcl/board: add Linksys WAG200G config 2016-10-17 09:16:33 +01:00
bitsbytes.tcl TCL scripts: replace "puts" with "echo" 2010-11-09 08:12:51 +01:00
mem_helper.tcl mem_helper: add mrh command 2018-12-06 09:38:41 +00:00
memory.tcl target: add "phys" argument to mem2array, array2mem 2016-08-09 14:32:12 +01:00
mmr_helpers.tcl TCL scripts: replace "puts" with "echo" 2010-11-09 08:12:51 +01:00