riscv-openocd

History

Ake Rehnman 9de7d9c81d STM8 Target relicensing to GPLv2 and later Change-Id: I21126945c0475399aaf12239b8972fde5fddd845 Signed-off-by: Ake Rehnman <ake.rehnman@gmail.com> Reviewed-on: http://openocd.zylin.com/5331 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>		2019-11-07 08:21:40 +00:00
..
checksum	contrib/loaders: Enforce Little Endian ARM machine code	2016-08-14 11:45:15 +01:00
debug/xscale	xscale: Move debug handler to contrib/loaders	2016-12-08 13:11:42 +00:00
erase_check	STM8 Target relicensing to GPLv2 and later	2019-11-07 08:21:40 +00:00
flash	flash/nor/stm32h7x: use of wait queue flag instead of the busy flag	2019-05-04 19:44:54 +01:00
watchdog	flash Kinetis: handle all types of watchdog, disable in reset-init	2017-06-17 12:01:55 +01:00
Makefile	max32xxx: Support for MAX32XXX devices.	2018-08-21 19:24:58 +01:00
README	cortex_m: target implementation renames cortex_m3 to cortex_m	2013-10-10 20:51:03 +00:00

README

Included in these directories are the src to the various ram loaders used
within openocd.

** target checksum loaders **

checksum/armv4_5_crc.s :
 - ARMv4 and ARMv5 checksum loader : see target/arm_crc_code.c:arm_crc_code

checksum/armv7m_crc.s :
 - ARMv7m checksum loader : see target/armv7m.c:cortex_m_crc_code

checksum/mips32.s :
 - MIPS32 checksum loader : see target/mips32.c:mips_crc_code

** target flash loaders **

flash/pic32mx.s :
 - Microchip PIC32 flash loader : see flash/nor/pic32mx.c:pic32mx_flash_write_code

flash/stellaris.s :
 - TI Stellaris flash loader : see flash/nor/stellaris.c:stellaris_write_code

flash/stm32x.s :
 - ST STM32 flash loader : see flash/nor/stm32x.c:stm32x_flash_write_code

flash/str7x.s :
 - ST STR7 flash loader : see flash/nor/str7x.c:str7x_flash_write_code

flash/str9x.s :
 - ST STR9 flash loader : see flash/nor/str9x.c:str9x_flash_write_code

Spencer Oliver
spen@spen-soft.co.uk