riscv-openocd/tcl/board/zy1000.cfg

118 lines
3.0 KiB
INI

#Script for ZY1000
#Atmel ties SRST & TRST together, at which point it makes
#no sense to use TRST, but use TMS instead.
#
#The annoying thing with tying SRST & TRST together is that
#there is no way to halt the CPU *before and during* the
#SRST reset, which means that the CPU will run a number
#of cycles before it can be halted(as much as milliseconds).
reset_config srst_only srst_pulls_trst
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME zy1000
}
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
set _ENDIAN little
}
#jtag scan chain
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x1f0f0f0f
}
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
# at CPU CLK <32kHz this must be disabled
arm7_9 fast_memory_access enable
arm7_9 dcc_downloads enable
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME cfi 0x01000000 0x200000 2 2 $_TARGETNAME
$_TARGETNAME configure -event reset-init {
# Set up chip selects & timings
mww 0xFFE00000 0x0100273D
mww 0xFFE00004 0x08002125
mww 0xFFEe0008 0x02002125
mww 0xFFE0000c 0x03002125
mww 0xFFE00010 0x40000000
mww 0xFFE00014 0x50000000
mww 0xFFE00018 0x60000000
mww 0xFFE0001c 0x70000000
mww 0xFFE00020 0x00000001
mww 0xFFE00024 0x00000000
# remap
mww 0xFFFFF124 0xFFFFFFFF
mww 0xffff0010 0x100
mww 0xffff0034 0x100
#disable 16x5x UART interrupts
mww 0x08020004 0
}
$_TARGETNAME configure -event gdb-attach {
# Without this gdb-attach will first time as probe will fail
reset init
}
# required for usable performance. Used for lots of
# other things than flash programming.
$_TARGETNAME configure -work-area-phys 0x00020000 -work-area-size 0x20000 -work-area-backup 0
adapter_khz 16000
proc production_info {} {
return "Serial number is official MAC number. Format XXXXXXXXXXXX"
}
# There is no return value from this procedure. If it is
# successful it does not throw an exception
#
# Progress messages are output via puts
proc production {firmwarefile serialnumber} {
if {[string length $serialnumber]!=12} {
echo "Invalid serial number"
return
}
echo "Power cycling target"
power off
sleep 3000
power on
sleep 1000
reset init
flash write_image erase $firmwarefile 0x1000000 bin
verify_image $firmwarefile 0x1000000 bin
# Big endian... weee!!!!
echo "Setting MAC number to $serialnumber"
flash fillw [expr 0x1030000-0x8] "0x[string range $serialnumber 2 3][string range $serialnumber 0 1]0000" 1
flash fillw [expr 0x1030000-0x4] "0x[string range $serialnumber 10 11][string range $serialnumber 8 9][string range $serialnumber 6 7][string range $serialnumber 4 5]" 1
echo "Production successful"
}
proc production_test {} {
power on
sleep 1000
target_request debugmsgs enable
reset run
sleep 25000
target_request debugmsgs disable
return "See IP address above..."
}