riscv-openocd/tcl
David Brownell 60e24aa597 make PXA255 targets enumerate sort-of-OK
Startup now mostly works, except that the initial target state
is "unknown" ... previously, it refused to even start.

Getting that far required fixing the ircapture value (which
can never have been correct!) and the default JTAG clock rate,
then providing custom reset script.

The "reset" command is still iffy.  DCSR updates, and loading
the debug handler, report numerous DR/IR capture failures.
But once that's done, "poll" reports that the CPU is halted
(which it shouldn't be, this was "reset run"!), due to the
rather curious reason "target-not-halted".

Summary:  you still can't debug these parts, but it's closer.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-10-08 23:51:50 -07:00
..
board Function to flash SheevaPlug u-boot sectors 2009-10-08 17:10:52 -07:00
chip Remove annoying end-of-line whitespace from tcl/* files 2009-09-21 18:48:22 +00:00
cpu/arm Move TCL script files -- Step 2 of 2: 2009-05-27 06:49:24 +00:00
interface - revert change made to sheevaplug.cfg in rev2573 2009-09-11 14:08:28 +00:00
target make PXA255 targets enumerate sort-of-OK 2009-10-08 23:51:50 -07:00
test Remove annoying end-of-line whitespace from tcl/* files 2009-09-21 18:48:22 +00:00
bitsbytes.tcl Remove annoying end-of-line whitespace from tcl/* files 2009-09-21 18:48:22 +00:00
memory.tcl Remove annoying end-of-line whitespace from tcl/* files 2009-09-21 18:48:22 +00:00
mmr_helpers.tcl Remove annoying end-of-line whitespace from tcl/* files 2009-09-21 18:48:22 +00:00
readable.tcl Remove annoying end-of-line whitespace from tcl/* files 2009-09-21 18:48:22 +00:00