95 lines
2.1 KiB
INI
95 lines
2.1 KiB
INI
# script for str9
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# For more information about the configuration files, take a look at:
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# openocd.texi
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME str912
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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# jtag speed. We need to stick to 16kHz until we've finished reset.
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jtag_rclk 16
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jtag_nsrst_delay 100
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jtag_ntrst_delay 100
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#use combined on interfaces or targets that can't set TRST/SRST separately
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#reset_config trst_and_srst
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if { [info exists FLASHTAPID ] } {
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set _FLASHTAPID $FLASHTAPID
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} else {
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set _FLASHTAPID 0x04570041
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}
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jtag newtap $_CHIPNAME flash \
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-irlen 8 -ircapture 0x1 -irmask 0x1 \
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-expected-id $_FLASHTAPID
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x25966041
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}
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jtag newtap $_CHIPNAME cpu \
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-irlen 4 -ircapture 0x1 -irmask 0xf \
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-expected-id $_CPUTAPID
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if { [info exists BSTAPID ] } {
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set _BSTAPID1 $BSTAPID
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set _BSTAPID2 $BSTAPID
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} else {
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set _BSTAPID1 0x1457f041
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set _BSTAPID2 0x2457f041
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}
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jtag newtap $_CHIPNAME bs \
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-irlen 5 -ircapture 0x1 -irmask 0x1 \
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-expected-id $_BSTAPID1 -expected-id $_BSTAPID2
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set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
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target create $_TARGETNAME arm966e \
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-endian $_ENDIAN \
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-chain-position $_TARGETNAME \
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-variant arm966e
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$_TARGETNAME configure -event reset-start { jtag_rclk 16 }
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proc str9x_config { } {
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# -- Enable 96K RAM w/:
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# PFQBC enabled / DTCM & AHB wait-states disabled
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mww 0x5C002034 0x0191
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# PFQBC disabled / DTCM & AHB wait-states enabled
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#mww 0x5C002034 0x0196
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# 256K/32k
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str9x flash_config 0 3 2 0 0x40000
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# 512K/32K
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#str9x flash_config 0 4 2 0 0x80000
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}
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proc str9x_init { } {
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# enable RTCK
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jtag_rclk 0
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str9x_config
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}
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$_TARGETNAME configure -event reset-init str9x_init
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$_TARGETNAME configure \
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-work-area-virt 0 \
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-work-area-phys 0x50000000 \
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-work-area-size 16384 \
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-work-area-backup 0
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#flash bank str9x <base> <size> 0 0 <target#> <variant>
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flash bank str9x 0x00000000 0x00040000 0 0 0
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flash bank str9x 0x00040000 0x00008000 0 0 0
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