77 lines
2.0 KiB
INI
77 lines
2.0 KiB
INI
#
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# Target configuration for the Silicon Labs EM357 chips
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#
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#
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# em357 family supports JTAG and SWD transports
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#
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source [find target/swj-dp.tcl]
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME em357
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}
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# Work-area is a space in RAM used for flash programming
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# By default use 4kB
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if { [info exists WORKAREASIZE] } {
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set _WORKAREASIZE $WORKAREASIZE
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} else {
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set _WORKAREASIZE 0x1000
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}
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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if { [using_jtag] } {
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set _CPUTAPID 0x3ba00477
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} else {
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set _CPUTAPID 0x1ba00477
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}
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}
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if { [info exists BSTAPID] } {
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set _BSTAPID $BSTAPID
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} else {
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set _BSTAPID 0x069a962b
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}
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME em358
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}
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if { [info exists FLASHSIZE] } {
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set _FLASHSIZE $FLASHSIZE
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} else {
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set _FLASHSIZE 0x30000
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}
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swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
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if { [using_jtag] } {
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swj_newdap $_CHIPNAME bs -irlen 4 -expected-id $_BSTAPID -ircapture 0xe -irmask 0xf
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}
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_m -endian little -chain-position $_TARGETNAME
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME em357 0x08000000 $_FLASHSIZE 0 0 $_TARGETNAME
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if { ![using_hla]} {
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# according to errata, we need to use vectreset rather than sysresetreq to avoid lockup
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# There is a bug in the chip, which means that when using external debuggers the chip
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# may lock up in certain CPU clock modes. Affected modes are operating the CPU at
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# 24MHz derived from the 24MHz crystal, or 12MHz derived from the high frequency RC
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# oscillator. If an external debugger tool asserts SYSRESETREQ, the chip will lock up and
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# require a pin reset or power cycle.
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#
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# for details, refer to:
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# http://www.silabs.com/Support%20Documents/TechnicalDocs/EM35x-Errata.pdf
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cortex_m reset_config vectreset
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}
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