58 lines
1.5 KiB
INI
58 lines
1.5 KiB
INI
source [find target/icepick.cfg]
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME am335x
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}
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#
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# M3 DAP
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#
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if { [info exists M3_DAP_TAPID] } {
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set _M3_DAP_TAPID $M3_DAP_TAPID
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} else {
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set _M3_DAP_TAPID 0x4b6b902f
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}
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jtag newtap $_CHIPNAME m3_dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_M3_DAP_TAPID -disable
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jtag configure $_CHIPNAME.m3_dap -event tap-enable "icepick_d_tapenable $_CHIPNAME.jrc 11"
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#
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# Main DAP
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#
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if { [info exists DAP_TAPID] } {
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set _DAP_TAPID $DAP_TAPID
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} else {
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set _DAP_TAPID 0x4b6b902f
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}
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jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
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jtag configure $_CHIPNAME.dap -event tap-enable "icepick_d_tapenable $_CHIPNAME.jrc 12"
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#
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# ICEpick-D (JTAG route controller)
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#
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if { [info exists JRC_TAPID] } {
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set _JRC_TAPID $JRC_TAPID
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} else {
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set _JRC_TAPID 0x0b94402f
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}
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jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID -ignore-version
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jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.dap"
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# some TCK tycles are required to activate the DEBUG power domain
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jtag configure $_CHIPNAME.jrc -event post-reset "runtest 100"
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#
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# Cortex A8 target
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#
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_a -chain-position $_CHIPNAME.dap -dbgbase 0x80001000
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# SRAM: 64K at 0x4030.0000; use the first 16K
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$_TARGETNAME configure -work-area-phys 0x40300000 -work-area-size 0x4000
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$_TARGETNAME configure -event gdb-attach {
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cortex_a dbginit
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halt
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}
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