riscv-openocd/tcl/board/avnet_ultrazed-eg.cfg

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# SPDX-License-Identifier: GPL-2.0-or-later
#
# AVNET UltraZED EG StarterKit
# ZynqMP UlraScale-EG plus IO Carrier with on-board digilent smt2
#
source [find interface/ftdi/digilent_jtag_smt2_nc.cfg]
# jtag transport only
transport select jtag
# reset lines are not wired
reset_config none
# slow default clock
adapter speed 1000
set CHIPNAME uscale
source [find target/xilinx_zynqmp.cfg]