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Jacek Wuwer 24b656bff5 jtag/vdebug: adding xtensa config 
This change adds the extensa sample target and board configurations.
it removes the obsoleted vd_xtensa_jtag.cfg from targets.

Change-Id: I9d4d25abde46c0b15e5211a973012447872cb405
Signed-off-by: Jacek Wuwer <jacekmw8@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7723
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
 		2023-06-02 21:04:37 +00:00
..
board jtag/vdebug: adding xtensa config 2023-06-02 21:04:37 +00:00
chip tcl: add SPDX tag 2022-06-24 21:54:12 +00:00
cpld flash/jtagspi: sending command and setting parameters without probing. 2023-05-27 06:44:31 +00:00
cpu tcl: add SPDX tag 2022-06-24 21:54:12 +00:00
fpga pld: add support for cologne chip gatemate fpgas 2023-04-30 14:55:14 +00:00
interface tcl/board/calao-usb-a9260: fix and refactor broken support 2023-03-28 09:35:21 +00:00
target jtag/vdebug: adding xtensa config 2023-06-02 21:04:37 +00:00
test tcl: add SPDX tag 2022-06-24 21:54:12 +00:00
tools tcl/tools/test_cpu_speed: Fix register name 2023-03-18 21:59:47 +00:00
bitsbytes.tcl tcl: add SPDX tag 2022-06-24 21:54:12 +00:00
mem_helper.tcl tcl: add SPDX tag 2022-06-24 21:54:12 +00:00
memory.tcl tcl: add SPDX tag 2022-06-24 21:54:12 +00:00
mmr_helpers.tcl tcl: add SPDX tag 2022-06-24 21:54:12 +00:00