riscv-openocd/doc
Marek Vrbka 1c6b7fa2c9 target: Fix force-reading of registers and add flush capability
1) OpenOCD has the capability to 'force' a register read from the
target. This functionality however silently breaks the register
cache: During 'get_reg force' or 'reg <name> force',
reg->type->get() is called which will silently overwrite
dirty items in the register cache, causing a loss of unwritten
register values. This patch fixes that by adding a flush
callback for registers, and by using it when it is needed.

2) The register write commands did not have the 'force' flag;
this was present for register read commands only.
This patch adds it.

3) This patch also introduces the flush_reg_cache command. It
flushes all registers and can optionally invalidates the register
cache after the flush.

For targets which implement the register cache should implement
the flush() callback in struct reg_arch_type.

This functionality is also useful for test purposes. Example:
 - In RISC-V, some registers are WARL (write any read legal)
   and this command allows to check this behavior.

We plan to implement the corresponding callback
in the RISC-V target.

Change-Id: I9537a5f05b46330f70aad17f77b2b80dedad068a
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Signed-off-by: Jan Matyas <jan.matyas@codasip.com>
2024-12-20 14:56:56 +03:00
..
manual doc: style: report indentation of multi-line condition 2024-05-04 08:21:33 +00:00
usb_adapters jtag/drivers: Add GPIO extender configuration function to ANGIE driver 2024-01-29 13:36:27 +03:00
.gitattributes doc: fix texinfo files attributes on Windows 2020-03-24 17:20:19 +00:00
Makefile.am doc: Makefile.am: add SPDX license 2024-08-02 16:00:50 +00:00
checkpatch.rst checkpatch: import new script version from kernel v6.0-rc3 2022-09-18 08:16:40 +00:00
fdl.texi LICENSES: add the GFDL-1.2 license 2021-04-11 20:52:14 +01:00
openocd.1 doc: Refurbish manual page 2024-07-13 16:46:36 +00:00
openocd.texi target: Fix force-reading of registers and add flush capability 2024-12-20 14:56:56 +03:00