28 lines
1.0 KiB
INI
28 lines
1.0 KiB
INI
# SPDX-License-Identifier: GPL-2.0-or-later
|
|
|
|
# Configuration for the ST SPEAr320 Evaluation board
|
|
# EVAL_SPEAr320CPU Rev. 2.0, modified to enable SRST on JTAG connector
|
|
# http://www.st.com/spear
|
|
#
|
|
# List of board modifications to enable SRST, as reported in
|
|
# ST Application Note (FIXME: add reference).
|
|
# - Modifications on the bottom layer:
|
|
# 1. replace reset chip U7 with a STM6315SDW13F;
|
|
# 2. add 0 ohm resistor R45. It is located close to JTAG connector.
|
|
# 3. add a 10K ohm pull-up resistor on the reset wire named as
|
|
# POWERGOOD in the schematic.
|
|
#
|
|
# The easier way to do modification 3, is to use a resistor in package
|
|
# 0603 or 0402 and solder it between R15 and R45:
|
|
# - one pad soldered with the pad of R15 connected to 3.3V (this
|
|
# is the pad of R15 closer to R45)
|
|
# - the other pad soldered with the nearest pad of R45.
|
|
#
|
|
# Date: 2011-11-18
|
|
# Author: Antonio Borneo <borneo.antonio@gmail.com>
|
|
|
|
|
|
# Modified boards has SRST on JTAG connector
|
|
set BOARD_HAS_SRST 1
|
|
source [find board/spear320cpu.cfg]
|