riscv-openocd/src
Andreas Kemnade e406f2b0dc efm32: correct erase address if bank->base != 0
Prepare for additional flash banks not located at address 0

Change-Id: I60b78c917f94fa52bf24df9e3315536f776eec84
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Reviewed-on: http://openocd.zylin.com/4440
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-11-18 08:22:18 +00:00
..
flash efm32: correct erase address if bank->base != 0 2018-11-18 08:22:18 +00:00
helper Add RISC-V support. 2018-07-24 13:07:26 +01:00
jtag jtag/bitq: array boundary overflow 2018-11-10 21:15:39 +00:00
pld Convert to non-recursive make 2016-12-08 16:23:10 +00:00
rtos rtos: check symbol list when updating uCOS-III 2018-10-16 11:59:11 +01:00
server Permit null target on TCL connection 2018-11-13 07:02:58 +00:00
svf svf: improve robustness when processing invalid SVF files 2018-03-13 08:41:21 +00:00
target target/image: Add support for S6 record in Motorola SREC files 2018-11-18 08:21:25 +00:00
transport configure: disable all drivers when zy1000 is enabled 2018-04-09 09:04:46 +01:00
xsvf Convert to non-recursive make 2016-12-08 16:23:10 +00:00
Makefile.am Convert to non-recursive make 2016-12-08 16:23:10 +00:00
hello.c Remove FSF address from GPL notices 2016-05-24 22:30:01 +01:00
hello.h Make #include guard naming consistent 2016-05-24 22:30:55 +01:00
main.c Remove FSF address from GPL notices 2016-05-24 22:30:01 +01:00
openocd.c armv8: valgrind memleak fixes 2018-04-10 09:13:02 +01:00
openocd.h Make #include guard naming consistent 2016-05-24 22:30:55 +01:00