385 lines
14 KiB
C
385 lines
14 KiB
C
/******************************************************************************
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*
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* Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the
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* distribution.
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*
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* Neither the name of Texas Instruments Incorporated nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************/
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#ifndef OPENOCD_LOADERS_FLASH_MSP432_DRIVERLIB_H
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#define OPENOCD_LOADERS_FLASH_MSP432_DRIVERLIB_H
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#include <stdint.h>
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#include <stdbool.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined(__MSP432E4X__)
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#include "msp432e4x.h"
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#elif defined(__MSP432P401X__)
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#include "msp432p401x.h"
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#elif defined(__MSP432P411X__)
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#include "msp432p411x.h"
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#else
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#error "Failed to match a device specific include file"
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#endif
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/* Structure type to access the System Control Block (SCB). */
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struct SCB_Type {
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volatile uint32_t CPUID; /* CPUID Base Register */
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volatile uint32_t ICSR; /* Interrupt Control and State Register */
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volatile uint32_t VTOR; /* Vector Table Offset Register */
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volatile uint32_t AIRCR; /* Application Interrupt and Reset Control */
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volatile uint32_t SCR; /* System Control Register */
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volatile uint32_t CCR; /* Configuration Control Register */
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volatile uint8_t SHP[12U]; /* System Handlers Priority Registers */
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volatile uint32_t SHCSR; /* System Handler Control and State */
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volatile uint32_t CFSR; /* Configurable Fault Status Register */
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volatile uint32_t HFSR; /* HardFault Status Register */
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volatile uint32_t DFSR; /* Debug Fault Status Register */
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volatile uint32_t MMFAR; /* MemManage Fault Address Register */
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volatile uint32_t BFAR; /* BusFault Address Register */
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volatile uint32_t AFSR; /* Auxiliary Fault Status Register */
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volatile uint32_t PFR[2U]; /* Processor Feature Register */
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volatile uint32_t DFR; /* Debug Feature Register */
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volatile uint32_t ADR; /* Auxiliary Feature Register */
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volatile uint32_t MMFR[4U]; /* Memory Model Feature Register */
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volatile uint32_t ISAR[5U]; /* Instruction Set Attributes Register */
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uint32_t RESERVED0[5U];
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volatile uint32_t CPACR; /* Coprocessor Access Control Register */
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};
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/* SCB:SCR register bits */
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#define SCB_SCR_SLEEPDEEP_POS 2U
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#define SCB_SCR_SLEEPDEEP_MSK (1UL << SCB_SCR_SLEEPDEEP_POS)
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/* Memory mapping of Core Hardware */
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#define SCS_BASE (0xE000E000UL) /* System Control Space Base Address */
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#define SCB_BASE (SCS_BASE + 0x0D00UL) /* System Control Block Base Address */
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#define SCB ((struct SCB_Type *)SCB_BASE) /* SCB configuration struct */
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/* Definitions of standard bits */
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#define BIT0 (uint16_t)(0x0001)
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#define BIT1 (uint16_t)(0x0002)
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#define BIT2 (uint16_t)(0x0004)
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#define BIT3 (uint16_t)(0x0008)
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#define BIT4 (uint16_t)(0x0010)
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#define BIT5 (uint16_t)(0x0020)
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#define BIT6 (uint16_t)(0x0040)
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#define BIT7 (uint16_t)(0x0080)
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#define BIT8 (uint16_t)(0x0100)
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#define BIT9 (uint16_t)(0x0200)
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#define BITA (uint16_t)(0x0400)
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#define BITB (uint16_t)(0x0800)
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#define BITC (uint16_t)(0x1000)
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#define BITD (uint16_t)(0x2000)
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#define BITE (uint16_t)(0x4000)
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#define BITF (uint16_t)(0x8000)
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#define BIT(x) ((uint16_t)1 << (x))
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/* CPU Module prototypes */
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extern uint32_t cpu_cpsid(void);
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extern void cpu_wfi(void);
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/* Clock Signal Module constants */
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#define CS_DCO_FREQUENCY_3 CS_CTL0_DCORSEL_1
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#define CS_DCO_FREQUENCY_24 CS_CTL0_DCORSEL_4
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/* Power Control Module constants */
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#define PCM_KEY 0x695A0000
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#define PCM_AM_LDO_VCORE0 0x00
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#define PCM_AM_LDO_VCORE1 0x01
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#define PCM_AM_DCDC_VCORE0 0x04
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#define PCM_AM_DCDC_VCORE1 0x05
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#define PCM_AM_LF_VCORE0 0x08
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#define PCM_AM_LF_VCORE1 0x09
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#define PCM_LPM0_LDO_VCORE0 0x10
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#define PCM_LPM0_LDO_VCORE1 0x11
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#define PCM_LPM0_DCDC_VCORE0 0x14
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#define PCM_LPM0_DCDC_VCORE1 0x15
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#define PCM_LPM0_LF_VCORE0 0x18
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#define PCM_LPM0_LF_VCORE1 0x19
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#define PCM_LPM3 0x20
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#define PCM_LPM4 0x21
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#define PCM_LPM35_VCORE0 0xC0
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#define PCM_LPM45 0xA0
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#define PCM_VCORE0 0x00
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#define PCM_VCORE1 0x01
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#define PCM_VCORELPM3 0x02
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#define PCM_LDO_MODE 0x00
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#define PCM_DCDC_MODE 0x01
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#define PCM_LF_MODE 0x02
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/* Power Control Module prototypes */
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extern bool pcm_set_core_voltage_level(uint_fast8_t voltage_level);
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extern uint8_t pcm_get_core_voltage_level(void);
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extern bool pcm_set_power_mode(uint_fast8_t power_mode);
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extern uint8_t pcm_get_power_mode(void);
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extern bool pcm_set_power_state(uint_fast8_t power_state);
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extern uint8_t pcm_get_power_state(void);
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extern bool pcm_shutdown_device(uint32_t shutdown_mode);
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extern bool pcm_goto_lpm0(void);
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extern bool pcm_goto_lpm3(void);
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extern bool pcm_goto_lpm4(void);
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/* ROM API Function Pointers */
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#define ROM_API_TABLE ((unsigned long *)0x02000800)
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#define ROM_FLASH_CTL_TABLE ((unsigned long *)(ROM_API_TABLE[7]))
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#define ROM_PCM_TABLE ((unsigned long *)(ROM_API_TABLE[13]))
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#define ROM_WDT_TABLE ((unsigned long *)(ROM_API_TABLE[25]))
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#define ROM_SYS_CTL_A_TABLE ((unsigned long *)(ROM_API_TABLE[26]))
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#define ROM_FLASH_CTL_A_TABLE ((unsigned long *)(ROM_API_TABLE[27]))
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#if defined(__MSP432P401X__)
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#define ROM_FLASH_CTL_UNPROTECT_SECTOR \
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((bool (*)(uint_fast8_t memory_space, \
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uint32_t sector_mask))ROM_FLASH_CTL_TABLE[4])
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#endif
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#if defined(__MSP432P401X__)
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#define ROM_FLASH_CTL_PROTECT_SECTOR \
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((bool (*)(uint_fast8_t memory_space, \
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uint32_t sector_mask))ROM_FLASH_CTL_TABLE[5])
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#endif
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#if defined(__MSP432P401X__)
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#define ROM_FLASH_CTL_PERFORM_MASS_ERASE \
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((bool (*)(void))ROM_FLASH_CTL_TABLE[8])
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#endif
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#if defined(__MSP432P401X__)
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#define ROM_FLASH_CTL_ERASE_SECTOR \
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((bool (*)(uint32_t addr))ROM_FLASH_CTL_TABLE[9])
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#endif
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#if defined(__MSP432P401X__)
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#define ROM_FLASH_CTL_PROGRAM_MEMORY \
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((bool (*)(void *src, void *dest, uint32_t length))ROM_FLASH_CTL_TABLE[10])
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#endif
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#if defined(__MSP432P401X__)
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#define ROM_FLASH_CTL_SET_WAIT_STATE \
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((void (*)(uint32_t bank, uint32_t wait_state))ROM_FLASH_CTL_TABLE[21])
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#endif
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#if defined(__MSP432P401X__)
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#define ROM_FLASH_CTL_GET_WAIT_STATE \
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((uint32_t (*)(uint32_t bank))ROM_FLASH_CTL_TABLE[22])
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#endif
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#if defined(__MSP432P401X__)
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#define ROM_PCM_SET_CORE_VOLTAGE_LEVEL \
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((bool (*)(uint_fast8_t voltage_level))ROM_PCM_TABLE[0])
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#endif
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#if defined(__MSP432P401X__)
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#define ROM_PCM_GET_CORE_VOLTAGE_LEVEL \
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((uint8_t (*)(void))ROM_PCM_TABLE[1])
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#endif
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#if defined(__MSP432P401X__)
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#define ROM_PCM_SET_POWER_STATE \
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((bool (*)(uint_fast8_t power_state))ROM_PCM_TABLE[6])
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#endif
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#if defined(__MSP432P401X__)
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#define ROM_PCM_GET_POWER_STATE \
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((uint8_t (*)(void))ROM_PCM_TABLE[8])
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#endif
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#if defined(__MSP432P401X__) || defined(__MSP432P411X__)
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#define ROM_WDT_A_HOLD_TIMER \
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((void (*)(void))ROM_WDT_TABLE[0])
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#endif
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#if defined(__MSP432P411X__)
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#define ROM_SYS_CTL_A_GET_FLASH_SIZE \
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((uint_least32_t (*)(void))ROM_SYS_CTL_A_TABLE[1])
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#endif
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#if defined(__MSP432P411X__)
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#define ROM_SYS_CTL_A_GET_INFO_FLASH_SIZE \
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((uint_least32_t (*)(void))ROM_SYS_CTL_A_TABLE[18])
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#endif
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#if defined(__MSP432P411X__)
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#define ROM_FLASH_CTL_A_UNPROTECT_MEMORY \
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((bool (*)(uint32_t start_addr, uint32_t end_addr))ROM_FLASH_CTL_A_TABLE[4])
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#endif
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#if defined(__MSP432P411X__)
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#define ROM_FLASH_CTL_A_PROTECT_MEMORY \
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((bool (*)(uint32_t start_addr, uint32_t end_addr))ROM_FLASH_CTL_A_TABLE[5])
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#endif
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#if defined(__MSP432P411X__)
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#define ROM_FLASH_CTL_A_PERFORM_MASS_ERASE \
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((bool (*)(void))ROM_FLASH_CTL_A_TABLE[8])
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#endif
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#if defined(__MSP432P411X__)
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#define ROM_FLASH_CTL_A_ERASE_SECTOR \
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((bool (*)(uint32_t addr))ROM_FLASH_CTL_A_TABLE[9])
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#endif
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#if defined(__MSP432P411X__)
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#define ROM_FLASH_CTL_A_PROGRAM_MEMORY \
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((bool (*)(void *src, void *dest, uint32_t length)) \
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ROM_FLASH_CTL_A_TABLE[10])
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#endif
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#if defined(__MSP432P411X__)
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#define ROM_FLASH_CTL_A_SET_WAIT_STATE \
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((void (*)(uint32_t bank, uint32_t wait_state))ROM_FLASH_CTL_A_TABLE[21])
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#endif
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#if defined(__MSP432P411X__)
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#define ROM_FLASH_CTL_A_GET_WAIT_STATE \
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((uint32_t (*)(uint32_t bank))ROM_FLASH_CTL_A_TABLE[22])
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#endif
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/* Map API functions to ROM or locally built functions */
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#ifdef ROM_FLASH_CTL_UNPROTECT_SECTOR
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#define MAP_FLASH_CTL_UNPROTECT_SECTOR ROM_FLASH_CTL_UNPROTECT_SECTOR
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#else
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#define MAP_FLASH_CTL_UNPROTECT_SECTOR flash_ctl_unprotect_sector
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#endif
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#ifdef ROM_FLASH_CTL_PROTECT_SECTOR
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#define MAP_FLASH_CTL_PROTECT_SECTOR ROM_FLASH_CTL_PROTECT_SECTOR
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#else
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#define MAP_FLASH_CTL_PROTECT_SECTOR flash_ctl_protect_sector
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#endif
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#ifdef ROM_FLASH_CTL_PERFORM_MASS_ERASE
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#define MAP_FLASH_CTL_PERFORM_MASS_ERASE ROM_FLASH_CTL_PERFORM_MASS_ERASE
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#else
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#define MAP_FLASH_CTL_PERFORM_MASS_ERASE flash_ctl_perform_mass_erase
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#endif
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#ifdef ROM_FLASH_CTL_ERASE_SECTOR
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#define MAP_FLASH_CTL_ERASE_SECTOR ROM_FLASH_CTL_ERASE_SECTOR
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#else
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#define MAP_FLASH_CTL_ERASE_SECTOR flash_ctl_erase_sector
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#endif
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#ifdef ROM_FLASH_CTL_PROGRAM_MEMORY
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#define MAP_FLASH_CTL_PROGRAM_MEMORY ROM_FLASH_CTL_PROGRAM_MEMORY
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#else
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#define MAP_FLASH_CTL_PROGRAM_MEMORY flash_ctl_program_memory
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#endif
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#ifdef ROM_FLASH_CTL_SET_WAIT_STATE
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#define MAP_FLASH_CTL_SET_WAIT_STATE ROM_FLASH_CTL_SET_WAIT_STATE
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#else
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#define MAP_FLASH_CTL_SET_WAIT_STATE flash_ctl_set_wait_state
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#endif
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#ifdef ROM_FLASH_CTL_GET_WAIT_STATE
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#define MAP_FLASH_CTL_GET_WAIT_STATE ROM_FLASH_CTL_GET_WAIT_STATE
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#else
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#define MAP_FLASH_CTL_GET_WAIT_STATE flash_ctl_get_wait_state
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#endif
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#ifdef ROM_PCM_SET_CORE_VOLTAGE_LEVEL
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#define MAP_PCM_SET_CORE_VOLTAGE_LEVEL ROM_PCM_SET_CORE_VOLTAGE_LEVEL
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#else
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#define MAP_PCM_SET_CORE_VOLTAGE_LEVEL pcm_set_core_voltage_level
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#endif
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#ifdef ROM_PCM_GET_CORE_VOLTAGE_LEVEL
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#define MAP_PCM_GET_CORE_VOLTAGE_LEVEL ROM_PCM_GET_CORE_VOLTAGE_LEVEL
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#else
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#define MAP_PCM_GET_CORE_VOLTAGE_LEVEL pcm_get_core_voltage_level
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#endif
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#ifdef ROM_PCM_SET_POWER_STATE
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#define MAP_PCM_SET_POWER_STATE ROM_PCM_SET_POWER_STATE
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#else
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#define MAP_PCM_SET_POWER_STATE pcm_set_power_state
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#endif
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#ifdef ROM_PCM_GET_POWER_STATE
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#define MAP_PCM_GET_POWER_STATE ROM_PCM_GET_POWER_STATE
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#else
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#define MAP_PCM_GET_POWER_STATE pcm_get_power_state
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#endif
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#ifdef ROM_WDT_A_HOLD_TIMER
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#define MAP_WDT_A_HOLD_TIMER ROM_WDT_A_HOLD_TIMER
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#else
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#define MAP_WDT_A_HOLD_TIMER wdt_a_hold_timer
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#endif
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#ifdef ROM_SYS_CTL_A_GET_FLASH_SIZE
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#define MAP_SYS_CTL_A_GET_FLASH_SIZE ROM_SYS_CTL_A_GET_FLASH_SIZE
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#else
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#define MAP_SYS_CTL_A_GET_FLASH_SIZE sys_ctl_a_get_flash_size
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#endif
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#ifdef ROM_SYS_CTL_A_GET_INFO_FLASH_SIZE
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#define MAP_SYS_CTL_A_GET_INFO_FLASH_SIZE ROM_SYS_CTL_A_GET_INFO_FLASH_SIZE
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#else
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#define MAP_SYS_CTL_A_GET_INFO_FLASH_SIZE sys_ctl_a_get_info_flash_size
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#endif
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#ifdef ROM_FLASH_CTL_A_UNPROTECT_MEMORY
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#define MAP_FLASH_CTL_A_UNPROTECT_MEMORY ROM_FLASH_CTL_A_UNPROTECT_MEMORY
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#else
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#define MAP_FLASH_CTL_A_UNPROTECT_MEMORY flash_ctl_a_unprotect_memory
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#endif
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#ifdef ROM_FLASH_CTL_A_PROTECT_MEMORY
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#define MAP_FLASH_CTL_A_PROTECT_MEMORY ROM_FLASH_CTL_A_PROTECT_MEMORY
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#else
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#define MAP_FLASH_CTL_A_PROTECT_MEMORY flash_ctl_a_protect_memory
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#endif
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#ifdef ROM_FLASH_CTL_A_PERFORM_MASS_ERASE
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#define MAP_FLASH_CTL_A_PERFORM_MASS_ERASE ROM_FLASH_CTL_A_PERFORM_MASS_ERASE
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#else
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#define MAP_FLASH_CTL_A_PERFORM_MASS_ERASE flash_ctl_a_perform_mass_erase
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#endif
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#ifdef ROM_FLASH_CTL_A_ERASE_SECTOR
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#define MAP_FLASH_CTL_A_ERASE_SECTOR ROM_FLASH_CTL_A_ERASE_SECTOR
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#else
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#define MAP_FLASH_CTL_A_ERASE_SECTOR flash_ctl_a_erase_sector
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#endif
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#ifdef ROM_FLASH_CTL_A_PROGRAM_MEMORY
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#define MAP_FLASH_CTL_A_PROGRAM_MEMORY ROM_FLASH_CTL_A_PROGRAM_MEMORY
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#else
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#define MAP_FLASH_CTL_A_PROGRAM_MEMORY flash_ctl_a_program_memory
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#endif
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#ifdef ROM_FLASH_CTL_A_SET_WAIT_STATE
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#define MAP_FLASH_CTL_A_SET_WAIT_STATE ROM_FLASH_CTL_A_SET_WAIT_STATE
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#else
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#define MAP_FLASH_CTL_A_SET_WAIT_STATE flash_ctl_a_set_wait_state
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#endif
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#ifdef ROM_FLASH_CTL_A_GET_WAIT_STATE
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#define MAP_FLASH_CTL_A_GET_WAIT_STATE ROM_FLASH_CTL_A_GET_WAIT_STATE
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#else
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#define MAP_FLASH_CTL_A_GET_WAIT_STATE flash_ctl_a_get_wait_state
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#endif
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/* Real Time Clock Module prototypes */
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extern void rtc_c_hold_clock(void);
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/* Watchdog Timer Module prototypes */
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extern void wdt_a_hold_timer(void);
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#if defined(__MCU_HAS_FLCTL_A__)
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#define FLASH_A_BANK0 0x00
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#define FLASH_A_BANK1 0x01
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#define __INFO_FLASH_A_TECH_START__ 0x00200000
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#define __INFO_FLASH_A_TECH_MIDDLE__ 0x00204000
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#endif
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#if defined(__MCU_HAS_FLCTL__)
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#define FLASH_BANK0 0x00
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#define FLASH_BANK1 0x01
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#define FLASH_MAIN_MEMORY_SPACE_BANK0 0x01
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#define FLASH_MAIN_MEMORY_SPACE_BANK1 0x02
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#define FLASH_INFO_MEMORY_SPACE_BANK0 0x03
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#define FLASH_INFO_MEMORY_SPACE_BANK1 0x04
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#define FLASH_SECTOR0 FLCTL_BANK0_MAIN_WEPROT_PROT0
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#define FLASH_SECTOR1 FLCTL_BANK0_MAIN_WEPROT_PROT1
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* OPENOCD_LOADERS_FLASH_MSP432_DRIVERLIB_H */
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