riscv-openocd/tcl
Erhan Kurubas bea4d65903 target/espressif: add semihosting support
ARM semihosting + some custom syscalls implemented for
Espressif chips (ESP32, ESP32-S2, ESP32-S3)

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: Ic8174cf1cd344fa16d619b7b8405c9650e869443
Reviewed-on: https://review.openocd.org/c/openocd/+/7074
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-09-03 21:27:17 +00:00
..
board Generic Xtensa target config files 2022-08-20 15:39:05 +00:00
chip tcl: add SPDX tag 2022-06-24 21:54:12 +00:00
cpld tcl: add SPDX tag 2022-06-24 21:54:12 +00:00
cpu tcl: add SPDX tag 2022-06-24 21:54:12 +00:00
fpga tcl/fpga: add Lattice MachXO3 family support 2022-08-20 15:29:50 +00:00
interface Generic Xtensa target config files 2022-08-20 15:39:05 +00:00
target target/espressif: add semihosting support 2022-09-03 21:27:17 +00:00
test tcl: add SPDX tag 2022-06-24 21:54:12 +00:00
tools tcl: add SPDX tag 2022-06-24 21:54:12 +00:00
bitsbytes.tcl tcl: add SPDX tag 2022-06-24 21:54:12 +00:00
mem_helper.tcl tcl: add SPDX tag 2022-06-24 21:54:12 +00:00
memory.tcl tcl: add SPDX tag 2022-06-24 21:54:12 +00:00
mmr_helpers.tcl tcl: add SPDX tag 2022-06-24 21:54:12 +00:00