riscv-openocd/tcl/target/geehy/apm32f0x.cfg

50 lines
1.1 KiB
INI

# SPDX-License-Identifier: GPL-2.0-or-later
#
# Geehy APM32F0x target
#
# https://global.geehy.com/MCU
#
#
# APM32F0x devices support SWD transport only.
#
source [find target/swj-dp.tcl]
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME apm32f0x
}
# Work-area is a space in RAM used for flash programming, by default use 1 KiB.
if { [info exists WORKAREASIZE] } {
set _WORKAREASIZE $WORKAREASIZE
} else {
set _WORKAREASIZE 0x400
}
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x0bc11477
}
swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -endian little -dap $_CHIPNAME.dap
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stm32f1x 0x08000000 0 0 0 $_TARGETNAME
adapter speed 1000
if {![using_hla]} {
# if srst is not fitted use SYSRESETREQ to perform a soft reset.
cortex_m reset_config sysresetreq
}