riscv-openocd/tcl/target/bluefield.cfg

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2.0 KiB
INI

# SPDX-License-Identifier: GPL-2.0-or-later
# BlueField SoC Target
set _CHIPNAME bluefield
# Specify the target device
#rshim device /dev/rshim0/rshim
# Main DAP
if { [info exists DAP_TAPID] } {
set _DAP_TAPID $DAP_TAPID
} else {
set _DAP_TAPID 0x4ba00477
}
adapter speed 1500
swd newdap $_CHIPNAME cpu -expected-id $_DAP_TAPID
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
# Initialize the target name and command variable.
set _TARGETNAME $_CHIPNAME.cpu
set _smp_command ""
# CTI relative address
set $_TARGETNAME.cti(0) 0xC4020000
set $_TARGETNAME.cti(1) 0xC4120000
set $_TARGETNAME.cti(2) 0xC8020000
set $_TARGETNAME.cti(3) 0xC8120000
set $_TARGETNAME.cti(4) 0xCC020000
set $_TARGETNAME.cti(5) 0xCC120000
set $_TARGETNAME.cti(6) 0xD0020000
set $_TARGETNAME.cti(7) 0xD0120000
set $_TARGETNAME.cti(8) 0xD4020000
set $_TARGETNAME.cti(9) 0xD4120000
set $_TARGETNAME.cti(10) 0xD8020000
set $_TARGETNAME.cti(11) 0xD8120000
set $_TARGETNAME.cti(12) 0xDC020000
set $_TARGETNAME.cti(13) 0xDC120000
set $_TARGETNAME.cti(14) 0xE0020000
set $_TARGETNAME.cti(15) 0xE0120000
# Create debug targets for a number of cores starting from core '_core_start'.
# Adjust the numbers according to board configuration.
set _core_start 0
set _cores 16
# Create each core
for { set _core $_core_start } { $_core < $_core_start + $_cores } { incr _core 1 } {
cti create cti$_core -dap $_CHIPNAME.dap -baseaddr [set $_TARGETNAME.cti($_core)] -ap-num 0
set _command "target create ${_TARGETNAME}$_core aarch64 \
-dap $_CHIPNAME.dap -coreid $_core -cti cti$_core"
if { $_core != $_core_start } {
set _smp_command "$_smp_command ${_TARGETNAME}$_core"
} else {
set _smp_command "target smp ${_TARGETNAME}$_core"
}
eval $_command
}
# Configure SMP
if { $_cores > 1 } {
eval $_smp_command
}
# Make sure the default target is the boot core
targets ${_TARGETNAME}0
proc core_up { args } {
global _TARGETNAME
# Examine remaining cores
foreach _core $args {
${_TARGETNAME}$_core arp_examine
}
}