riscv-openocd/tcl/board/arm_musca_a.cfg

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INI

# SPDX-License-Identifier: GPL-2.0-or-later
#
# Configuration script for ARM Musca-A development board
#
# For now we do not support Musca A flash programming using OpenOCD. However, a
# work area is configured for flash programming speed up.
#
# GDB considers all memory as RAM unless target supplies a memory map.
# OpenOCD will only send memory map if flash banks are configured. Otherwise,
# configure GDB after connection by issuing following commands:
# (gdb) mem 0x10200000 0x109FFFFF ro
# (gdb) mem 0x00200000 0x009FFFFF ro
# (gdb) set mem inaccessible-by-default off
# ARM Musca A board supports both JTAG and SWD transports.
source [find target/swj-dp.tcl]
# set a safe JTAG clock speed, can be overridden
adapter speed 1000
global _CHIPNAME
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME MUSCA_A
}
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x6ba00477
}
# Enable CPU1 debugging as a separate GDB target
set _ENABLE_CPU1 1
# Musca A1 has 32KB SRAM banks. Override default work-area-size to 8KB per CPU
set WORKAREASIZE_CPU0 0x2000
set WORKAREASIZE_CPU1 0x2000
# Set SRAM bank 1 to be used for work area. Override here if needed.
set WORKAREAADDR_CPU0 0x30008000
set WORKAREAADDR_CPU1 0x3000A000
source [find target/arm_corelink_sse200.cfg]