66 lines
1.6 KiB
INI
66 lines
1.6 KiB
INI
#
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# Cypress PSoC 5LP
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#
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source [find target/swj-dp.tcl]
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME psoc5lp
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}
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if { [info exists CPUTAPID] } {
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set _CPU_TAPID $CPUTAPID
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} else {
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set _CPU_TAPID 0x4BA00477
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}
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if { [using_jtag] } {
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set _CPU_DAP_ID $_CPU_TAPID
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} else {
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set _CPU_DAP_ID 0x2ba01477
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}
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swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPU_DAP_ID
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dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
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if { [info exists WORKAREASIZE] } {
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set _WORKAREASIZE $WORKAREASIZE
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} else {
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set _WORKAREASIZE 0x2000
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}
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$_TARGETNAME configure -work-area-phys [expr 0x20000000 - $_WORKAREASIZE / 2] \
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-work-area-size $_WORKAREASIZE -work-area-backup 0
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source [find mem_helper.tcl]
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$_TARGETNAME configure -event reset-init {
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# Configure Target Device (PSoC 5LP Device Programming Specification 5.2)
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set PANTHER_DBG_CFG 0x4008000C
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set PANTHER_DBG_CFG_BYPASS [expr 1 << 1]
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mmw $PANTHER_DBG_CFG $PANTHER_DBG_CFG_BYPASS 0
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set PM_ACT_CFG0 0x400043A0
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mww $PM_ACT_CFG0 0xBF
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set FASTCLK_IMO_CR 0x40004200
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set FASTCLK_IMO_CR_F_RANGE_2 [expr 2 << 0]
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set FASTCLK_IMO_CR_F_RANGE_MASK [expr 7 << 0]
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mmw $FASTCLK_IMO_CR $FASTCLK_IMO_CR_F_RANGE_2 $FASTCLK_IMO_CR_F_RANGE_MASK
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}
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME psoc5lp 0x00000000 0 0 0 $_TARGETNAME
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flash bank $_CHIPNAME.eeprom psoc5lp_eeprom 0x40008000 0 0 0 $_TARGETNAME
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flash bank $_CHIPNAME.nvl psoc5lp_nvl 0 0 0 0 $_TARGETNAME
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if {![using_hla]} {
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cortex_m reset_config sysresetreq
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}
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