source [find target/at91sam7a2.cfg]

# delays needed to get stable reads of cpu state
jtag_ntrst_delay 10
adapter srst delay 200

# board uses pullup and connects only srst
reset_config srst_open_drain

# srst is connected to NRESET of CPU and fully resets everything...
reset_config srst_only srst_pulls_trst

adapter speed 1
$_TARGETNAME configure -event reset-start {
	adapter speed 1
}

$_TARGETNAME configure -event reset-init {
	# init script from http://www.mikrocontroller.net/topic/107462
	# AT91SAM7A2
	# AMC (advanced memory controller)

	echo "setting up AMC"
	# AMC_CS0 - FLASH 1MB (0x40000000-0x400FFFFF) + DM9000E (0x40100000)
	mww 0xFFE00000 0x40003EBD

	# AMC_CS1 - RAM low 2MB (0x40400000-0x405FFFFF)
	mww 0xFFE00004 0x404030A9

	# AMC_CS2 - RAM high 2MB (0x40800000-0x405FFFFF)
	#mww 0xFFE00008 0x404030A9
	# changed to  0x40_8_
	mww 0xFFE00008 0x408030A9

	# AMC_MCR
	mww 0xFFE00024 0x00000004

	# AMC_RCR force remap
	mww 0xFFE00020 0x00000001

	echo "set up AMC"
	sleep 100

	# the following base addresses from the original script did not correspond to those from datasheet
	# changed bases from 0xFF000000 to 0xFFF00000

	# disable watchdog, to prevent unwanted resets
	mww 0xFFFA0068 0x00000000
	echo "disabled watchdog"

	sleep 50

	# disable PLL
	mww 0xFFFEC004 0x18070004

	# PLL = 10 ==> Coreclock = 6Mhz*10/2 = 30 Mhz
	mww 0xFFFEC010 0x762D800A

	# enable PLL
	mww 0xFFFEC000 0x23050004
	echo "set up pll"

	sleep 100
	adapter speed 5000
}

$_TARGETNAME arm7_9 dcc_downloads enable
$_TARGETNAME arm7_9 fast_memory_access enable

# remap:  ram at 0, flash at 0x40000000, like reset-init above does
$_TARGETNAME configure -work-area-phys 0x00000000 -work-area-size 0x4000 -work-area-backup 1
flash bank onboard.flash cfi 0x40000000 0x00100000 2 2 at91sam7a2.cpu

# boot: ram at 0x300000, flash at 0x0, useful if board is in funny configuration
#$_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x4000 -work-area-backup 1
#flash bank onboard1.flash cfi 0x00000000 0x00100000 2 2 at91sam7a2.cpu