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Author SHA1 Message Date
Tim Newsome c05e4c5a2a jtag/drivers/xds110: Fix compiler warning.
Compiler would complain that `written` was used without being
initialized.

Signed-off-by: Tim Newsome <tim@sifive.com>
Change-Id: Ibada85dcccfca6f1269c584cdbc4f2e3b93bb8f3
2023-07-13 13:13:55 -07:00
687 changed files with 16587 additions and 53630 deletions

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@ -17,6 +17,7 @@
--ignore LINE_SPACING
--ignore LOGICAL_CONTINUATIONS
--ignore MACRO_WITH_FLOW_CONTROL
--ignore NEW_TYPEDEFS
--ignore PARENTHESIS_ALIGNMENT
--ignore PREFER_DEFINED_ATTRIBUTE_MACRO
--ignore PREFER_FALLTHROUGH

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@ -1,26 +0,0 @@
on: pull_request
name: Check Code Style (checkpatch)
jobs:
check:
runs-on: ubuntu-latest
env:
DL_DIR: ../downloads
BUILD_DIR: ../build
steps:
- name: Checkout Code
uses: actions/checkout@v4
with:
fetch-depth: 0
- name: Checkout Base
run: |
git fetch origin ${{ github.event.pull_request.base.ref }}
echo "The current base for checkpatch is: $(git show FETCH_HEAD --oneline --raw)"
- name: Install required packages (apt-get)
run: |
sudo apt-get update
sudo apt-get install patchutils python3-ply python3-git
- name: Run checkpatch
run: |
./tools/scripts/checkpatch.pl --no-signoff --git FETCH_HEAD..HEAD

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@ -1,82 +0,0 @@
on: pull_request
name: Linux Build
jobs:
# 32-bit, clang
build32:
runs-on: ubuntu-20.04
env:
CFLAGS: -m32
CC: clang
PKG_CONFIG_PATH: /opt/libjim32/lib/pkgconfig
steps:
- name: Install required packages (apt-get)
run: |
sudo apt-get update
sudo apt-get install clang gcc-multilib
- name: Get 32-bit JIM TCL from cache
id: cache-libjim32
uses: actions/cache@v4
with:
path: /opt/libjim32
key: libjim32
- if: ${{ steps.cache-libjim32.outputs.cache-hit != 'true' }}
name: Checkout JIM TCL
uses: actions/checkout@v4
with:
repository: msteveb/jimtcl
ref: 0.83
path: jimtcl
- if: ${{ steps.cache-libjim32.outputs.cache-hit != 'true' }}
name: Build 32-bit JIM TCL from source
run: |
cd jimtcl
./configure --prefix=/opt/libjim32 --with-ext=json --minimal --disable-ssl
make -j`nproc`
make install
- name: Checkout Code
uses: actions/checkout@v4
- run: ./bootstrap
- run: ./configure --enable-remote-bitbang --enable-jtag_vpi --disable-target64
- run: make -j`nproc`
- run: file src/openocd | grep 32-bit
- run: src/openocd --version
# 64-bit, gcc
build64:
runs-on: ubuntu-latest
env:
CFLAGS: -m64
CC: gcc
steps:
- name: Checkout Code
uses: actions/checkout@v4
- name: Configure environment
run: |
TAG=$(git rev-parse --short HEAD)
echo "TAG=$TAG" >> $GITHUB_OUTPUT
echo "NAME=openocd64-$TAG" >> $GITHUB_ENV
- name: Install required packages (apt-get)
run: |
sudo apt-get update
sudo apt-get install libusb-1.0-0 libusb-1.0-0-dev libjim-dev
- run: ./bootstrap
- run: ./configure --enable-remote-bitbang --enable-jtag_vpi --enable-ftdi-cjtag --prefix /tmp/${{ env.NAME }}
- run: make -j`nproc`
- name: Check that we built something
run: |
file src/openocd | grep 64-bit
src/openocd --version
- name: Package
# Package into tgz so that github stores a compressed artifact, even
# though it zips that artifact again before it sends it back to be
# downloaded.
run: |
make install
tar zcvf ${{ env.NAME }}.tgz -C /tmp ${{ env.NAME }}
- name: Upload Artifact
uses: actions/upload-artifact@v4
with:
name: ${{ env.NAME }}
path: ${{ env.NAME }}.tgz

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@ -18,7 +18,7 @@ jobs:
sudo apt-get update
sudo apt-get install autotools-dev autoconf automake libtool pkg-config cmake texinfo texlive g++-mingw-w64-i686
- name: Checkout Code
uses: actions/checkout@v4
uses: actions/checkout@v1
- run: ./bootstrap
- name: Prepare libusb1
env:
@ -66,14 +66,6 @@ jobs:
cd libjaylink-${LIBJAYLINK_VER}
./autogen.sh
echo "LIBJAYLINK_SRC=$PWD" >> $GITHUB_ENV
- name: Prepare jimtcl
env:
JIMTCL_VER: 0.83
run: |
mkdir -p $DL_DIR && cd $DL_DIR
wget https://github.com/msteveb/jimtcl/archive/refs/tags/${JIMTCL_VER}.tar.gz
tar -xzf ${JIMTCL_VER}.tar.gz
echo "JIMTCL_SRC=$PWD/jimtcl-${JIMTCL_VER}" >> $GITHUB_ENV
- name: Package OpenOCD for windows
env:
MAKE_JOBS: 2
@ -83,7 +75,6 @@ jobs:
LIBFTDI_CONFIG: -DSTATICLIBS=OFF -DEXAMPLES=OFF -DFTDI_EEPROM=OFF
CAPSTONE_CONFIG: "CAPSTONE_BUILD_CORE_ONLY=yes CAPSTONE_STATIC=yes CAPSTONE_SHARED=no"
LIBJAYLINK_CONFIG: --enable-shared --disable-static
JIMTCL_CONFIG: --with-ext=json --minimal --disable-ssl
run: |
# check if there is tag pointing at HEAD, otherwise take the HEAD SHA-1 as OPENOCD_TAG
OPENOCD_TAG="`git tag --points-at HEAD`"
@ -111,11 +102,11 @@ jobs:
echo "IS_PRE_RELEASE=$IS_PRE_RELEASE" >> $GITHUB_ENV
echo "ARTIFACT_PATH=$PWD/$ARTIFACT" >> $GITHUB_ENV
- name: Publish OpenOCD packaged for windows
uses: actions/upload-artifact@v4
uses: actions/upload-artifact@v3
with:
path: ${{ env.ARTIFACT_PATH }}
- name: Delete 'latest' Release
uses: dev-drprasad/delete-tag-and-release@v1.1
uses: dev-drprasad/delete-tag-and-release@v0.2.1
with:
delete_release: true
tag_name: ${{ env.RELEASE_NAME }}

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@ -1,136 +0,0 @@
# Build Spike and run a couple of debug tests.
name: Test OpenOCD against 2 spike configurations
env:
SPIKE_REPO: https://github.com/riscv-software-src/riscv-isa-sim.git
SPIKE_REV: master
RISCV_TESTS_REPO: https://github.com/riscv-software-src/riscv-tests.git
RISCV_TESTS_REV: master
TOOLCHAIN_URL: https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack/releases/download/v12.2.0-1/xpack-riscv-none-elf-gcc-12.2.0-1-linux-x64.tar.gz
on:
# Run on merges to master to populate the cache with entities that are
# accessible by every pull request.
push:
branches:
- riscv
pull_request:
types: [synchronize, opened, reopened]
# There is some commented out code below that would be useful in adding this
# workflow to other repos. Ideally we can come up with something that would
# leave this file almost identical between repos, so they can all easily run
# this test suite.
jobs:
test:
name: Test debug (Ubuntu)
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v4
- name: Install packages
run: |
sudo apt-get update
sudo apt-get install -y device-tree-compiler build-essential libjim-dev
- name: Get revisions of dependencies
run: |
SPIKE_COMMIT=$( git ls-remote "$SPIKE_REPO" master | awk '{ print $1; }' )
RISC_V_TESTS_COMMIT=$( git ls-remote "$RISCV_TESTS_REPO" master | awk '{ print $1; }' )
echo "Revison of Spike: $SPIKE_COMMIT"
echo "Revision of RISC-V tests: $RISC_V_TESTS_COMMIT"
# Save for later use
echo "SPIKE_COMMIT=$SPIKE_COMMIT" >> $GITHUB_ENV
echo "RISC_V_TESTS_COMMIT=$RISC_V_TESTS_COMMIT" >> $GITHUB_ENV
- name: Get the toolchain from cache (if available)
id: cache-toolchain
uses: actions/cache@v4
with:
path: /opt/riscv/toolchain
key: "toolchain-${{env.TOOLCHAIN_URL}}"
- name: Get spike from cache (if available)
id: cache-spike
uses: actions/cache@v4
with:
path: /opt/riscv/spike
key: "spike-${{env.SPIKE_COMMIT}}"
- if: ${{ steps.cache-toolchain.outputs.cache-hit != 'true' }}
name: Download Toolchain (if not cached)
run: |
mkdir -p /opt/riscv/toolchain
wget --progress=dot:giga $TOOLCHAIN_URL -O /tmp/toolchain.tar.gz
- if: ${{ steps.cache-toolchain.outputs.cache-hit != 'true' }}
name: Install Toolchain (if not cached)
run: tar zxf /tmp/toolchain.tar.gz --strip-components=1 -C /opt/riscv/toolchain
- if: ${{ steps.cache-spike.outputs.cache-hit != 'true' }}
name: Download Spike source (if not cached)
run: |
git clone "$SPIKE_REPO"
cd riscv-isa-sim
git checkout "$SPIKE_COMMIT"
git submodule update --init --recursive
- if: ${{ steps.cache-spike.outputs.cache-hit != 'true' }}
name: Build Spike (if not cached)
run: |
cd riscv-isa-sim
mkdir build && cd build
../configure --prefix=/opt/riscv/spike
make -j"$(nproc 2> /dev/null || sysctl -n hw.ncpu)"
make install
- name: Build OpenOCD
run: |
#cd riscv-openocd
./bootstrap
./configure --prefix=/opt/riscv
make -j"$(nproc 2> /dev/null || sysctl -n hw.ncpu)"
ls -l src/openocd
# - name: Download OpenOCD
# run: |
# git clone --recurse-submodules https://github.com/riscv/riscv-openocd.git
# cd riscv-openocd
# git checkout 43ea20dfbb6c815004a51106a3b2009d7f6c4940
- name: Download Tests
run: |
git clone "$RISCV_TESTS_REPO"
cd riscv-tests
git checkout "$RISCV_TESTS_REV"
git submodule update --init --recursive
- name: Run Spike32 Tests
id: spike32-tests
run: |
cd riscv-tests/debug
./gdbserver.py targets/RISC-V/spike32.py --print-failures \
--gcc /opt/riscv/toolchain/bin/riscv-none-elf-gcc \
--gdb /opt/riscv/toolchain/bin/riscv-none-elf-gdb \
--sim_cmd /opt/riscv/spike/bin/spike \
--server_cmd $GITHUB_WORKSPACE/src/openocd
- name: Run Spike64-2 Tests
if: success() || steps.spike32-tests.conclusion == 'failure'
run: |
cd riscv-tests/debug
./gdbserver.py targets/RISC-V/spike64-2.py --print-failures \
--gcc /opt/riscv/toolchain/bin/riscv-none-elf-gcc \
--gdb /opt/riscv/toolchain/bin/riscv-none-elf-gdb \
--sim_cmd /opt/riscv/spike/bin/spike \
--server_cmd $GITHUB_WORKSPACE/src/openocd
- name: Archive test logs
# Proceed even if there was a failed test
if: ${{ success() || failure() }}
uses: actions/upload-artifact@v4
with:
name: test-logs
path: riscv-tests/debug/logs

9
.gitignore vendored
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@ -11,9 +11,9 @@
*.la
*.in
# coverage files (gcov)
*.gcda
*.gcno
# generated source files
src/jtag/minidriver_imp.h
src/jtag/jtag_minidriver.h
# OpenULINK driver files generated by SDCC
src/jtag/drivers/OpenULINK/*.rel
@ -84,9 +84,6 @@ patches
.cproject
.settings
# VSCode stuff
.vscode
# Emacs temp files
*~

3
.gitmodules vendored
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@ -1,3 +1,6 @@
[submodule "tools/git2cl"]
path = tools/git2cl
url = https://git.savannah.nongnu.org/git/git2cl.git
[submodule "jimtcl"]
path = jimtcl
url = https://github.com/msteveb/jimtcl.git

14
AUTHORS
View File

@ -1,2 +1,12 @@
Please check the source code files and/or Git history for a list of all authors
and contributors.
Dominic Rath <Dominic.Rath@gmx.de>
Magnus Lundin <lundin@mlu.mine.nu>
Michael Fischer <fischermi@t-online.de>
Spencer Oliver <spen@spen-soft.co.uk>
Carsten Schlote <schlote@vahanus.net>
Øyvind Harboe <oyvind.harboe@zylin.com>
Duane Ellis <openocd@duaneellis.com>
Michael Schwingen <michael@schwingen.org>
Rick Altherr <kc8apf@users.berlios.de>
David Brownell <dbrownell@users.sourceforge.net>
Vincint Palatin <vpalatin@users.berlios.de>
Zachary T Welch <zw@superlucidity.net>

53
HACKING
View File

@ -77,32 +77,6 @@ patch:
src/openocd -s ../tcl -f /path/to/openocd.cfg
@endcode
- Runtime coverage testing
Apply the following patch to prevent OpenOCD from killing itself:
@code
--- a/src/openocd.c
+++ b/src/openocd.c
@@ -372,8 +372,6 @@ int openocd_main(int argc, char *argv[])
if (ERROR_FAIL == ret)
return EXIT_FAILURE;
- else if (ERROR_OK != ret)
- exit_on_signal(ret);
return ret;
}
@endcode
Configure your OpenOCD binary with coverage support as follows:
@code
LDFLAGS="-fprofile-arcs -ftest-coverage"
CFLAGS="-fprofile-arcs -ftest-coverage" ./configure
@endcode
Now every time OpenOCD is run, coverage info in your build directory is
updated. Running `gcov src/path/file.c` will generate a report.
- Sparse Static Analyzer
Using this tool allows identifying some bug in C code.
@ -118,22 +92,6 @@ patch:
make
@endcode
- Code coverage analysis
By inspecting the code coverage, you can identify potential gaps in your testing
and use that information to improve your test scenarios.
Example usage:
@code
mkdir build-gcov; cd build-gcov
../configure --enable-gcov [...]
make
# ... Now execute your test scenarios to collect OpenOCD code coverage ...
lcov --capture --directory ./src --output-file openocd-coverage.info
genhtml openocd-coverage.info --output-directory coverage_report
# ... Open coverage_report/index.html in a web browser ...
@endcode
Please consider performing these additional checks where appropriate
(especially Clang Static Analyzer for big portions of new code) and
mention the results (e.g. "Valgrind-clean, no new Clang analyzer
@ -197,6 +155,10 @@ topics. It is possible because @c for/master is not a traditional Git
branch.
-# You will need to install this hook, we will look into a better solution:
@code
scp -p -P 29418 USERNAME@review.openocd.org:hooks/commit-msg .git/hooks/
@endcode
Or with http only:
@code
wget https://review.openocd.org/tools/hooks/commit-msg
mv commit-msg .git/hooks
chmod +x .git/hooks/commit-msg
@ -329,13 +291,6 @@ Only for <em>exceptional cases</em>, it is allowed to submit patches
to Gerrit with the special field 'Checkpatch-ignore:' in the commit
message. This field will cause checkpatch to ignore the error types
listed in the field, only for the patch itself.
For errors in the commit message, the special field has to be put in
the commit message before the line that produces the error.
The special field must be added <em>before</em> the 'Signed-off-by:'
line, otherwise it is ignored.
To ignore multiple errors, either add multiple lines with the special
field or add multiple error types, separated by space or commas, in a
single line.
The error type is printed by checkpatch on failure.
For example the names of Windows APIs mix lower and upper case chars,
in violation of OpenOCD coding style, triggering a 'CAMELCASE' error:

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@ -173,6 +173,7 @@ OpenOCD, can be broken down into:
File format examples::
Valid-License-Identifier: GPL-2.0
Valid-License-Identifier: GPL-2.0-only
Valid-License-Identifier: GPL-2.0-or-later
SPDX-URL: https://spdx.org/licenses/GPL-2.0.html
@ -181,6 +182,8 @@ OpenOCD, can be broken down into:
tag/value pairs into a comment according to the placement
guidelines in the licensing rules documentation.
For 'GNU General Public License (GPL) version 2 only' use:
SPDX-License-Identifier: GPL-2.0
or
SPDX-License-Identifier: GPL-2.0-only
For 'GNU General Public License (GPL) version 2 or any later version' use:
SPDX-License-Identifier: GPL-2.0-or-later

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@ -1,130 +0,0 @@
Valid-License-Identifier: CC0-1.0
SPDX-URL: https://spdx.org/licenses/CC0-1.0.html
Usage-Guide:
To use the Creative Commons Zero v1.0 Universal License put the following
SPDX tag/value pair into a comment according to the placement guidelines in
the licensing rules documentation:
SPDX-License-Identifier: CC0-1.0
License-Text:
Creative Commons Legal Code
CC0 1.0 Universal
CREATIVE COMMONS CORPORATION IS NOT A LAW FIRM AND DOES NOT PROVIDE
LEGAL SERVICES. DISTRIBUTION OF THIS DOCUMENT DOES NOT CREATE AN
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THE USE OF THIS DOCUMENT OR THE INFORMATION OR WORKS PROVIDED
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View File

@ -1,3 +1,4 @@
Valid-License-Identifier: GPL-2.0
Valid-License-Identifier: GPL-2.0-only
Valid-License-Identifier: GPL-2.0-or-later
SPDX-URL: https://spdx.org/licenses/GPL-2.0.html
@ -6,6 +7,8 @@ Usage-Guide:
tag/value pairs into a comment according to the placement
guidelines in the licensing rules documentation.
For 'GNU General Public License (GPL) version 2 only' use:
SPDX-License-Identifier: GPL-2.0
or
SPDX-License-Identifier: GPL-2.0-only
For 'GNU General Public License (GPL) version 2 or any later version' use:
SPDX-License-Identifier: GPL-2.0-or-later

View File

@ -1,503 +0,0 @@
Valid-License-Identifier: LGPL-2.1-only
Valid-License-Identifier: LGPL-2.1-or-later
SPDX-URL: https://spdx.org/licenses/LGPL-2.1.html
Usage-Guide:
To use this license in source code, put one of the following SPDX
tag/value pairs into a comment according to the placement
guidelines in the licensing rules documentation.
For 'GNU Lesser General Public License (LGPL) version 2.1 only' use:
SPDX-License-Identifier: LGPL-2.1-only
For 'GNU Lesser General Public License (LGPL) version 2.1 or any later
version' use:
SPDX-License-Identifier: LGPL-2.1-or-later
License-Text:
GNU LESSER GENERAL PUBLIC LICENSE
Version 2.1, February 1999
Copyright (C) 1991, 1999 Free Software Foundation, Inc.
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
Everyone is permitted to copy and distribute verbatim copies of this
license document, but changing it is not allowed.
[This is the first released version of the Lesser GPL. It also counts as
the successor of the GNU Library Public License, version 2, hence the
version number 2.1.]
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That's all there is to it!

View File

@ -1,189 +0,0 @@
Valid-License-Identifier: Apache-2.0
SPDX-URL: https://spdx.org/licenses/Apache-2.0.html
Usage-Guide:
Do NOT use on OpenOCD code. The Apache-2.0 is not GPL2 compatible. It may only
be used for dual-licensed files where the other license is GPL2 compatible.
If you end up using this it MUST be used together with a GPL2 compatible
license using "OR".
It may also be used for stand-alone code NOT linked within the OpenOCD binary
but distributed with OpenOCD.
To use the Apache License version 2.0 put the following SPDX tag/value
pair into a comment according to the placement guidelines in the
licensing rules documentation:
SPDX-License-Identifier: Apache-2.0
License-Text:
Apache License
Version 2.0, January 2004
http://www.apache.org/licenses/
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View File

@ -7,7 +7,7 @@ AUTOMAKE_OPTIONS = gnu 1.6
.DELETE_ON_ERROR:
# make sure we pass the correct jimtcl flags to distcheck
AM_DISTCHECK_CONFIGURE_FLAGS = --disable-install-jim
DISTCHECK_CONFIGURE_FLAGS = --disable-install-jim
# do not run Jim Tcl tests (esp. during distcheck)
check-recursive: SUBDIRS :=
@ -38,7 +38,6 @@ endif
# common flags used in openocd build
AM_CFLAGS = $(GCC_WARNINGS)
AM_LDFLAGS =
AM_CPPFLAGS = $(HOST_CPPFLAGS)\
-I$(top_srcdir)/src \
@ -49,15 +48,7 @@ AM_CPPFLAGS = $(HOST_CPPFLAGS)\
if INTERNAL_JIMTCL
AM_CPPFLAGS += -I$(top_srcdir)/jimtcl \
-I$(top_builddir)/jimtcl
else
AM_CPPFLAGS += $(JIMTCL_CFLAGS)
endif
if USE_GCOV
AM_CFLAGS += --coverage
AM_LDFLAGS += --coverage
endif
EXTRA_DIST += \
BUGS \
HACKING \
@ -73,13 +64,10 @@ EXTRA_DIST += \
LICENSES/preferred/BSD-2-Clause-Views \
LICENSES/preferred/BSD-3-Clause \
LICENSES/preferred/BSD-Source-Code \
LICENSES/preferred/CC0-1.0 \
LICENSES/preferred/GFDL-1.2 \
LICENSES/preferred/gfdl-1.2.texi.readme \
LICENSES/preferred/GPL-2.0 \
LICENSES/preferred/LGPL-2.1 \
LICENSES/preferred/MIT \
LICENSES/stand-alone/Apache-2.0 \
LICENSES/stand-alone/GPL-3.0 \
tools/logger.pl \
tools/rlink_make_speed_table \
@ -123,13 +111,9 @@ TCL_PATH = tcl
TCL_FILES = find $(srcdir)/$(TCL_PATH) -name '*.cfg' -o -name '*.tcl' -o -name '*.txt' | \
sed -e 's,^$(srcdir)/$(TCL_PATH),,'
# The git log command below generates many empty text lines with only some space characters
# for indentation purposes, so use sed to trim all trailing whitespace.
dist-hook:
if test -d $(srcdir)/.git -a \( ! -e $(distdir)/ChangeLog -o -w $(distdir)/ChangeLog \) ; then \
git --git-dir $(srcdir)/.git log --date=short --pretty="format:%ad %aN <%aE>%n%n%w(0,4,6)* %B" \
| sed 's/[[:space:]]*$$//' > $(distdir)/ChangeLog.tmp && \
mv $(distdir)/ChangeLog.tmp $(distdir)/ChangeLog; \
git --git-dir $(srcdir)/.git log | $(srcdir)/tools/git2cl/git2cl > $(distdir)/ChangeLog ; \
fi
for i in $$($(TCL_FILES)); do \
j="$(distdir)/$(TCL_PATH)/$$i" && \

144
README
View File

@ -1,4 +1,5 @@
# Welcome to OpenOCD!
Welcome to OpenOCD!
===================
OpenOCD provides on-chip programming and debugging support with a
layered architecture of JTAG interface and TAP support including:
@ -25,33 +26,33 @@ This README file contains an overview of the following topics:
- packaging tips.
# Quickstart for the impatient
============================
Quickstart for the impatient
============================
If you have a popular board then just start OpenOCD with its config,
e.g.:
openocd -f board/stm32f4discovery.cfg
openocd -f board/stm32f4discovery.cfg
If you are connecting a particular adapter with some specific target,
you need to source both the jtag interface and the target configs,
e.g.:
```
openocd -f interface/ftdi/jtagkey2.cfg -c "transport select jtag" \
-f target/ti_calypso.cfg
```
openocd -f interface/ftdi/jtagkey2.cfg -c "transport select jtag" \
-f target/ti_calypso.cfg
```
openocd -f interface/stlink.cfg -c "transport select hla_swd" \
-f target/stm32l0.cfg
```
openocd -f interface/stlink.cfg -c "transport select hla_swd" \
-f target/stm32l0.cfg
After OpenOCD startup, connect GDB with
(gdb) target extended-remote localhost:3333
(gdb) target extended-remote localhost:3333
# OpenOCD Documentation
=====================
OpenOCD Documentation
=====================
In addition to the in-tree documentation, the latest manuals may be
viewed online at the following URLs:
@ -70,34 +71,35 @@ by subscribing to the OpenOCD developer mailing list:
openocd-devel@lists.sourceforge.net
## Building the OpenOCD Documentation
Building the OpenOCD Documentation
----------------------------------
By default the OpenOCD build process prepares documentation in the
"Info format" and installs it the standard way, so that `info openocd`
"Info format" and installs it the standard way, so that "info openocd"
can access it.
Additionally, the OpenOCD User's Guide can be produced in the
following different formats:
If `PDFVIEWER` is set, this creates and views the PDF User Guide.
# If PDFVIEWER is set, this creates and views the PDF User Guide.
make pdf && ${PDFVIEWER} doc/openocd.pdf
make pdf && ${PDFVIEWER} doc/openocd.pdf
If `HTMLVIEWER` is set, this creates and views the HTML User Guide.
make html && ${HTMLVIEWER} doc/openocd.html/index.html
# If HTMLVIEWER is set, this creates and views the HTML User Guide.
make html && ${HTMLVIEWER} doc/openocd.html/index.html
The OpenOCD Developer Manual contains information about the internal
architecture and other details about the code:
Note: make sure doxygen is installed, type doxygen --version
make doxygen && ${HTMLVIEWER} doxygen/index.html
# NB! make sure doxygen is installed, type doxygen --version
make doxygen && ${HTMLVIEWER} doxygen/index.html
# Supported hardware
==================
Supported hardware
==================
## JTAG adapters
JTAG adapters
-------------
AM335x, ARM-JTAG-EW, ARM-USB-OCD, ARM-USB-TINY, AT91RM9200, axm0432, BCM2835,
Bus Blaster, Buspirate, Cadence DPI, Cadence vdebug, Chameleon, CMSIS-DAP,
@ -114,7 +116,8 @@ sysfsgpio, Tigard, TI XDS110, TUMPA, Turtelizer, ULINK, USB-A9260, USB-Blaster,
USB-JTAG, USBprog, VPACLink, VSLLink, Wiggler, XDS100v2, Xilinx XVC/PCIe,
Xverve.
## Debug targets
Debug targets
-------------
ARM: AArch64, ARM11, ARM7, ARM9, Cortex-A/R (v7-A/R), Cortex-M (ARMv{6/7/8}-M),
FA526, Feroceon/Dragonite, XScale.
@ -122,7 +125,8 @@ ARCv2, AVR32, DSP563xx, DSP5680xx, EnSilica eSi-RISC, EJTAG (MIPS32, MIPS64),
ESP32, ESP32-S2, ESP32-S3, Intel Quark, LS102x-SAP, RISC-V, ST STM8,
Xtensa.
## Flash drivers
Flash drivers
-------------
ADUC702x, AT91SAM, AT91SAM9 (NAND), ATH79, ATmega128RFA1, Atmel SAM, AVR, CFI,
DSP5680xx, EFM32, EM357, eSi-RISC, eSi-TSMC, EZR32HG, FM3, FM4, Freedom E SPI,
@ -136,9 +140,12 @@ TI CC13xx, TI CC26xx, TI CC32xx, TI MSP432, Winner Micro w600, Xilinx XCF,
XMC1xxx, XMC4xxx.
# Installing OpenOCD
==================
Installing OpenOCD
==================
## A Note to OpenOCD Users
A Note to OpenOCD Users
-----------------------
If you would rather be working "with" OpenOCD rather than "on" it, your
operating system or JTAG interface supplier may provide binaries for
@ -157,7 +164,8 @@ Users of these binary versions of OpenOCD must contact their Packager to
ask for support or newer versions of the binaries; the OpenOCD
developers do not support packages directly.
## A Note to OpenOCD Packagers
A Note to OpenOCD Packagers
---------------------------
You are a PACKAGER of OpenOCD if you:
@ -184,9 +192,11 @@ suggestions:
- Use "ftdi" interface adapter driver for the FTDI-based devices.
# Building OpenOCD
================
Building OpenOCD
================
The INSTALL file contains generic instructions for running `configure`
The INSTALL file contains generic instructions for running 'configure'
and compiling the OpenOCD source code. That file is provided by
default for all GNU autotools packages. If you are not familiar with
the GNU autotools, then you should read those instructions first.
@ -194,7 +204,8 @@ the GNU autotools, then you should read those instructions first.
The remainder of this document tries to provide some instructions for
those looking for a quick-install.
## OpenOCD Dependencies
OpenOCD Dependencies
--------------------
GCC or Clang is currently required to build OpenOCD. The developers
have begun to enforce strict code warnings (-Wall, -Werror, -Wextra,
@ -209,7 +220,9 @@ You'll also need:
- make
- libtool
- pkg-config >= 0.23 or pkgconf
- libjim >= 0.79
OpenOCD uses jimtcl library; build from git can retrieve jimtcl as git
submodule.
Additionally, for building from git:
@ -237,7 +250,8 @@ Optional development script checkpatch needs:
- python
- python-ply
## Permissions delegation
Permissions delegation
----------------------
Running OpenOCD with root/administrative permissions is strongly
discouraged for security reasons.
@ -254,81 +268,89 @@ For parport adapters on Windows you need to run install_giveio.bat
(it's also possible to use "ioperm" with Cygwin instead) to give
ordinary users permissions for accessing the "LPT" registers directly.
## Compiling OpenOCD
Compiling OpenOCD
-----------------
To build OpenOCD, use the following sequence of commands:
./bootstrap
./configure [options]
make
sudo make install
./bootstrap (when building from the git repository)
./configure [options]
make
sudo make install
The `bootstrap` command is only necessary when building from the Git repository. The `configure` step generates the Makefiles required to build
The 'configure' step generates the Makefiles required to build
OpenOCD, usually with one or more options provided to it. The first
'make' step will build OpenOCD and place the final executable in
'./src/'. The final (optional) step, `make install`, places all of
'./src/'. The final (optional) step, ``make install'', places all of
the files in the required location.
To see the list of all the supported options, run `./configure --help`
To see the list of all the supported options, run
./configure --help
## Cross-compiling Options
Cross-compiling Options
-----------------------
Cross-compiling is supported the standard autotools way, you just need
to specify the cross-compiling target triplet in the --host option,
e.g. for cross-building for Windows 32-bit with MinGW on Debian:
./configure --host=i686-w64-mingw32 [options]
./configure --host=i686-w64-mingw32 [options]
To make pkg-config work nicely for cross-compiling, you might need an
additional wrapper script as described at
https://autotools.io/pkgconfig/cross-compiling.html
https://autotools.io/pkgconfig/cross-compiling.html
This is needed to tell pkg-config where to look for the target
libraries that OpenOCD depends on. Alternatively, you can specify
`*_CFLAGS` and `*_LIBS` environment variables directly, see `./configure
--help` for the details.
*_CFLAGS and *_LIBS environment variables directly, see "./configure
--help" for the details.
For a more or less complete script that does all this for you, see
contrib/cross-build.sh
contrib/cross-build.sh
## Parallel Port Dongles
Parallel Port Dongles
---------------------
If you want to access the parallel port using the PPDEV interface you
have to specify both `--enable-parport` and `--enable-parport-ppdev`, since
have to specify both --enable-parport AND --enable-parport-ppdev, since
the later option is an option to the parport driver.
The same is true for the `--enable-parport-giveio` option, you have to
use both the `--enable-parport` and the `--enable-parport-giveio` option
The same is true for the --enable-parport-giveio option, you have to
use both the --enable-parport AND the --enable-parport-giveio option
if you want to use giveio instead of ioperm parallel port access
method.
# Obtaining OpenOCD From GIT
==========================
Obtaining OpenOCD From GIT
==========================
You can download the current GIT version with a GIT client of your
choice from the main repository:
git://git.code.sf.net/p/openocd/code
git://git.code.sf.net/p/openocd/code
You may prefer to use a mirror:
http://repo.or.cz/r/openocd.git
git://repo.or.cz/openocd.git
http://repo.or.cz/r/openocd.git
git://repo.or.cz/openocd.git
Using the GIT command line client, you might use the following command
to set up a local copy of the current repository (make sure there is no
directory called "openocd" in the current directory):
git clone git://git.code.sf.net/p/openocd/code openocd
git clone git://git.code.sf.net/p/openocd/code openocd
Then you can update that at your convenience using `git pull`.
Then you can update that at your convenience using
git pull
There is also a gitweb interface, which you can use either to browse
the repository or to download arbitrary snapshots using HTTP:
http://repo.or.cz/w/openocd.git
http://repo.or.cz/w/openocd.git
Snapshots are compressed tarballs of the source tree, about 1.3 MBytes
each at this writing.

View File

@ -3,8 +3,8 @@
# Run the autotools bootstrap sequence to create the configure script
set -e # Abort execution on error.
set -u # Abort if you reference an undefined variable.
# Abort execution on error
set -e
if which libtoolize > /dev/null; then
libtoolize="libtoolize"
@ -15,23 +15,13 @@ else
exit 1
fi
WITH_SUBMODULES=0
case "$#" in
0) ;;
1) if [ "$1" = "with-submodules" ]; then
WITH_SUBMODULES=1
elif [ "$1" = "nosubmodule" ]; then
WITH_SUBMODULES=0
elif [ -n "$1" ]; then
echo "$0: Illegal argument $1" >&2
echo "USAGE: $0 [with-submodules]" >&2
exit 1
fi;;
*) echo "$0: Wrong number of command-line arguments." >&2
echo "USAGE: $0 [with-submodules]" >&2
exit 1;;
esac
if [ "$1" = "nosubmodule" ]; then
SKIP_SUBMODULE=1
elif [ -n "$1" ]; then
echo "$0: Illegal argument $1"
echo "USAGE: $0 [nosubmodule]"
exit 1
fi
# bootstrap the autotools
(
@ -44,12 +34,12 @@ autoheader --warnings=all
automake --warnings=all --gnu --add-missing --copy
)
if [ "$WITH_SUBMODULES" -ne 0 ]; then
echo "Setting up submodules"
git submodule sync
git submodule update --init
else
if [ -n "$SKIP_SUBMODULE" ]; then
echo "Skipping submodule setup"
else
echo "Setting up submodules"
git submodule init
git submodule update
fi
if [ -x src/jtag/drivers/libjaylink/autogen.sh ]; then

View File

@ -7,6 +7,6 @@ AC_DEFUN([AX_CONFIG_SUBDIR_OPTION],
AC_CONFIG_SUBDIRS([$1])
m4_ifblank([$2], [rm -f $srcdir/$1/configure.gnu],
[printf '#!/bin/sh\nexec "`dirname "'\$'0"`/configure" '"$2"' "'\$'@"\n' > "$srcdir/$1/configure.gnu"
[echo -e '#!/bin/sh\nexec "`dirname "'\$'0"`/configure" '"$2"' "'\$'@"' > "$srcdir/$1/configure.gnu"
])
])

View File

@ -52,16 +52,9 @@ AC_SEARCH_LIBS([openpty], [util])
AC_CHECK_HEADERS([sys/socket.h])
AC_CHECK_HEADERS([elf.h])
AC_CHECK_TYPE([Elf64_Ehdr],
AC_DEFINE([HAVE_ELF64], [1], [Define to 1 if the system has the type 'Elf64_Ehdr'.]),
[], [[#include <elf.h>]])
AC_MSG_CHECKING([for glibc])
AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[#include <features.h>]], [[int v = __GLIBC__;return 0;]])],
[have_glibc=yes], [have_glibc=no])
AC_MSG_RESULT($have_glibc)
AC_EGREP_HEADER(Elf64_Ehdr, [elf.h], [
AC_DEFINE([HAVE_ELF64], [1], [Define to 1 if the system has the type `Elf64_Ehdr'.])
])
AC_CHECK_HEADERS([fcntl.h])
AC_CHECK_HEADERS([malloc.h])
AC_CHECK_HEADERS([netdb.h])
@ -111,28 +104,20 @@ AS_IF([test -x "$srcdir/guess-rev.sh"], [
AC_MSG_RESULT([$build_release])
# Adapter drivers
# 1st column -- Basename for the configure option generated with AC_ARG_ENABLE.
# For example, "buspirate" generates options "--enable-buspirate[=yes/no]"
# and "--disable-buspirate".
# 2nd column -- Description for the configure option. For example, "Bus Pirate"
# generates "Enable building support for the Bus Pirate (default is auto)".
# 3rd column -- Basename for the config.h and Automake symbols.
# For example, basename "BUS_PIRATE" generates "BUILD_BUS_PIRATE" with AC_DEFINE
# for config.h and "BUS_PIRATE" with AM_CONDITIONAL for Automake.
# 1st column -- configure option
# 2nd column -- description
# 3rd column -- symbol used for both config.h and automake
m4_define([ADAPTER_ARG], [m4_argn([1], $1)])
m4_define([ADAPTER_DESC], [m4_argn([2], $1)])
m4_define([ADAPTER_SYM], [m4_argn([3], $1)])
# AC_ARG_ENABLE uses prefix "enable_" to name the corresponding option variable.
m4_define([ADAPTER_VAR], [enable_[]ADAPTER_ARG($1)])
m4_define([ADAPTER_OPT], [m4_translit(ADAPTER_ARG($1), [_], [-])])
m4_define([USB1_ADAPTERS],
[[[ftdi], [MPSSE mode of FTDI based devices], [FTDI]],
[[ftdi_cjtag], [cJTAG (OScan1, JScan3) tunneled thru MPSSE], [FTDI_CJTAG]],
[[stlink], [ST-Link Programmer], [HLADAPTER_STLINK]],
[[ti_icdi], [TI ICDI JTAG Programmer], [HLADAPTER_ICDI]],
[[ulink], [Keil ULINK JTAG Programmer], [ULINK]],
[[angie], [ANGIE Adapter], [ANGIE]],
[[usb_blaster_2], [Altera USB-Blaster II Compatible], [USB_BLASTER_2]],
[[ft232r], [Bitbang mode of FT232R based devices], [FT232R]],
[[vsllink], [Versaloon-Link JTAG Programmer], [VSLLINK]],
@ -171,22 +156,9 @@ m4_define([PCIE_ADAPTERS],
m4_define([SERIAL_PORT_ADAPTERS],
[[[buspirate], [Bus Pirate], [BUS_PIRATE]]])
m4_define([LINUXSPIDEV_ADAPTER],
[[[linuxspidev], [Linux spidev driver], [LINUXSPIDEV]]])
m4_define([VDEBUG_ADAPTER],
[[[vdebug], [Cadence Virtual Debug Interface], [VDEBUG]]])
# The word 'Adapter' in "Dummy Adapter" below must begin with a capital letter
# because there is an M4 macro called 'adapter'.
m4_define([DUMMY_ADAPTER],
[[[dummy], [Dummy Adapter], [DUMMY]]])
m4_define([OPTIONAL_LIBRARIES],
[[[capstone], [Use Capstone disassembly framework], []]])
m4_define([COVERAGE],
[[[gcov], [Collect coverage using gcov], []]])
AC_ARG_ENABLE([doxygen-html],
AS_HELP_STRING([--disable-doxygen-html],
[Disable building Doxygen manual as HTML.]),
@ -215,19 +187,6 @@ AC_ARG_ENABLE([werror],
AS_HELP_STRING([--disable-werror], [Do not treat warnings as errors]),
[gcc_werror=$enableval], [gcc_werror=$gcc_warnings])
AC_ARG_ENABLE([gcov],
AS_HELP_STRING([--enable-gcov], [Enable runtime coverage collection via gcov]),
[enable_gcov=$enableval], [enable_gcov=no])
AS_IF([test "x$enable_gcov" = "xyes"], [
AC_DEFINE([USE_GCOV], [1], [1 to enable coverage collection using gcov.])
dnl When collecting coverage, disable optimizations.
dnl This overrides the "-O2" that autoconf uses by default:
CFLAGS+=" -O0"
], [
AC_DEFINE([USE_GCOV], [0], [0 to leave coverage collection disabled.])
])
# set default verbose options, overridden by following options
debug_usb_io=no
debug_usb_comms=no
@ -270,28 +229,24 @@ AC_ARG_ENABLE([malloc_logging],
AC_MSG_CHECKING([whether to enable malloc free space logging]);
AC_MSG_RESULT([$debug_malloc])
AS_IF([test "x$debug_malloc" = "xyes" -a "x$have_glibc" = "xyes"], [
AS_IF([test "x$debug_malloc" = "xyes"], [
AC_DEFINE([_DEBUG_FREE_SPACE_],[1], [Include malloc free space in logging])
])
AC_ARG_ENABLE([dummy],
AS_HELP_STRING([--enable-dummy], [Enable building the dummy port driver]),
[build_dummy=$enableval], [build_dummy=no])
AC_ARG_ENABLE([rshim],
AS_HELP_STRING([--enable-rshim], [Enable building the rshim driver]),
[build_rshim=$enableval], [build_rshim=no])
AC_ARG_ENABLE([dmem],
AS_HELP_STRING([--enable-dmem], [Enable building the dmem driver]),
[build_dmem=$enableval], [build_dmem=no])
m4_define([AC_ARG_ADAPTERS], [
m4_foreach([adapter], [$1],
[AC_ARG_ENABLE(ADAPTER_OPT([adapter]),
AS_HELP_STRING([--enable-ADAPTER_OPT([adapter])[[[=yes/no/auto]]]],
AS_HELP_STRING([--enable-ADAPTER_OPT([adapter])],
[Enable building support for the ]ADAPTER_DESC([adapter])[ (default is $2)]),
[case "${enableval}" in
yes|no|auto) ;;
*) AC_MSG_ERROR([Option --enable-ADAPTER_OPT([adapter]) has invalid value "${enableval}".]) ;;
esac],
[ADAPTER_VAR([adapter])=$2])
[], [ADAPTER_VAR([adapter])=$2])
])
])
@ -300,13 +255,9 @@ AC_ARG_ADAPTERS([
HIDAPI_ADAPTERS,
HIDAPI_USB1_ADAPTERS,
LIBFTDI_ADAPTERS,
LIBFTDI_USB1_ADAPTERS,
LIBFTDI_USB1_ADAPTERS
LIBGPIOD_ADAPTERS,
LINUXSPIDEV_ADAPTER,
SERIAL_PORT_ADAPTERS,
DUMMY_ADAPTER,
VDEBUG_ADAPTER,
PCIE_ADAPTERS,
LIBJAYLINK_ADAPTERS
],[auto])
@ -328,6 +279,10 @@ AC_ARG_ENABLE([jtag_vpi],
AS_HELP_STRING([--enable-jtag_vpi], [Enable building support for JTAG VPI]),
[build_jtag_vpi=$enableval], [build_jtag_vpi=no])
AC_ARG_ENABLE([vdebug],
AS_HELP_STRING([--enable-vdebug], [Enable building support for Cadence Virtual Debug Interface]),
[build_vdebug=$enableval], [build_vdebug=no])
AC_ARG_ENABLE([jtag_dpi],
AS_HELP_STRING([--enable-jtag_dpi], [Enable building support for JTAG DPI]),
[build_jtag_dpi=$enableval], [build_jtag_dpi=no])
@ -377,30 +332,36 @@ AC_ARG_ENABLE([sysfsgpio],
AS_HELP_STRING([--enable-sysfsgpio], [Enable building support for programming driven via sysfs gpios.]),
[build_sysfsgpio=$enableval], [build_sysfsgpio=no])
AC_ARG_ENABLE([xlnx_pcie_xvc],
AS_HELP_STRING([--enable-xlnx-pcie-xvc], [Enable building support for Xilinx XVC/PCIe.]),
[build_xlnx_pcie_xvc=$enableval], [build_xlnx_pcie_xvc=no])
AS_CASE([$host_os],
[linux*], [
is_linux=yes
],
[linux*], [],
[
AS_IF([test "x$build_sysfsgpio" = "xyes"], [
AC_MSG_ERROR([sysfsgpio is only available on linux])
])
AS_IF([test "x$enable_linuxgpiod" = "xyes"], [
AC_MSG_ERROR([linuxgpiod is only available on linux])
])
AS_IF([test "x$build_xlnx_pcie_xvc" = "xyes"], [
AC_MSG_ERROR([xlnx_pcie_xvc is only available on linux])
])
AS_CASE([$host_os], [freebsd*], [],
[
AS_IF([test "x$build_rshim" = "xyes"], [
AC_MSG_ERROR([build_rshim is only available on linux or freebsd])
])
])
AS_IF([test "x$build_dmem" = "xyes"], [
AC_MSG_ERROR([dmem is only available on linux])
])
])
AC_ARG_ENABLE([internal-jimtcl],
AS_HELP_STRING([--enable-internal-jimtcl], [Enable building internal jimtcl (deprecated)]),
[use_internal_jimtcl=$enableval], [use_internal_jimtcl=no])
AS_HELP_STRING([--disable-internal-jimtcl], [Disable building internal jimtcl]),
[use_internal_jimtcl=$enableval], [use_internal_jimtcl=yes])
AC_ARG_ENABLE([jimtcl-maintainer],
AS_HELP_STRING([--enable-jimtcl-maintainer], [Enable maintainer mode when building internal jimtcl]),
@ -412,8 +373,8 @@ AC_ARG_ENABLE([internal-libjaylink],
[use_internal_libjaylink=$enableval], [use_internal_libjaylink=no])
AC_ARG_ENABLE([remote-bitbang],
AS_HELP_STRING([--enable-remote-bitbang], [Enable building support for the Remote Bitbang driver]),
[build_remote_bitbang=$enableval], [build_remote_bitbang=yes])
AS_HELP_STRING([--enable-remote-bitbang], [Enable building support for the Remote Bitbang jtag driver]),
[build_remote_bitbang=$enableval], [build_remote_bitbang=no])
AS_CASE(["${host_cpu}"],
[i?86|x86*], [],
@ -424,10 +385,8 @@ AS_CASE(["${host_cpu}"],
parport_use_ppdev=yes
])
can_build_buspirate=yes
AS_CASE([$host_os],
[cygwin*], [
AS_CASE([$host],
[*-cygwin*], [
is_win32=yes
parport_use_ppdev=no
@ -447,7 +406,7 @@ AS_CASE([$host_os],
])
])
],
[mingw* | msys*], [
[*-mingw* | *-msys*], [
is_mingw=yes
is_win32=yes
parport_use_ppdev=no
@ -457,16 +416,16 @@ AS_CASE([$host_os],
])
parport_use_giveio=yes
AS_IF([test "x$ADAPTER_VAR([buspirate])" = "xyes"], [
AC_MSG_ERROR([The Bus Pirate adapter is currently not supported by MinGW32 hosts.])
AS_IF([test "x$enable_buspirate" = "xyes"], [
AC_MSG_ERROR([buspirate currently not supported by MinGW32 hosts])
])
# In case enable_buspirate=auto, make sure it will not be built.
can_build_buspirate=no
enable_buspirate=no
AC_SUBST([HOST_CPPFLAGS], ["-D__USE_MINGW_ANSI_STDIO -DFD_SETSIZE=128"])
AC_SUBST([HOST_CPPFLAGS], [-D__USE_MINGW_ANSI_STDIO])
],
[darwin*], [
[*darwin*], [
is_darwin=yes
AS_IF([test "x$parport_use_giveio" = "xyes"], [
@ -518,14 +477,11 @@ AS_IF([test "x$build_rshim" = "xyes"], [
AC_DEFINE([BUILD_RSHIM], [0], [0 if you don't want to debug BlueField SoC via rshim.])
])
AS_IF([test "x$build_dmem" = "xyes"], [
AC_DEFINE([BUILD_DMEM], [1], [1 if you want to debug via Direct Mem.])
], [
AC_DEFINE([BUILD_DMEM], [0], [0 if you don't want to debug via Direct Mem.])
])
AS_IF([test "x$ADAPTER_VAR([dummy])" != "xno"], [
AS_IF([test "x$build_dummy" = "xyes"], [
build_bitbang=yes
AC_DEFINE([BUILD_DUMMY], [1], [1 if you want dummy driver.])
], [
AC_DEFINE([BUILD_DUMMY], [0], [0 if you don't want dummy driver.])
])
AS_IF([test "x$build_ep93xx" = "xyes"], [
@ -581,6 +537,12 @@ AS_IF([test "x$build_jtag_vpi" = "xyes"], [
AC_DEFINE([BUILD_JTAG_VPI], [0], [0 if you don't want JTAG VPI.])
])
AS_IF([test "x$build_vdebug" = "xyes"], [
AC_DEFINE([BUILD_VDEBUG], [1], [1 if you want Cadence vdebug interface.])
], [
AC_DEFINE([BUILD_VDEBUG], [0], [0 if you don't want Cadence vdebug interface.])
])
AS_IF([test "x$build_jtag_dpi" = "xyes"], [
AC_DEFINE([BUILD_JTAG_DPI], [1], [1 if you want JTAG DPI.])
], [
@ -600,6 +562,12 @@ AS_IF([test "x$build_gw16012" = "xyes"], [
AC_DEFINE([BUILD_GW16012], [0], [0 if you don't want the Gateworks GW16012 driver.])
])
AS_IF([test "x$enable_buspirate" != "xno"], [
AC_DEFINE([BUILD_BUSPIRATE], [1], [1 if you want the Buspirate JTAG driver.])
], [
AC_DEFINE([BUILD_BUSPIRATE], [0], [0 if you don't want the Buspirate JTAG driver.])
])
AS_IF([test "x$use_internal_jimtcl" = "xyes"], [
AS_IF([test -f "$srcdir/jimtcl/configure"], [
AS_IF([test "x$use_internal_jimtcl_maintainer" = "xyes"], [
@ -611,22 +579,13 @@ AS_IF([test "x$use_internal_jimtcl" = "xyes"], [
], [
AC_MSG_ERROR([jimtcl not found, run git submodule init and git submodule update.])
])
], [
PKG_CHECK_MODULES([JIMTCL], [jimtcl >= 0.79], [
have_jimtcl_pkg_config=yes
], [
have_jimtcl_pkg_config=no
AC_CHECK_HEADER([jim.h], [], [
AC_MSG_ERROR([jimtcl is required but not found via pkg-config and system includes])
])
])
])
AS_IF([test "x$build_remote_bitbang" = "xyes"], [
build_bitbang=yes
AC_DEFINE([BUILD_REMOTE_BITBANG], [1], [1 if you want the Remote Bitbang driver.])
AC_DEFINE([BUILD_REMOTE_BITBANG], [1], [1 if you want the Remote Bitbang JTAG driver.])
], [
AC_DEFINE([BUILD_REMOTE_BITBANG], [0], [0 if you don't want the Remote Bitbang driver.])
AC_DEFINE([BUILD_REMOTE_BITBANG], [0], [0 if you don't want the Remote Bitbang JTAG driver.])
])
AS_IF([test "x$build_sysfsgpio" = "xyes"], [
@ -636,6 +595,13 @@ AS_IF([test "x$build_sysfsgpio" = "xyes"], [
AC_DEFINE([BUILD_SYSFSGPIO], [0], [0 if you don't want SysfsGPIO driver.])
])
AS_IF([test "x$build_xlnx_pcie_xvc" = "xyes"], [
build_xlnx_pcie_xvc=yes
AC_DEFINE([BUILD_XLNX_PCIE_XVC], [1], [1 if you want the Xilinx XVC/PCIe driver.])
], [
AC_DEFINE([BUILD_XLNX_PCIE_XVC], [0], [0 if you don't want Xilinx XVC/PCIe driver.])
])
PKG_CHECK_MODULES([LIBUSB1], [libusb-1.0], [
use_libusb1=yes
AC_DEFINE([HAVE_LIBUSB1], [1], [Define if you have libusb-1.x])
@ -688,20 +654,11 @@ PKG_CHECK_MODULES([LIBFTDI], [libftdi1], [
PKG_CHECK_MODULES([LIBFTDI], [libftdi], [use_libftdi=yes], [use_libftdi=no])
])
PKG_CHECK_MODULES([LIBGPIOD], [libgpiod < 2.0], [
use_libgpiod=yes
PKG_CHECK_EXISTS([libgpiod >= 1.5],
[AC_DEFINE([HAVE_LIBGPIOD1_FLAGS_BIAS], [1], [define if libgpiod v1 has line request flags bias])])
], [use_libgpiod=no])
PKG_CHECK_MODULES([LIBGPIOD], [libgpiod], [use_libgpiod=yes], [use_libgpiod=no])
PKG_CHECK_MODULES([LIBJAYLINK], [libjaylink >= 0.2],
[use_libjaylink=yes], [use_libjaylink=no])
# Arg $1: An array of adapter triplets, used to derive option and variable names for each adapter.
# Arg $2: Whether the adapters can be enabled, for example, because
# their prerequisites are installed in the system.
# Arg $3: What prerequisites are missing, to be shown in an error message
# if an adapter was requested but cannot be enabled.
m4_define([PROCESS_ADAPTERS], [
m4_foreach([adapter], [$1], [
AS_IF([test $2], [
@ -712,7 +669,7 @@ m4_define([PROCESS_ADAPTERS], [
])
], [
AS_IF([test "x$ADAPTER_VAR([adapter])" = "xyes"], [
AC_MSG_ERROR([$3 is required for [adapter] "ADAPTER_DESC([adapter])".])
AC_MSG_ERROR([$3 is required for the ADAPTER_DESC([adapter])])
])
ADAPTER_VAR([adapter])=no
AC_DEFINE([BUILD_]ADAPTER_SYM([adapter]), [0], [0 if you do not want the ]ADAPTER_DESC([adapter]).)
@ -726,14 +683,8 @@ PROCESS_ADAPTERS([HIDAPI_ADAPTERS], ["x$use_hidapi" = "xyes"], [hidapi])
PROCESS_ADAPTERS([HIDAPI_USB1_ADAPTERS], ["x$use_hidapi" = "xyes" -a "x$use_libusb1" = "xyes"], [hidapi and libusb-1.x])
PROCESS_ADAPTERS([LIBFTDI_ADAPTERS], ["x$use_libftdi" = "xyes"], [libftdi])
PROCESS_ADAPTERS([LIBFTDI_USB1_ADAPTERS], ["x$use_libftdi" = "xyes" -a "x$use_libusb1" = "xyes"], [libftdi and libusb-1.x])
PROCESS_ADAPTERS([LIBGPIOD_ADAPTERS], ["x$use_libgpiod" = "xyes"], [Linux libgpiod])
PROCESS_ADAPTERS([LIBGPIOD_ADAPTERS], ["x$use_libgpiod" = "xyes"], [libgpiod])
PROCESS_ADAPTERS([LIBJAYLINK_ADAPTERS], ["x$use_internal_libjaylink" = "xyes" -o "x$use_libjaylink" = "xyes"], [libjaylink-0.2])
PROCESS_ADAPTERS([PCIE_ADAPTERS], ["x$is_linux" = "xyes"], [Linux build])
PROCESS_ADAPTERS([SERIAL_PORT_ADAPTERS], ["x$can_build_buspirate" = "xyes"],
[internal error: validation should happen beforehand])
PROCESS_ADAPTERS([LINUXSPIDEV_ADAPTER], ["x$is_linux" = "xyes"], [Linux spidev])
PROCESS_ADAPTERS([VDEBUG_ADAPTER], [true], [unused])
PROCESS_ADAPTERS([DUMMY_ADAPTER], [true], [unused])
AS_IF([test "x$enable_linuxgpiod" != "xno"], [
build_bitbang=yes
@ -773,6 +724,7 @@ AS_IF([test "x$enable_esp_usb_jtag" != "xno"], [
AM_CONDITIONAL([RELEASE], [test "x$build_release" = "xyes"])
AM_CONDITIONAL([PARPORT], [test "x$build_parport" = "xyes"])
AM_CONDITIONAL([DUMMY], [test "x$build_dummy" = "xyes"])
AM_CONDITIONAL([GIVEIO], [test "x$parport_use_giveio" = "xyes"])
AM_CONDITIONAL([EP93XX], [test "x$build_ep93xx" = "xyes"])
AM_CONDITIONAL([AT91RM9200], [test "x$build_at91rm9200" = "xyes"])
@ -781,12 +733,15 @@ AM_CONDITIONAL([IMX_GPIO], [test "x$build_imx_gpio" = "xyes"])
AM_CONDITIONAL([AM335XGPIO], [test "x$build_am335xgpio" = "xyes"])
AM_CONDITIONAL([BITBANG], [test "x$build_bitbang" = "xyes"])
AM_CONDITIONAL([JTAG_VPI], [test "x$build_jtag_vpi" = "xyes"])
AM_CONDITIONAL([VDEBUG], [test "x$build_vdebug" = "xyes"])
AM_CONDITIONAL([JTAG_DPI], [test "x$build_jtag_dpi" = "xyes"])
AM_CONDITIONAL([USB_BLASTER_DRIVER], [test "x$enable_usb_blaster" != "xno" -o "x$enable_usb_blaster_2" != "xno"])
AM_CONDITIONAL([AMTJTAGACCEL], [test "x$build_amtjtagaccel" = "xyes"])
AM_CONDITIONAL([GW16012], [test "x$build_gw16012" = "xyes"])
AM_CONDITIONAL([REMOTE_BITBANG], [test "x$build_remote_bitbang" = "xyes"])
AM_CONDITIONAL([BUSPIRATE], [test "x$enable_buspirate" != "xno"])
AM_CONDITIONAL([SYSFSGPIO], [test "x$build_sysfsgpio" = "xyes"])
AM_CONDITIONAL([XLNX_PCIE_XVC], [test "x$build_xlnx_pcie_xvc" = "xyes"])
AM_CONDITIONAL([USE_LIBUSB1], [test "x$use_libusb1" = "xyes"])
AM_CONDITIONAL([IS_CYGWIN], [test "x$is_cygwin" = "xyes"])
AM_CONDITIONAL([IS_MINGW], [test "x$is_mingw" = "xyes"])
@ -798,15 +753,11 @@ AM_CONDITIONAL([USE_LIBGPIOD], [test "x$use_libgpiod" = "xyes"])
AM_CONDITIONAL([USE_HIDAPI], [test "x$use_hidapi" = "xyes"])
AM_CONDITIONAL([USE_LIBJAYLINK], [test "x$use_libjaylink" = "xyes"])
AM_CONDITIONAL([RSHIM], [test "x$build_rshim" = "xyes"])
AM_CONDITIONAL([DMEM], [test "x$build_dmem" = "xyes"])
AM_CONDITIONAL([HAVE_CAPSTONE], [test "x$enable_capstone" != "xno"])
AM_CONDITIONAL([INTERNAL_JIMTCL], [test "x$use_internal_jimtcl" = "xyes"])
AM_CONDITIONAL([HAVE_JIMTCL_PKG_CONFIG], [test "x$have_jimtcl_pkg_config" = "xyes"])
AM_CONDITIONAL([INTERNAL_LIBJAYLINK], [test "x$use_internal_libjaylink" = "xyes"])
AM_CONDITIONAL([USE_GCOV], [test "x$enable_gcov" = "xyes"])
# Look for environ alternatives. Possibility #1: is environ in unistd.h or stdlib.h?
AC_MSG_CHECKING([for environ in unistd.h and stdlib.h])
AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
@ -872,10 +823,6 @@ AS_IF([test "x$enable_jlink" != "xno"], [
]])
)
AS_IF([test "x$use_internal_jimtcl" = "xyes"], [
AC_MSG_WARN([Using the internal jimtcl is deprecated and will not be possible in the future.])
])
echo
echo
echo OpenOCD configuration summary
@ -885,11 +832,7 @@ m4_foreach([adapter], [USB1_ADAPTERS,
LIBFTDI_USB1_ADAPTERS,
LIBGPIOD_ADAPTERS,
LIBJAYLINK_ADAPTERS, PCIE_ADAPTERS, SERIAL_PORT_ADAPTERS,
LINUXSPIDEV_ADAPTER,
VDEBUG_ADAPTER,
DUMMY_ADAPTER,
OPTIONAL_LIBRARIES,
COVERAGE],
OPTIONAL_LIBRARIES],
[s=m4_format(["%-40s"], ADAPTER_DESC([adapter]))
AS_CASE([$ADAPTER_VAR([adapter])],
[auto], [
@ -900,11 +843,6 @@ m4_foreach([adapter], [USB1_ADAPTERS,
],
[no], [
echo "$s"no
],
[
AC_MSG_ERROR(m4_normalize([
Error in [adapter] "ADAPTER_ARG([adapter])": Variable "ADAPTER_VAR([adapter])"
has invalid value "$ADAPTER_VAR([adapter])".]))
])
])
echo

View File

@ -29,27 +29,6 @@ ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6014", MODE="660", GROUP="plugdev",
# Original FT231XQ VID:PID
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6015", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Original FT2233HP VID:PID
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6040", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Original FT4233HP VID:PID
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6041", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Original FT2232HP VID:PID
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6042", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Original FT4232HP VID:PID
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6043", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Original FT233HP VID:PID
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6044", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Original FT232HP VID:PID
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6045", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Original FT4232HA VID:PID
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6048", MODE="660", GROUP="plugdev", TAG+="uaccess"
# DISTORTEC JTAG-lock-pick Tiny 2
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="8220", MODE="660", GROUP="plugdev", TAG+="uaccess"
@ -245,13 +224,6 @@ ATTRS{idVendor}=="2aec", ATTRS{idProduct}=="1106", MODE="660", GROUP="plugdev",
ATTRS{idVendor}=="303a", ATTRS{idProduct}=="1001", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="303a", ATTRS{idProduct}=="1002", MODE="660", GROUP="plugdev", TAG+="uaccess"
# ANGIE USB-JTAG Adapter
ATTRS{idVendor}=="584e", ATTRS{idProduct}=="414f", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="584e", ATTRS{idProduct}=="424e", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="584e", ATTRS{idProduct}=="4255", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="584e", ATTRS{idProduct}=="4355", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="584e", ATTRS{idProduct}=="4a55", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Marvell Sheevaplug
ATTRS{idVendor}=="9e88", ATTRS{idProduct}=="9e8f", MODE="660", GROUP="plugdev", TAG+="uaccess"

View File

@ -0,0 +1,68 @@
+OpenOCD and CoreSight Tracing
+
Many recent ARM chips (Using e..g. Cortex-M3 and
Cortex-M4 cores) support CoreSight debug/trace.
This note sketches an approach currently planned for those cores
with OpenOCD.
This tracing data can help debug and tune ARM software, but not
all cores support tracing. Some support more extensive tracing
other cores with trace support +should be able to use the same
approach and maybe some of the same analysis code.
+the Cortex-M3 is assumed here to be the
+core in use, for simplicity and to reflect current OpenOCD users.
This note summarizes a software model to generate, collect, and
analyze such trace data . That is not fully implemented as of early
January 2011, +and thus is not *yet* usable.
+
+
+Some microcontroller cores support a low pin-count Single-wire trace,
with a mode where +trace data is emitted (usually to a UART. To use
this mode, +SWD must be in use.
+At this writing, OpenOCD SWD support is not yet complete either.
(There are also multi-wire trace ports requiring more complex debug
adapters than OpenOCD currently supports, and offering richer data.
+
+
+* ENABLING involves activating SWD and (single wire) trace.
+
+current expectations are that OpenOCD itself will handle enabling;
activating single wire trace involves a debug adapter interaction, and
collecting that trace data requires particular (re)wiring.
+
+* CONFIGURATION involves setting up ITM and/or ETM modules to emit the
+desired data from the Cortex core. (This might include dumping
+event counters printf-style messages; code profiling; and more. Not all
+cores offer the same trace capabilities.
+
+current expectations are that Tcl scripts will be used to configure these
+modules for the desired tracing, by direct writes to registers. In some
+cases (as with RTOS event tracking and similar messaging, this might
+be augmented or replaced by user code running on the ARM core.
+
+COLLECTION involves reading that trace data, probably through UART, and
+saving it in a useful format to analyse For now, deferred analysis modes
are assumed, not than real-time or interactive ones.
+
+
+current expectations are to to dump data in text using contrib/itmdump.c
+or derived tools, and to post-process it into reports. Such reports might
+include program messaging (such as application data streams via ITM, maybe
+using printf type messaging; code coverage analysis or so forth. Recent
+versions of CMSIS software reserve some ITM codespace for RTOS event
tracing and include ITM messaging support.
Clearly some of that data would be valuable for interactive debugging.
+
+Should someone get ambitious, GUI reports should be possible. GNU tools
+for simpler reports like gprof may be simpler to support at first.
+In any case, OpenOCD is not currently GUI-oriented. Accordingly, we now
+expect any such graphics to come from postprocessing.
measurements for RTOS event timings should also be easy to collect.
+Examples include context and message switch times, as well as times
for application interactions.
+

View File

@ -42,7 +42,6 @@ WORK_DIR=$PWD
: ${LIBFTDI_SRC:=/path/to/libftdi}
: ${CAPSTONE_SRC:=/path/to/capstone}
: ${LIBJAYLINK_SRC:=/path/to/libjaylink}
: ${JIMTCL_SRC:=/path/to/jimtcl}
OPENOCD_SRC=`readlink -m $OPENOCD_SRC`
LIBUSB1_SRC=`readlink -m $LIBUSB1_SRC`
@ -50,7 +49,6 @@ HIDAPI_SRC=`readlink -m $HIDAPI_SRC`
LIBFTDI_SRC=`readlink -m $LIBFTDI_SRC`
CAPSTONE_SRC=`readlink -m $CAPSTONE_SRC`
LIBJAYLINK_SRC=`readlink -m $LIBJAYLINK_SRC`
JIMTCL_SRC=`readlink -m $JIMTCL_SRC`
HOST_TRIPLET=$1
BUILD_DIR=$WORK_DIR/$HOST_TRIPLET-build
@ -59,7 +57,6 @@ HIDAPI_BUILD_DIR=$BUILD_DIR/hidapi
LIBFTDI_BUILD_DIR=$BUILD_DIR/libftdi
CAPSTONE_BUILD_DIR=$BUILD_DIR/capstone
LIBJAYLINK_BUILD_DIR=$BUILD_DIR/libjaylink
JIMTCL_BUILD_DIR=$BUILD_DIR/jimtcl
OPENOCD_BUILD_DIR=$BUILD_DIR/openocd
## Root of host file tree
@ -175,18 +172,6 @@ if [ -d $LIBJAYLINK_SRC ] ; then
make install DESTDIR=$SYSROOT
fi
# jimtcl build & install into sysroot
if [ -d $JIMTCL_SRC ] ; then
mkdir -p $JIMTCL_BUILD_DIR
cd $JIMTCL_BUILD_DIR
$JIMTCL_SRC/configure --host=$HOST_TRIPLET --prefix=$PREFIX \
$JIMTCL_CONFIG
make -j $MAKE_JOBS
# Running "make" does not create this file for static builds on Windows but "make install" still expects it
touch $JIMTCL_BUILD_DIR/build-jim-ext
make install DESTDIR=$SYSROOT
fi
# OpenOCD build & install into sysroot
mkdir -p $OPENOCD_BUILD_DIR
cd $OPENOCD_BUILD_DIR

View File

@ -1,79 +0,0 @@
# SPDX-License-Identifier: GPL-2.0-or-later
#****************************************************************************
# File : Makefile *
# Contents : Code for NanoXplore USB-JTAG ANGIE adapter hardware. *
# Based on openULINK project by: Martin Schmoelzer. *
# Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
# <aboudjelida@nanoxplore.com> *
# <ahmederrachedbjld@gmail.com> *
# ***************************************************************************/
# Define the name of tools.
PREFIX =
# Small Device C Compiler: http://sdcc.sourceforge.net/
CC = $(PREFIX)sdcc
# 8051 assembler, part of the SDCC software package.
AS = $(PREFIX)sdas8051
# SDCC produces quite messy Intel HEX files. This tool is be used to re-format
# those files. It is not required for the firmware download functionality in
# the OpenOCD driver, but the resulting file is smaller.
PACKIHX = $(PREFIX)packihx
# GNU binutils size. Used to print the size of the IHX file generated by SDCC.
SIZE = size
# Source and header directories.
SRC_DIR = src
INCLUDE_DIR = include
CODE_SIZE = 0x3C00
XRAM_LOC = 0x3C00
XRAM_SIZE = 0x0400
CFLAGS = --std-sdcc99 --opt-code-size --model-small
LDFLAGS = --code-loc 0x0000 --code-size $(CODE_SIZE) --xram-loc $(XRAM_LOC) \
--xram-size $(XRAM_SIZE) --iram-size 256 --model-small
# list of base object files
OBJECTS = main.rel usb.rel protocol.rel jtag.rel delay.rel USBJmpTb.rel serial.rel gpif.rel i2c.rel
HEADERS = $(INCLUDE_DIR)/usb.h \
$(INCLUDE_DIR)/protocol.h \
$(INCLUDE_DIR)/jtag.h \
$(INCLUDE_DIR)/delay.h \
$(INCLUDE_DIR)/reg_ezusb.h \
$(INCLUDE_DIR)/io.h \
$(INCLUDE_DIR)/serial.h \
$(INCLUDE_DIR)/fx2macros.h \
$(INCLUDE_DIR)/msgtypes.h \
$(INCLUDE_DIR)/i2c.h
# Disable all built-in rules.
.SUFFIXES:
# Targets which are executed even when identically named file is present.
.PHONY: all, clean
all: angie_firmware.ihx
$(SIZE) angie_firmware.ihx
angie_firmware.ihx: $(OBJECTS)
$(CC) -mmcs51 $(LDFLAGS) -o $@ $^
# Rebuild every C module (there are only 8 of them) if any header changes.
%.rel: $(SRC_DIR)/%.c $(HEADERS)
$(CC) -c $(CFLAGS) -mmcs51 -I$(INCLUDE_DIR) -o $@ $<
%.rel: $(SRC_DIR)/%.a51
$(AS) -lsgo $@ $<
clean:
rm -f *.asm *.lst *.rel *.rst *.sym *.ihx *.lk *.map *.mem
bin: angie_firmware.ihx
makebin -p angie_firmware.ihx angie_firmware.bin
hex: angie_firmware.ihx
$(PACKIHX) angie_firmware.ihx > fx2.hex

View File

@ -1,37 +0,0 @@
#SPDX-License-Identifier: GPL-2.0-or-later
This is the ANGIE firmware for ANGIE USB-JTAG adapter.
The main components of ANGIE adapter are:
- Cypress EZ-USB FX2 microcontroller
- Spartan-6 FPGA
- SRAM memory chip
- Pin headers for various JTAG pin assignments
To compile the firmware, the SDCC compiler package is required. Most Linux
distributions include SDCC in their official package repositories. The SDCC
source code can be found at http://sdcc.sourceforge.net/
Simply type "make bin" in the ANGIE directory to compile the firmware.
"make clean" will remove all generated files except the BIN file
required for downloading the firmware to ANGIE.
Note that the EZ-USB FX2 microcontroller does not have on-chip flash,
ANGIE include on-board EEPROM memory to store the firmware program of
the FX2, but we are not going to use this method.
Instead, upon initial connection of the ANGIE adapter to the host PC
via USB, the EZ-USB FX2 core has enough intelligence to act as a
stand-alone USB device, responding to USB control requests and allowing
firmware download via a special VENDOR-type control request. Then, the
EZ-USB microcontroller simulates a disconnect and re-connect to the USB bus.
It may take up to two seconds for the host to recognize the newly connected
device before OpenOCD can proceed to execute JTAG commands. This delay is
only visible when OpenOCD first uses a blank (unconfigured) ANGIE device.
Once the firmware downloaded, the FX2 microcontroller activate its GPIF mode,
download the Spartan-6 FPGA's bitstream, program the FPGA rapidly, and switch
back to default io mode.
Once the user disconnects the ANGIE adapter, all its memory contents are lost
and the firmware & bitstream download process has to be executed again.

View File

@ -1,50 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/****************************************************************
File : delay.h *
Contents : Delays handling header file for NanoXplore *
USB-JTAG ANGIE adapter hardware. *
Based on openULINK project code by: Martin Schmoelzer. *
Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
<aboudjelida@nanoxplore.com> *
<ahmederrachedbjld@gmail.com> *
*****************************************************************/
#ifndef __DELAY_H
#define __DELAY_H
#include <stdint.h>
void syncdelay(uint8_t count);
void delay_5us(void);
void delay_1ms(void);
void delay_us(uint16_t delay);
void delay_ms(uint16_t delay);
#ifndef _IFREQ
#define _IFREQ 48000 /* IFCLK frequency in kHz */
#endif
/* CFREQ can be any one of: 48000, 24000, or 12000 */
#ifndef _CFREQ
#define _CFREQ 48000 /* CLKOUT frequency in kHz */
#endif
#if (_IFREQ < 5000)
#error "_IFREQ too small! Valid Range: 5000 to 48000..."
#endif
#if (_IFREQ > 48000)
#error "_IFREQ too large! Valid Range: 5000 to 48000..."
#endif
#if (_CFREQ != 48000)
#if (_CFREQ != 24000)
#if (_CFREQ != 12000)
#error "_CFREQ invalid! Valid values: 48000, 24000, 12000..."
#endif
#endif
#endif
/* Synchronization Delay formula: see TRM section 15-14 */
#define _SCYCL (3 * (_CFREQ) + 5 * (_IFREQ) - 1) / (2 * (_IFREQ))
#endif

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/* SPDX-License-Identifier: LGPL-2.1-or-later */
/*
* This code was taken from the fx2lib project from this link:
* https://github.com/djmuhlestein/fx2lib
*
* Copyright (C) 2009 Ubixum, Inc.
*/
/*! \file
* Macros for simple common tasks in fx2 firmware.
* */
#ifndef FX2MACROS_H
#define FX2MACROS_H
#include "reg_ezusb.h"
typedef enum {FALSE = 0, TRUE} BOOL_VALS;
/**
* \brief Used for getting and setting the CPU clock speed.
**/
typedef enum {CLK_12M = 0, CLK_24M, CLK_48M} CLK_SPD;
/**
* \brief Evaluates to a CLK_SPD enum.
**/
#define CPUFREQ (CLK_SPD)((CPUCS & bmclkspd) >> 3)
#endif

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/* SPDX-License-Identifier: GPL-2.0-or-later */
/****************************************************************************
File : i2c.h *
Contents : i2c bit-bang library *
Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
<aboudjelida@nanoxplore.com> *
<ahmederrachedbjld@gmail.com> *
*****************************************************************************/
#ifndef __I2C_H
#define __I2C_H
#include <stdbool.h>
#include <stdint.h>
#include <stdio.h>
void start_cd(void);
void repeated_start(void);
void stop_cd(void);
void clock_cd(void);
void send_ack(void);
void send_nack(void);
bool get_ack(void);
uint8_t get_address(uint8_t adr, uint8_t rdwr);
void send_byte(uint8_t input);
uint8_t receive_byte(void);
#endif

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/* SPDX-License-Identifier: GPL-2.0-or-later */
/****************************************************************************
File : io.h *
Contents : input/output declaration header file for NanoXplore *
USB-JTAG ANGIE adapter hardware. *
Based on openULINK project code by: Martin Schmoelzer. *
Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
<aboudjelida@nanoxplore.com> *
<ahmederrachedbjld@gmail.com> *
*****************************************************************************/
#ifndef __IO_H
#define __IO_H
#include "reg_ezusb.h"
/***************************************************************************
* JTAG Signals: *
***************************************************************************
* TMS ....... Test Mode Select *
* TCK ....... Test Clock *
* TDI ....... Test Data Input (from device point of view, not JTAG *
* adapter point of view!) *
* TDO ....... Test Data Output (from device point of view, not JTAG *
* adapter point of view!) *
* TRST ...... Test Reset: Used to reset the TAP Finite State Machine *
* into the Test Logic Reset state *
* SRST ..... Chip Reset *
***************************************************************************/
/* PORT A */
/* PA0 Not Connected */
/* PA1 Not Connected */
#define PIN_RDWR_B IOA2
#define PIN_CSI_B IOA3
#define PIN_INIT_B IOA4
#define PIN_PROGRAM_B IOA5
/* PA6 Not Connected */
/* PA7 Not Connected */
/* PORT B */
#define PIN_TRST IOB0
#define PIN_TMS IOB1
#define PIN_TCK IOB2
#define PIN_TDI IOB3
#define PIN_TDO IOB4
#define PIN_SRST IOB5
/* PB6 Not Connected */
/* PB7 Not Connected */
/* JTAG Signals with direction 'OUT' on port B */
/* PIN_TDI - PIN_TCK - PIN_TMS - PIN_TRST - PIN_SRST */
#define MASK_PORTB_DIRECTION_OUT (bmbit0 | bmbit1 | bmbit2 | bmbit3 | bmbit5)
/* PORT C */
#define PIN_T0 IOC0
#define PIN_T1 IOC1
#define PIN_T2 IOC2
#define PIN_T3 IOC3
#define PIN_T4 IOC4
/* PC5 Not Connected */
/* PC6 Not Connected */
/* PC7 Not Connected */
/* PORT D */
#define PIN_SDA IOD0
#define PIN_SCL IOD1
#define PIN_SDA_DIR IOD2
#define PIN_SCL_DIR IOD3
/* PD4 Not Connected */
/* PD5 Not Connected */
/* PD6 Not Connected */
/* PD7 Not Connected */
#endif

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/* SPDX-License-Identifier: GPL-2.0-or-later */
/****************************************************************************
File : jtag.h *
Contents : Jtag handling functions header file for NanoXplore *
USB-JTAG ANGIE adapter hardware. *
Based on openULINK project code by: Martin Schmoelzer. *
Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
<aboudjelida@nanoxplore.com> *
<ahmederrachedbjld@gmail.com> *
*****************************************************************************/
#ifndef __JTAG_H
#define __JTAG_H
#include <stdint.h>
uint16_t jtag_get_signals(void);
void jtag_configure_tck_delay(uint8_t scan_in, uint8_t scan_out,
uint8_t scan_io, uint8_t tck, uint8_t tms);
void jtag_clock_tms(uint8_t count, uint8_t sequence);
void jtag_slow_clock_tms(uint8_t count, uint8_t sequence);
void jtag_set_signals(uint8_t low, uint8_t high);
void jtag_clock_tck(uint16_t count);
void jtag_slow_clock_tck(uint16_t count);
void jtag_scan_in(uint8_t out_offset, uint8_t in_offset);
void jtag_scan_out(uint8_t out_offset);
void jtag_scan_io(uint8_t out_offset, uint8_t in_offset);
void jtag_slow_scan_in(uint8_t out_offset, uint8_t in_offset);
void jtag_slow_scan_out(uint8_t out_offset);
void jtag_slow_scan_io(uint8_t out_offset, uint8_t in_offset);
#endif

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/* SPDX-License-Identifier: GPL-2.0-or-later */
/****************************************************************************
File : msgtypes.h *
Contents : Definition of the commands supported by NanoXplore *
USB-JTAG ANGIE adapter hardware. *
Based on openULINK project code by: Martin Schmoelzer. *
Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
<aboudjelida@nanoxplore.com> *
<ahmederrachedbjld@gmail.com> *
*****************************************************************************/
/**
* @file
* Definition of the commands supported by the ANGIE firmware.
*
* Basically, two types of commands can be distinguished:
* - Commands with fixed payload size
* - Commands with variable payload size
*
* SCAN commands (in all variations) carry payloads of variable size, all
* other commands carry payloads of fixed size.
*
* In the case of SCAN commands, the payload size (n) is calculated by
* dividing the scan_size_bits variable by 8, rounding up the result.
*
* Offset zero always contains the command ID.
*
****************************************************************************
* CMD_SCAN_IN, CMD_SLOW_SCAN_IN: *
* *
* OUT: *
* offset 1: scan_size_bytes *
* offset 2: bits_last_byte *
* offset 3: tms_count_start + tms_count_end *
* offset 4: tms_sequence_start *
* offset 5: tms_sequence_end *
* *
* IN: *
* offset 0..n: TDO data *
****************************************************************************
* CMD_SCAN_OUT, CMD_SLOW_SCAN_OUT: *
* *
* OUT: *
* offset 1: scan_size_bytes *
* offset 2: bits_last_byte *
* offset 3: tms_count_start + tms_count_end *
* offset 4: tms_sequence_start *
* offset 5: tms_sequence_end *
* offset 6..x: TDI data *
****************************************************************************
* CMD_SCAN_IO, CMD_SLOW_SCAN_IO: *
* *
* OUT: *
* offset 1: scan_size_bytes *
* offset 2: bits_last_byte *
* offset 3: tms_count_start + tms_count_end *
* offset 4: tms_sequence_start *
* offset 5: tms_sequence_end *
* offset 6..x: TDI data *
* *
* IN: *
* offset 0..n: TDO data *
****************************************************************************
* CMD_CLOCK_TMS, CMD_SLOW_CLOCK_TMS: *
* *
* OUT: *
* offset 1: tms_count *
* offset 2: tms_sequence *
****************************************************************************
* CMD_CLOCK_TCK, CMD_SLOW_CLOCK_TCK: *
* *
* OUT: *
* offset 1: low byte of tck_count *
* offset 2: high byte of tck_count *
****************************************************************************
* CMD_CLOCK_SLEEP_US: *
* *
* OUT: *
* offset 1: low byte of sleep_us *
* offset 2: high byte of sleep_us *
****************************************************************************
* CMD_CLOCK_SLEEP_MS: *
* *
* OUT: *
* offset 1: low byte of sleep_ms *
* offset 2: high byte of sleep_ms *
****************************************************************************
* CMD_GET_SIGNALS: *
* *
* IN: *
* offset 0: current state of input signals *
* offset 1: current state of output signals *
****************************************************************************
* CMD_SET_SIGNALS: *
* *
* OUT: *
* offset 1: signals that should be de-asserted *
* offset 2: signals that should be asserted *
****************************************************************************
* CMD_CONFIGURE_TCK_FREQ: *
* *
* OUT: *
* offset 1: delay value for scan_in function *
* offset 2: delay value for scan_out function *
* offset 3: delay value for scan_io function *
* offset 4: delay value for clock_tck function *
* offset 5: delay value for clock_tms function *
****************************************************************************
* CMD_SET_LEDS: *
* *
* OUT: *
* offset 1: LED states: *
* Bit 0: turn COM LED on *
* Bit 1: turn RUN LED on *
* Bit 2: turn COM LED off *
* Bit 3: turn RUN LED off *
* Bits 7..4: Reserved *
****************************************************************************
* CMD_TEST: *
* *
* OUT: *
* offset 1: unused dummy value *
****************************************************************************
*/
#ifndef __MSGTYPES_H
#define __MSGTYPES_H
/*
* Command IDs:
*
* Bits 7..6: Reserved, should always be zero
* Bits 5..0: Command ID. There are 62 usable IDs. Of this 63 available IDs,
* the IDs 0x00..0x1F are commands with variable payload size,
* the IDs 0x20..0x3F are commands with fixed payload size.
*/
#define CMD_ID_MASK 0x3F
/* Commands with variable payload size */
#define CMD_SCAN_IN 0x00
#define CMD_SLOW_SCAN_IN 0x01
#define CMD_SCAN_OUT 0x02
#define CMD_SLOW_SCAN_OUT 0x03
#define CMD_SCAN_IO 0x04
#define CMD_SLOW_SCAN_IO 0x05
/* Commands with fixed payload size */
#define CMD_CLOCK_TMS 0x20
#define CMD_SLOW_CLOCK_TMS 0x21
#define CMD_CLOCK_TCK 0x22
#define CMD_SLOW_CLOCK_TCK 0x23
#define CMD_SLEEP_US 0x24
#define CMD_SLEEP_MS 0x25
#define CMD_GET_SIGNALS 0x26
#define CMD_SET_SIGNALS 0x27
#define CMD_CONFIGURE_TCK_FREQ 0x28
#define CMD_SET_LEDS 0x29
#define CMD_TEST 0x2A
/* JTAG signal definition for jtag_get_signals() -- Input signals! */
#define SIGNAL_TDO 1
/* JTAG signal definition for jtag_get_signals() -- Output signals! */
#define SIGNAL_TDI 8
#define SIGNAL_TMS 2
#define SIGNAL_TCK 4
#define SIGNAL_TRST 1
#define SIGNAL_SRST 32
#endif

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/* SPDX-License-Identifier: GPL-2.0-or-later */
/****************************************************************************
File : protocol.h *
Contents : Jtag commands handling protocol header file for NanoXplore *
USB-JTAG ANGIE adapter hardware. *
Based on openULINK project code by: Martin Schmoelzer. *
Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
<aboudjelida@nanoxplore.com> *
<ahmederrachedbjld@gmail.com> *
*****************************************************************************/
#ifndef __PROTOCOL_H
#define __PROTOCOL_H
#include <stdbool.h>
bool execute_command(void);
void command_loop(void);
#endif

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/* SPDX-License-Identifier: GPL-2.0-or-later */
/****************************************************************************
File : reg_ezusb.h *
Contents : FX2 microcontroller registers file for NanoXplore *
USB-JTAG ANGIE adapter hardware. *
Based on openULINK project code by: Martin Schmoelzer. *
Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
<aboudjelida@nanoxplore.com> *
<ahmederrachedbjld@gmail.com> *
*****************************************************************************/
#ifndef REG_EZUSB_H
#define REG_EZUSB_H
/**
* @file
* All information in this file was taken from the EZ-USB FX2 Technical
* Reference Manual, Cypress Semiconductor, 3901 North First Street
* San Jose, CA 95134 (www.cypress.com).
*
* The EZ-USB Technical Reference Manual is called "EZ-USB FX2 TRM" hereafter.
*/
/* Compiler-specific definitions of SBIT, SFR, SFRX, ... macros */
#include <mcs51/compiler.h>
/* Bit vectors */
#define bmbit0 0x01
#define bmbit1 0x02
#define bmbit2 0x04
#define bmbit3 0x08
#define bmbit4 0x10
#define bmbit5 0x20
#define bmbit6 0x40
#define bmbit7 0x80
/**************************************************************************
************************ Special Function Registers **********************
***************************************************************************/
SFR(IOA, 0x80);
SBIT(IOA0, 0x80, 0);
SBIT(IOA1, 0x80, 1);
SBIT(IOA2, 0x80, 2);
SBIT(IOA3, 0x80, 3);
SBIT(IOA4, 0x80, 4);
SBIT(IOA5, 0x80, 5);
SBIT(IOA6, 0x80, 6);
SBIT(IOA7, 0x80, 7);
SFR(SP, 0x81);
SFR(DPL0, 0x82);
SFR(DPH0, 0x83);
SFR(DPL1, 0x84);
SFR(DPL2, 0x85);
SFR(DPS, 0x86);
#define SEL bmbit0
/* Bit 1 read-only, always reads '0' */
/* Bit 2 read-only, always reads '0' */
/* Bit 3 read-only, always reads '0' */
/* Bit 4 read-only, always reads '0' */
/* Bit 5 read-only, always reads '0' */
/* Bit 6 read-only, always reads '0' */
/* Bit 7 read-only, always reads '0' */
SFR(PCON, 0x87);
#define IDLE bmbit0
#define STOP bmbit1
#define GF0 bmbit2
#define GF1 bmbit3
/* Bit 4 read-only, always reads '1' */
/* Bit 5 read-only, always reads '1' */
/* Bit 6 unused */
#define SMOD0 bmbit7
SFR(TCON, 0x88);
SBIT(IT0, 0x88, 0);
SBIT(IE0, 0x88, 1);
SBIT(IT1, 0x88, 2);
SBIT(IE1, 0x88, 3);
SBIT(TR0, 0x88, 4);
SBIT(TF0, 0x88, 5);
SBIT(TR1, 0x88, 6);
SBIT(TF1, 0x88, 7);
SFR(TMOD, 0x89);
SFR(TL0, 0x8A);
SFR(TL1, 0x8B);
SFR(TH0, 0x8C);
SFR(TH1, 0x8D);
SFR(CKCON, 0x8E);
#define MD0 bmbit0
#define MD1 bmbit1
#define MD2 bmbit2
#define T0M bmbit3
#define T1M bmbit4
#define T2M bmbit5
/* Bit 6 unused */
/* Bit 7 unused */
SFR(SPC_FNC, 0x8F);
#define BMWRS bmbit0
/* Bit 1 read-only, always reads '0' */
/* Bit 2 read-only, always reads '0' */
/* Bit 3 read-only, always reads '0' */
/* Bit 4 read-only, always reads '0' */
/* Bit 5 read-only, always reads '0' */
/* Bit 6 read-only, always reads '0' */
/* Bit 7 read-only, always reads '0' */
SFR(IOB, 0x90);
SBIT(IOB0, 0x90, 0);
SBIT(IOB1, 0x90, 1);
SBIT(IOB2, 0x90, 2);
SBIT(IOB3, 0x90, 3);
SBIT(IOB4, 0x90, 4);
SBIT(IOB5, 0x90, 5);
SBIT(IOB6, 0x90, 6);
SBIT(IOB7, 0x90, 7);
SFR(EXIF, 0x91);
SBIT(USBINT, 0x91, 4);
SBIT(I2CINT, 0x91, 5);
SBIT(IE4, 0x91, 6);
SBIT(IE5, 0x91, 7);
SFR(MPAGE, 0x92);
SFR(SCON0, 0x98);
SBIT(RI, 0x98, 0);
SBIT(TI, 0x98, 1);
SBIT(RB8, 0x98, 2);
SBIT(TB8, 0x98, 3);
SBIT(REN, 0x98, 4);
SBIT(SM2, 0x98, 5);
SBIT(SM1, 0x98, 6);
SBIT(SM0, 0x98, 7);
SFR(SBUF0, 0x99);
SFR(AUTOPTRH1, 0x9A);
SFR(AUTOPTRL1, 0x9B);
SFR(AUTOPTRH2, 0x9D);
SFR(AUTOPTRL2, 0x9E);
#define AUTOPTR1H AUTOPTRH1 /* for backwards compatibility with examples */
#define AUTOPTR1L AUTOPTRL1 /* for backwards compatibility with examples */
#define APTR1H AUTOPTRH1 /* for backwards compatibility with examples */
#define APTR1L AUTOPTRL1 /* for backwards compatibility with examples */
SFR(IOC, 0xA0);
SBIT(IOC0, 0xA0, 0);
SBIT(IOC1, 0xA0, 1);
SBIT(IOC2, 0xA0, 2);
SBIT(IOC3, 0xA0, 3);
SBIT(IOC4, 0xA0, 4);
SBIT(IOC5, 0xA0, 5);
SBIT(IOC6, 0xA0, 6);
SBIT(IOC7, 0xA0, 7);
SFR(INT2CLR, 0xA1);
SFR(INT4CLR, 0xA2);
SFR(IE, 0xA8);
SBIT(EX0, 0xA8, 0);
SBIT(ET0, 0xA8, 1);
SBIT(EX1, 0xA8, 2);
SBIT(ET1, 0xA8, 3);
SBIT(ES0, 0xA8, 4);
SBIT(ET2, 0xA8, 5);
SBIT(ES1, 0xA8, 6);
SBIT(EA, 0xA8, 7);
SFR(EP2468STAT, 0xAA);
#define EP8F bmbit7
#define EP8E bmbit6
#define EP6F bmbit5
#define EP6E bmbit4
#define EP4F bmbit3
#define EP4E bmbit2
#define EP2F bmbit1
#define EP2E bmbit0
SFR(EP24FIFOFLGS, 0xAB);
SFR(EP68FIFOFLGS, 0xAC);
SFR(AUTOPTRSETUP, 0xAF);
SFR(IOD, 0xB0);
SBIT(IOD0, 0xB0, 0);
SBIT(IOD1, 0xB0, 1);
SBIT(IOD2, 0xB0, 2);
SBIT(IOD3, 0xB0, 3);
SBIT(IOD4, 0xB0, 4);
SBIT(IOD5, 0xB0, 5);
SBIT(IOD6, 0xB0, 6);
SBIT(IOD7, 0xB0, 7);
SFR(IOE, 0xB1);
SFR(OEA, 0xB2);
SFR(OEB, 0xB3);
SFR(OEC, 0xB4);
SFR(OED, 0xB5);
SFR(OEE, 0xB6);
SFR(IP, 0xB8);
SBIT(PX0, 0xB8, 0);
SBIT(PT0, 0xB8, 1);
SBIT(PX1, 0xB8, 2);
SBIT(PT1, 0xB8, 3);
SBIT(PS0, 0xB8, 4);
SBIT(PT2, 0xB8, 5);
SBIT(PS1, 0xB8, 6);
/* Bit 7 read-only, always reads '1' */
SFR(EP01STAT, 0xBA);
SFR(GPIFTRIG, 0xBB);
#define BMGPIFDONE bmbit7
#define BMGPIFREAD bmbit2
#define GPIF_EP2 0
#define GPIF_EP4 1
#define GPIF_EP6 2
#define GPIF_EP8 3
SFR(GPIFSGLDATH, 0xBD);
SFR(GPIFSGLDATLX, 0xBE);
SFR(GPIFSGLDATLNOX, 0xBF);
SFR(SCON1, 0xC0);
SBIT(RI_1, 0xC0, 0);
SBIT(TI_1, 0xC0, 1);
SBIT(RB8_1, 0xC0, 2);
SBIT(TB8_1, 0xC0, 3);
SBIT(REN_1, 0xC0, 4);
SBIT(SM2_1, 0xC0, 5);
SBIT(SM1_1, 0xC0, 6);
SBIT(SM0_1, 0xC0, 7);
SFR(SBUF1, 0xC1);
SFR(T2CON, 0xC8);
SBIT(CPRL2, 0xC8, 0);
SBIT(C_T2, 0xC8, 1);
SBIT(TR2, 0xC8, 2);
SBIT(EXEN2, 0xC8, 3);
SBIT(TCLK, 0xC8, 4);
SBIT(RCLK, 0xC8, 5);
SBIT(EXF2, 0xC8, 6);
SBIT(TF2, 0xC8, 7);
SFR(RCAP2L, 0xCA);
SFR(RCAP2H, 0xCB);
SFR(TL2, 0xCC);
SFR(TH2, 0xCD);
SFR(PSW, 0xD0);
SBIT(P, 0xD0, 0);
SBIT(F1, 0xD0, 1);
SBIT(OV, 0xD0, 2);
SBIT(RS0, 0xD0, 3);
SBIT(RS1, 0xD0, 4);
SBIT(F0, 0xD0, 5);
SBIT(AC, 0xD0, 6);
SBIT(CY, 0xD0, 7);
SFR(EICON, 0xD8);
/* Bit 0 read-only, always reads '0' */
/* Bit 1 read-only, always reads '0' */
/* Bit 2 read-only, always reads '0' */
SBIT(INT6, 0xD8, 3);
SBIT(RESI, 0xD8, 4);
SBIT(ERESI, 0xD8, 5);
/* Bit 6 read-only, always reads '1' */
SBIT(SMOD1, 0xD8, 7);
SFR(ACC, 0xE0);
SFR(EIE, 0xE8);
SBIT(EUSB, 0xE8, 0);
SBIT(EI2C, 0xE8, 1);
SBIT(EX4, 0xE8, 2);
SBIT(EX5, 0xE8, 3);
SBIT(EWDI, 0xE8, 4);
/* Bit 5 read-only, always reads '1' */
/* Bit 6 read-only, always reads '1' */
/* Bit 7 read-only, always reads '1' */
SFR(B, 0xF0);
SFR(EIP, 0xF8);
SBIT(PUSB, 0xF8, 0);
SBIT(PI2C, 0xF8, 1);
SBIT(PX4, 0xF8, 2);
SBIT(PX5, 0xF8, 3);
SBIT(PX6, 0xF8, 4);
/* Bit 5 read-only, always reads '1' */
/* Bit 6 read-only, always reads '1' */
/* Bit 7 read-only, always reads '1' */
/**************************************************************************
***************************** XDATA Registers ****************************
***************************************************************************/
SFRX(GPIF_WAVE_DATA, 0xE400);
SFRX(RES_WAVEDATA_END, 0xE480);
/* General Configuration */
SFRX(CPUCS, 0xE600);
#define RES8051 bmbit0
#define CLKOE bmbit1
#define BMCLKINV bmbit2
#define bmclkspd0 bmbit3
#define bmclkspd1 bmbit4
#define bmclkspd (bmbit4 | bmbit3)
#define BMPRTCSTB bmbit5
/* PCON register */
#define BMSMOD0 bmbit7
SFRX(IFCONFIG, 0xE601);
#define BMIFCLKSRC bmbit7
#define BM3048MHZ bmbit6
#define BMIFCLKOE bmbit5
#define BMIFCLKPOL bmbit4
#define BMASYNC bmbit3
#define BMGSTATE bmbit2
#define BMIFCFG1 bmbit1
#define BMIFCFG0 bmbit0
#define BMIFCFGMASK (BMIFCFG0 | BMIFCFG1)
#define BMIFGPIF BMIFCFG1
SFRX(PINFLAGSAB, 0xE602);
SFRX(PINFLAGSCD, 0xE603);
SFRX(FIFORESET, 0xE604);
#define BMNAKALL bmbit7
SFRX(BREAKPT, 0xE605);
#define BMBREAK bmbit3
#define BMBPPULSE bmbit2
#define BMBPEN bmbit1
SFRX(BPADDRH, 0xE606);
SFRX(BPADDRL, 0xE607);
SFRX(UART230, 0xE608);
SFRX(FIFOPINPOLAR, 0xE609);
SFRX(REVID, 0xE60A);
SFRX(REVCTL, 0xE60B);
#define BMNOAUTOARM bmbit1
#define BMSKIPCOMMIT bmbit0
/* Endpoint Configuration */
SFRX(EP1OUTCFG, 0xE610);
SFRX(EP1INCFG, 0xE611);
SFRX(EP2CFG, 0xE612);
SFRX(EP4CFG, 0xE613);
SFRX(EP6CFG, 0xE614);
SFRX(EP8CFG, 0xE615);
SFRX(EP2FIFOCFG, 0xE618);
SFRX(EP4FIFOCFG, 0xE619);
SFRX(EP6FIFOCFG, 0xE61A);
SFRX(EP8FIFOCFG, 0xE61B);
#define BMINFM bmbit6
#define BMOEP bmbit5
#define BMAUTOOUT bmbit4
#define BMAUTOIN bmbit3
#define BMZEROLENIN bmbit2
#define BMWORDWIDE bmbit0
SFRX(EP2AUTOINLENH, 0xE620);
SFRX(EP2AUTOINLENL, 0xE621);
SFRX(EP4AUTOINLENH, 0xE622);
SFRX(EP4AUTOINLENL, 0xE623);
SFRX(EP6AUTOINLENH, 0xE612);
SFRX(EP6AUTOINLENL, 0xE613);
SFRX(EP8AUTOINLENH, 0xE614);
SFRX(EP8AUTOINLENL, 0xE615);
SFRX(EP2FIFOPFH, 0xE630);
SFRX(EP2FIFOPFL, 0xE631);
SFRX(EP4FIFOPFH, 0xE632);
SFRX(EP4FIFOPFL, 0xE633);
SFRX(EP6FIFOPFH, 0xE634);
SFRX(EP6FIFOPFL, 0xE635);
SFRX(EP8FIFOPFH, 0xE636);
SFRX(EP8FIFOPFL, 0xE637);
SFRX(EP2ISOINPKTS, 0xE640);
SFRX(EP4ISOINPKTS, 0xE641);
SFRX(EP6ISOINPKTS, 0xE642);
SFRX(EP8ISOINPKTS, 0xE643);
SFRX(INPKTEND, 0xE648);
SFRX(OUTPKTEND, 0xE649);
/* Interrupts */
SFRX(EP2FIFOIE, 0xE650);
SFRX(EP2FIFOIRQ, 0xE651);
SFRX(EP4FIFOIE, 0xE652);
SFRX(EP4FIFOIRQ, 0xE653);
SFRX(EP6FIFOIE, 0xE654);
SFRX(EP6FIFOIRQ, 0xE655);
SFRX(EP8FIFOIE, 0xE656);
SFRX(EP8FIFOIRQ, 0xE657);
SFRX(IBNIE, 0xE658);
SFRX(IBNIRQ, 0xE659);
#define EP0IBN bmbit0
#define EP1IBN bmbit1
#define EP2IBN bmbit2
#define EP4IBN bmbit3
#define EP6IBN bmbit4
#define EP8IBN bmbit5
SFRX(NAKIE, 0xE65A);
SFRX(NAKIRQ, 0xE65B);
#define EP8PING bmbit7
#define EP6PING bmbit6
#define EP4PING bmbit5
#define EP2PING bmbit4
#define EP1PING bmbit3
#define EP0PING bmbit2
#define IBN bmbit0
SFRX(USBIEN, 0xE65C);
SFRX(USBIRQ, 0xE65D);
#define SUDAVI bmbit0
#define SOFI bmbit1
#define SUTOKI bmbit2
#define SUSPI bmbit3
#define URESI bmbit4
#define HSGRANT bmbit5
#define EP0ACK bmbit6
SFRX(EPIE, 0xE65E);
SFRX(EPIRQ, 0xE65F);
SFRX(GPIFIE, 0xE660);
SFRX(GPIFIRQ, 0xE661);
SFRX(USBERRIE, 0xE662);
SFRX(USBERRIRQ, 0xE663);
SFRX(ERRCNTLIM, 0xE664);
SFRX(CLRERRCNT, 0xE665);
SFRX(INT2IVEC, 0xE666);
#define I2V0 bmbit2
#define I2V1 bmbit3
#define I2V2 bmbit4
#define I2V3 bmbit5
#define I2V4 bmbit6
SFRX(INT4IVEC, 0xE667);
SFRX(INTSETUP, 0xE668);
#define AV4EN bmbit0
#define INT4IN bmbit1
#define AV2EN bmbit3
/* Input/Output */
SFRX(PORTACFG, 0xE670);
#define BMINT0 bmbit0
#define BMINT1 bmbit1
#define BMFLAGD bmbit7
SFRX(PORTCCFG, 0xE671);
#define BMGPIFA0 bmbit0
#define BMGPIFA1 bmbit1
#define BMGPIFA2 bmbit2
#define BMGPIFA3 bmbit3
#define BMGPIFA4 bmbit4
#define BMGPIFA5 bmbit5
#define BMGPIFA6 bmbit6
#define BMGPIFA7 bmbit7
SFRX(PORTECFG, 0xE672);
#define BMT0OUT bmbit0
#define BMT1OUT bmbit1
#define BMT2OUT bmbit2
#define BMRXD0OUT bmbit3
#define BMRXD1OUT bmbit4
#define BMINT6 bmbit5
#define BMT2EX bmbit6
#define BMGPIFA8 bmbit7
SFRX(I2CS, 0xE678);
#define BMDONE bmbit0
#define BMACK bmbit1
#define BMBERR bmbit2
#define BMID (bmbit4 | bmbit3)
#define BMLASTRD bmbit5
#define BMSTOP bmbit6
#define BMSTART bmbit7
SFRX(I2DAT, 0xE679);
SFRX(I2CTL, 0xE67A);
#define BMSTOPIE bmbit1
#define BM400KHZ bmbit0
SFRX(XAUTODAT1, 0xE67B);
SFRX(XAUTODAT2, 0xE67C);
#define EXTAUTODAT1 XAUTODAT1
#define EXTAUTODAT2 XAUTODAT2
/* USB Control */
SFRX(USBCS, 0xE680);
#define SIGRSUME bmbit0
#define RENUM bmbit1
#define NOSYNSOF bmbit2
#define DISCON bmbit3
#define HSM bmbit7
SFRX(SUSPEND, 0xE681);
SFRX(WAKEUPCS, 0xE682);
#define BMWU2 bmbit7
#define BMWU bmbit6
#define BMWU2POL bmbit5
#define BMWUPOL bmbit4
#define BMDPEN bmbit2
#define BMWU2EN bmbit1
#define BMWUEN bmbit0
SFRX(TOGCTL, 0xE683);
#define BMTOGCTLEPMASK bmbit3 | bmbit2 | bmbit1 | bmbit0
#define BMRESETTOGGLE bmbit5
#define BMSETTOGGLE bmbit6
#define BMQUERYTOGGLE bmbit7
SFRX(USBFRAMEH, 0xE684);
SFRX(USBFRAMEL, 0xE685);
SFRX(MICROFRAME, 0xE686);
SFRX(FNADDR, 0xE687);
/* Endpoints */
SFRX(EP0BCH, 0xE68A);
SFRX(EP0BCL, 0xE68B);
SFRX(EP1OUTBC, 0xE68D);
SFRX(EP1INBC, 0xE68F);
SFRX(EP2BCH, 0xE690);
SFRX(EP2BCL, 0xE691);
SFRX(EP4BCH, 0xE694);
SFRX(EP4BCL, 0xE695);
SFRX(EP6BCH, 0xE698);
SFRX(EP6BCL, 0xE699);
SFRX(EP8BCH, 0xE69C);
SFRX(EP8BCL, 0xE69D);
SFRX(EP0CS, 0xE6A0);
#define HSNAK bmbit7
SFRX(EP1INCS, 0xE6A2);
SFRX(EP1OUTCS, 0xE6A1);
#define EPSTALL bmbit0
#define EPBSY bmbit1
SFRX(EP2CS, 0xE6A3);
SFRX(EP4CS, 0xE6A4);
SFRX(EP6CS, 0xE6A5);
SFRX(EP8CS, 0xE6A6);
#define BMEPEMPTY bmbit2
#define BMEPFULL bmbit3
#define BMNPAK (bmbit6 | bmbit5 | bmbit4)
SFRX(EP2FIFOFLGS, 0xE6A7);
SFRX(EP4FIFOFLGS, 0xE6A8);
SFRX(EP6FIFOFLGS, 0xE6A9);
SFRX(EP8FIFOFLGS, 0xE6AA);
SFRX(EP2FIFOBCH, 0xE6AB);
SFRX(EP2FIFOBCL, 0xE6AC);
SFRX(EP4FIFOBCH, 0xE6AD);
SFRX(EP4FIFOBCL, 0xE6AE);
SFRX(EP6FIFOBCH, 0xE6AF);
SFRX(EP6FIFOBCL, 0xE6B0);
SFRX(EP8FIFOBCH, 0xE6B1);
SFRX(EP8FIFOBCL, 0xE6B2);
SFRX(SUDPTRH, 0xE6B3);
SFRX(SUDPTRL, 0xE6B4);
SFRX(SUDPTRCTL, 0xE6B5);
#define BMSDPAUTO bmbit0
SFRX(SETUPDAT[8], 0xE6B8);
/* GPIF */
SFRX(GPIFWFSELECT, 0xE6C0);
SFRX(GPIFIDLECS, 0xE6C1);
SFRX(GPIFIDLECTL, 0xE6C2);
SFRX(GPIFCTLCFG, 0xE6C3);
SFRX(GPIFADRH, 0xE6C4);
SFRX(GPIFADRL, 0xE6C5);
SFRX(GPIFTCB3, 0xE6CE);
SFRX(GPIFTCB2, 0xE6CF);
SFRX(GPIFTCB1, 0xE6D0);
SFRX(GPIFTCB0, 0xE6D1);
#define EP2GPIFTCH GPIFTCB1 /* these are here for backwards compatibility */
#define EP2GPIFTCL GPIFTCB0
#define EP4GPIFTCH GPIFTCB1 /* these are here for backwards compatibility */
#define EP4GPIFTCL GPIFTCB0
#define EP6GPIFTCH GPIFTCB1 /* these are here for backwards compatibility */
#define EP6GPIFTCL GPIFTCB0
#define EP8GPIFTCH GPIFTCB1 /* these are here for backwards compatibility */
#define EP8GPIFTCL GPIFTCB0
SFRX(EP2GPIFFLGSEL, 0xE6D2);
SFRX(EP2GPIFPFSTOP, 0xE6D3);
SFRX(EP2GPIFTRIG, 0xE6D4);
SFRX(EP4GPIFFLGSEL, 0xE6DA);
SFRX(EP4GPIFPFSTOP, 0xE6DB);
SFRX(EP4GPIFTRIG, 0xE6DC);
SFRX(EP6GPIFFLGSEL, 0xE6E2);
SFRX(EP6GPIFPFSTOP, 0xE6E3);
SFRX(EP6GPIFTRIG, 0xE6E4);
SFRX(EP8GPIFFLGSEL, 0xE6EA);
SFRX(EP8GPIFPFSTOP, 0xE6EB);
SFRX(EP8GPIFTRIG, 0xE6EC);
SFRX(XGPIFSGLDATH, 0xE6F0);
SFRX(XGPIFSGLDATLX, 0xE6F1);
SFRX(XGPIFSGLDATLNOX, 0xE6F2);
SFRX(GPIFREADYCFG, 0xE6F3);
SFRX(GPIFREADYSTAT, 0xE6F4);
SFRX(GPIFABORT, 0xE6F5);
// UDMA
SFRX(FLOWSTATE, 0xE6C6);
SFRX(FLOWLOGIC, 0xE6C7);
SFRX(FLOWEQ0CTL, 0xE6C8);
SFRX(FLOWEQ1CTL, 0xE6C9);
SFRX(FLOWHOLDOFF, 0xE6CA);
SFRX(FLOWSTB, 0xE6CB);
SFRX(FLOWSTBEDGE, 0xE6CC);
SFRX(FLOWSTBHPERIOD, 0xE6CD);
SFRX(GPIFHOLDAMOUNT, 0xE60C);
SFRX(UDMACRCH, 0xE67D);
SFRX(UDMACRCL, 0xE67E);
SFRX(UDMACRCQUAL, 0xE67F);
/* Debug/Test
* The following registers are for Cypress's internal testing purposes only.
* These registers are not documented in the datasheet or the Technical Reference
* Manual as they were not designed for end user application usage
*/
SFRX(DBUG, 0xE6F8);
SFRX(TESTCFG, 0xE6F9);
SFRX(USBTEST, 0xE6FA);
SFRX(CT1, 0xE6FB);
SFRX(CT2, 0xE6FC);
SFRX(CT3, 0xE6FD);
SFRX(CT4, 0xE6FE);
/* Endpoint Buffers */
SFRX(EP0BUF[64], 0xE740);
SFRX(EP1INBUF[64], 0xE7C0);
SFRX(EP1OUTBUF[64], 0xE780);
SFRX(EP2FIFOBUF[512], 0xF000);
SFRX(EP4FIFOBUF[512], 0xF400);
SFRX(EP6FIFOBUF[512], 0xF800);
SFRX(EP8FIFOBUF[512], 0xFC00);
/* Error Correction Code (ECC) Registers (FX2LP/FX1 only) */
SFRX(ECCCFG, 0xE628);
SFRX(ECCRESET, 0xE629);
SFRX(ECC1B0, 0xE62A);
SFRX(ECC1B1, 0xE62B);
SFRX(ECC1B2, 0xE62C);
SFRX(ECC2B0, 0xE62D);
SFRX(ECC2B1, 0xE62E);
SFRX(ECC2B2, 0xE62F);
/* Feature Registers (FX2LP/FX1 only) */
SFRX(GPCR2, 0xE50D);
#define BMFULLSPEEDONLY bmbit4
#endif

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/* SPDX-License-Identifier: LGPL-2.1-or-later */
/**
* This code was taken from the fx2lib project from this link:
* https://github.com/djmuhlestein/fx2lib
*
* Copyright (C) 2009 Ubixum, Inc.
**/
/** \file serial.h
* defines functions to print to a serial console with SIO0
**/
#include "fx2macros.h"
#include <stdint.h>
/**
* This function inits sio0 to use T2CON (timer 2)
* See TRM 14.3.4.1 (Table 14-16)
* Certain baud rates have too high an error rate to work. All baud rates are .16%
* except:
*
* 12MHZ 24MHZ
* \li 57600 -6.99%
* \li 38400 -2.34% -2.34%
* \li 19200 -2.34%
*
* Possible Baud rates:
* \li 2400
* \li 4800
* \li 9600
* \li 19200
* \li 28800
* \li 38400
* \li 57600
*
* Any of these rates should work except 57600 at 12mhz. -2.34% is pushing
* most hardware specs for working. All rates at 48mhz work at .16%
**/
void sio0_init(uint32_t baud_rate) __critical; /* baud_rate max should be 57600 since int=2 bytes */
/**
* putchar('\\n') or putchar('\\r') both transmit \\r\\n
* Just use one or the other. (This makes terminal echo easy)
**/
int putchar(char c);
int getchar(void);

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/* SPDX-License-Identifier: GPL-2.0-or-later */
/****************************************************************************
File : usb.h *
Contents : usb communication handling header file for NanoXplore *
USB-JTAG ANGIE adapter hardware. *
Based on openULINK project code by: Martin Schmoelzer. *
Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
<aboudjelida@nanoxplore.com> *
<ahmederrachedbjld@gmail.com> *
*****************************************************************************/
#ifndef __USB_H
#define __USB_H
#include "reg_ezusb.h"
#include <stdint.h>
#include <stdbool.h>
/* High and Low byte of a word (uint16_t) */
#define HI8(word) (uint8_t)(((uint16_t)(word) >> 8) & 0xff)
#define LO8(word) (uint8_t)((uint16_t)(word) & 0xff)
/* Convenience functions */
#define STALL_EP0() (EP0CS |= EPSTALL)
#define CLEAR_IRQ() (USBINT = 0)
/*********** USB descriptors. See USB 2.0 Spec **********/
/* USB Descriptor Types. See USB 2.0 Spec */
#define DESCRIPTOR_TYPE_DEVICE 0x01
#define DESCRIPTOR_TYPE_CONFIGURATION 0x02
#define DESCRIPTOR_TYPE_STRING 0x03
#define DESCRIPTOR_TYPE_INTERFACE 0x04
#define DESCRIPTOR_TYPE_ENDPOINT 0x05
#define STR_DESCR(len, ...) { (len) * 2 + 2, DESCRIPTOR_TYPE_STRING, { __VA_ARGS__ } }
/** USB Device Descriptor. See USB 2.0 Spec */
struct usb_device_descriptor {
uint8_t blength; /**< Size of this descriptor in bytes. */
uint8_t bdescriptortype; /**< DEVICE Descriptor Type. */
uint16_t bcdusb; /**< USB specification release number (BCD). */
uint8_t bdeviceclass; /**< Class code. */
uint8_t bdevicesubclass; /**< Subclass code. */
uint8_t bdeviceprotocol; /**< Protocol code. */
uint8_t bmaxpacketsize0; /**< Maximum packet size for EP0 (8, 16, 32, 64). */
uint16_t idvendor; /**< USB Vendor ID. */
uint16_t idproduct; /**< USB Product ID. */
uint16_t bcddevice; /**< Device Release Number (BCD). */
uint8_t imanufacturer; /**< Index of manufacturer string descriptor. */
uint8_t iproduct; /**< Index of product string descriptor. */
uint8_t iserialnumber; /**< Index of string descriptor containing serial #. */
uint8_t bnumconfigurations; /**< Number of possible configurations. */
};
/** USB Configuration Descriptor. See USB 2.0 Spec */
struct usb_config_descriptor {
uint8_t blength; /**< Size of this descriptor in bytes. */
uint8_t bdescriptortype; /**< CONFIGURATION descriptor type. */
uint16_t wtotallength; /**< Combined total length of all descriptors. */
uint8_t bnuminterfaces; /**< Number of interfaces in this configuration. */
uint8_t bconfigurationvalue; /**< Value used to select this configuration. */
uint8_t iconfiguration; /**< Index of configuration string descriptor. */
uint8_t bmattributes; /**< Configuration characteristics. */
uint8_t maxpower; /**< Maximum power consumption in 2 mA units. */
};
/** USB Interface association Descriptor. See USB 2.0 Spec */
struct usb_interface_association_descriptor {
uint8_t blength;
uint8_t bdescriptortype;
uint8_t bfirstinterface;
uint8_t binterfacecount;
uint8_t bfunctionclass;
uint8_t bfunctionsubclass;
uint8_t bfunctionprotocol;
uint8_t ifunction;
};
/** USB Interface Descriptor. See USB 2.0 Spec */
struct usb_interface_descriptor {
uint8_t blength; /**< Size of this descriptor in bytes. */
uint8_t bdescriptortype; /**< INTERFACE descriptor type. */
uint8_t binterfacenumber; /**< Interface number. */
uint8_t balternatesetting; /**< Value used to select alternate setting. */
uint8_t bnumendpoints; /**< Number of endpoints used by this interface. */
uint8_t binterfaceclass; /**< Class code. */
uint8_t binterfacesubclass; /**< Subclass code. */
uint8_t binterfaceprotocol; /**< Protocol code. */
uint8_t iinterface; /**< Index of interface string descriptor. */
};
/** USB Endpoint Descriptor. See USB 2.0 Spec */
struct usb_endpoint_descriptor {
uint8_t blength; /**< Size of this descriptor in bytes. */
uint8_t bdescriptortype; /**< ENDPOINT descriptor type. */
uint8_t bendpointaddress; /**< Endpoint Address: IN/OUT + EP number. */
uint8_t bmattributes; /**< Endpoint Attributes: BULK/INTR/ISO/CTRL. */
uint16_t wmaxpacketsize; /**< Maximum packet size for this endpoint. */
uint8_t binterval; /**< Polling interval (in ms) for this endpoint. */
};
/** USB Language Descriptor. See USB 2.0 Spec */
struct usb_language_descriptor {
uint8_t blength; /**< Size of this descriptor in bytes. */
uint8_t bdescriptortype; /**< STRING descriptor type. */
uint16_t wlangid[]; /**< LANGID codes. */
};
/** USB String Descriptor. See USB 2.0 Spec */
struct usb_string_descriptor {
uint8_t blength; /**< Size of this descriptor in bytes. */
uint8_t bdescriptortype; /**< STRING descriptor type. */
uint16_t bstring[]; /**< UNICODE encoded string. */
};
/********************** USB Control Endpoint 0 related *********************/
/** USB Control Setup Data. See USB 2.0 Spec */
struct setup_data {
uint8_t bmrequesttype; /**< Characteristics of a request. */
uint8_t brequest; /**< Specific request. */
uint16_t wvalue; /**< Field that varies according to request. */
uint16_t windex; /**< Field that varies according to request. */
uint16_t wlength; /**< Number of bytes to transfer in data stage. */
};
/* External declarations for variables that need to be accessed outside of
* the USB module */
extern volatile bool ep1_out;
extern volatile bool ep1_in;
extern volatile bool ep6_out;
extern volatile __xdata __at 0xE6B8 struct setup_data setup_data;
/*
* USB Request Types (bmRequestType): See USB 2.0 Spec
*
* Bit 7: Data transfer direction
* 0 = Host-to-device
* 1 = Device-to-host
* Bit 6...5: Type
* 0 = Standard
* 1 = Class
* 2 = Vendor
* 3 = Reserved
* Bit 4...0: Recipient
* 0 = Device
* 1 = Interface
* 2 = Endpoint
* 3 = Other
* 4...31 = Reserved
*/
#define USB_DIR_OUT 0x00
#define USB_DIR_IN 0x80
#define USB_REQ_TYPE_STANDARD (0x00 << 5)
#define USB_REQ_TYPE_CLASS (0x01 << 5)
#define USB_REQ_TYPE_VENDOR (0x02 << 5)
#define USB_REQ_TYPE_RESERVED (0x03 << 5)
#define USB_RECIP_DEVICE 0x00
#define USB_RECIP_INTERFACE 0x01
#define USB_RECIP_ENDPOINT 0x02
#define USB_RECIP_OTHER 0x03
/* Clear Interface Request */
#define CF_DEVICE (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_DEVICE)
#define CF_INTERFACE (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_INTERFACE)
#define CF_ENDPOINT (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_ENDPOINT)
/* Get Configuration Request */
#define GC_DEVICE (USB_DIR_IN | USB_REQ_TYPE_STANDARD | USB_RECIP_DEVICE)
/* Get Descriptor Request */
#define GD_DEVICE (USB_DIR_IN | USB_REQ_TYPE_STANDARD | USB_RECIP_DEVICE)
/* Get Interface Request */
#define GI_INTERFACE (USB_DIR_IN | USB_REQ_TYPE_STANDARD | USB_RECIP_INTERFACE)
/* Get Status Request: See USB 1.1 spec, page 190 */
#define GS_DEVICE (USB_DIR_IN | USB_REQ_TYPE_STANDARD | USB_RECIP_DEVICE)
#define GS_INTERFACE (USB_DIR_IN | USB_REQ_TYPE_STANDARD | USB_RECIP_INTERFACE)
#define GS_ENDPOINT (USB_DIR_IN | USB_REQ_TYPE_STANDARD | USB_RECIP_ENDPOINT)
/* Set Address Request is handled by EZ-USB core */
/* Set Configuration Request */
#define SC_DEVICE (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_DEVICE)
/* Set Descriptor Request */
#define SD_DEVICE (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_DEVICE)
/* Set Feature Request */
#define SF_DEVICE (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_DEVICE)
#define SF_INTERFACE (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_INTERFACE)
#define SF_ENDPOINT (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_ENDPOINT)
/* Set Interface Request */
#define SI_INTERFACE (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_INTERFACE)
/* Synch Frame Request */
#define SY_ENDPOINT (USB_DIR_IN | USB_REQ_TYPE_STANDARD | USB_RECIP_ENDPOINT)
/* USB Requests (bRequest): See USB 2.0 Spec */
#define GET_STATUS 0
#define CLEAR_FEATURE 1
/* Value '2' is reserved for future use */
#define SET_FEATURE 3
/* Value '4' is reserved for future use */
#define SET_ADDRESS 5
#define GET_DESCRIPTOR 6
#define SET_DESCRIPTOR 7
#define GET_CONFIGURATION 8
#define SET_CONFIGURATION 9
#define GET_INTERFACE 10
#define SET_INTERFACE 11
#define SYNCH_FRAME 12
/* Standard Feature Selectors: See USB 2.0 Spec */
#define DEVICE_REMOTE_WAKEUP 1
#define ENDPOINT_HALT 0
/************************** EZ-USB specific stuff **************************/
/** USB Interrupts. See EZ-USB FX2-TRM, for details */
enum usb_isr {
SUDAV_ISR = 13,
SOF_ISR,
SUTOK_ISR,
SUSPEND_ISR,
USBRESET_ISR,
HIGHSPEED_ISR,
EP0ACK_ISR,
STUB_ISR,
EP0IN_ISR,
EP0OUT_ISR,
EP1IN_ISR,
EP1OUT_ISR,
EP2_ISR,
EP4_ISR,
EP6_ISR,
EP8_ISR,
IBN_ISR,
EP0PINGNAK_ISR,
EP1PINGNAK_ISR,
EP2PINGNAK_ISR,
EP4PINGNAK_ISR,
EP6PINGNAK_ISR,
EP8PINGNAK_ISR,
ERRORLIMIT_ISR,
EP2PIDERROR_ISR,
EP4PIDERROR_ISR,
EP6PIDERROR_ISR,
EP8PIDERROR_ISR,
EP2PFLAG_ISR,
EP4PFLAG_ISR,
EP6PFLAG_ISR,
EP8PFLAG_ISR,
EP2EFLAG_ISR,
EP4EFLAG_ISR,
EP6EFLAG_ISR,
EP8EFLAG_ISR,
EP2FFLAG_ISR,
EP4FFLAG_ISR,
EP6FFLAG_ISR,
EP8FFLAG_ISR,
GPIFCOMPLETE_ISR,
GPIFWAVEFORM_ISR
};
/*************************** Function Prototypes ***************************/
__xdata uint8_t *usb_get_endpoint_cs_reg(uint8_t ep);
void usb_reset_data_toggle(uint8_t ep);
bool usb_handle_get_status(void);
bool usb_handle_clear_feature(void);
bool usb_handle_set_feature(void);
bool usb_handle_get_descriptor(void);
void usb_handle_set_interface(void);
void usb_handle_setup_data(void);
void usb_handle_i2c_in(void);
void usb_handle_i2c_out(void);
void i2c_recieve(void);
void ep_init(void);
void interrupt_init(void);
void io_init(void);
#endif

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; SPDX-License-Identifier: GPL-2.0-or-later
;****************************************************************************
; File : USBJmpTb.a51 *
; Contents : Interruptions vector configuration. *
; Based on openULINK project code by: Martin Schmoelzer. *
; Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
; <aboudjelida@nanoxplore.com> *
; <ahmederrachedbjld@gmail.com> *
;****************************************************************************
.module JUMPTABLE
.globl USB_AutoVector
.globl USB_Jump_Table
.globl _sudav_isr, _sof_isr, _sutok_isr, _suspend_isr, _usbreset_isr, _highspeed_isr, _ep0ack_isr, _stub_isr, _ep0in_isr, _ep0out_isr, _ep1in_isr, _ep1out_isr, _ep2_isr, _ep4_isr, _ep6_isr, _ep8_isr, _ibn_isr
.globl _ep0pingnak_isr, _ep1pingnak_isr, _ep2pingnak_isr, _ep4pingnak_isr, _ep6pingnak_isr, _ep8pingnak_isr, _errorlimit_isr, _stub_isr, _stub_isr, _stub_isr, _ep2piderror_isr, _ep4piderror_isr, _ep6piderror_isr, _ep8piderror_isr
.globl _ep2pflag_isr, _ep4pflag_isr, _ep6pflag_isr, _ep8pflag_isr, _ep2eflag_isr, _ep4eflag_isr, _ep6eflag_isr, _ep8eflag_isr, _ep2fflag_isr, _ep4fflag_isr, _ep6fflag_isr, _ep8fflag_isr, _gpifcomplete_isr, _gpifwaveform_isr
;--------------------------------------------------------------------------;
; Interrupt Vectors ;
;--------------------------------------------------------------------------;
.area USB_JV (ABS,OVR) ; Absolute, Overlay
.org 0x43 ; USB interrupt (INT2) jumps here
USB_AutoVector = #. + 2
ljmp USB_Jump_Table ; Autovector will replace byte 45
;--------------------------------------------------------------------------;
; USB Jump Table ;
;--------------------------------------------------------------------------;
.area USB_JT (ABS) ; Absolute placement
.org 0x0200 ; Place jump table at 0x0200
USB_Jump_Table: ; autovector jump table
ljmp _sudav_isr ; (00) Setup Data Available
.db 0
ljmp _sof_isr ; (04) Start of Frame
.db 0
ljmp _sutok_isr ; (08) Setup Data Loading
.db 0
ljmp _suspend_isr ; (0C) Global Suspend
.db 0
ljmp _usbreset_isr ; (10) USB Reset
.db 0
ljmp _highspeed_isr ; (14) Entered High Speed
.db 0
ljmp _ep0ack_isr ; (18) EP0ACK
.db 0
ljmp _stub_isr ; (1C) Reserved
.db 0
ljmp _ep0in_isr ; (20) EP0 In
.db 0
ljmp _ep0out_isr ; (24) EP0 Out
.db 0
ljmp _ep1in_isr ; (28) EP1 In
.db 0
ljmp _ep1out_isr ; (2C) EP1 Out
.db 0
ljmp _ep2_isr ; (30) EP2 In/Out
.db 0
ljmp _ep4_isr ; (34) EP4 In/Out
.db 0
ljmp _ep6_isr ; (38) EP6 In/Out
.db 0
ljmp _ep8_isr ; (3C) EP8 In/Out
.db 0
ljmp _ibn_isr ; (40) IBN
.db 0
ljmp _stub_isr ; (44) Reserved
.db 0
ljmp _ep0pingnak_isr ; (48) EP0 PING NAK
.db 0
ljmp _ep1pingnak_isr ; (4C) EP1 PING NAK
.db 0
ljmp _ep2pingnak_isr ; (50) EP2 PING NAK
.db 0
ljmp _ep4pingnak_isr ; (54) EP4 PING NAK
.db 0
ljmp _ep6pingnak_isr ; (58) EP6 PING NAK
.db 0
ljmp _ep8pingnak_isr ; (5C) EP8 PING NAK
.db 0
ljmp _errorlimit_isr ; (60) Error Limit
.db 0
ljmp _stub_isr ; (64) Reserved
.db 0
ljmp _stub_isr ; (68) Reserved
.db 0
ljmp _stub_isr ; (6C) Reserved
.db 0
ljmp _ep2piderror_isr ; (70) EP2 ISO Pid Sequence Error
.db 0
ljmp _ep4piderror_isr ; (74) EP4 ISO Pid Sequence Error
.db 0
ljmp _ep6piderror_isr ; (78) EP6 ISO Pid Sequence Error
.db 0
ljmp _ep8piderror_isr ; (7C) EP8 ISO Pid Sequence Error
.db 0
ljmp _ep2pflag_isr ; (80) EP2 Programmable Flag
.db 0
ljmp _ep4pflag_isr ; (84) EP4 Programmable Flag
.db 0
ljmp _ep6pflag_isr ; (88) EP6 Programmable Flag
.db 0
ljmp _ep8pflag_isr ; (8C) EP8 Programmable Flag
.db 0
ljmp _ep2eflag_isr ; (90) EP2 Empty Flag
.db 0
ljmp _ep4eflag_isr ; (94) EP4 Empty Flag
.db 0
ljmp _ep6eflag_isr ; (98) EP6 Empty Flag
.db 0
ljmp _ep8eflag_isr ; (9C) EP8 Empty Flag
.db 0
ljmp _ep2fflag_isr ; (A0) EP2 Full Flag
.db 0
ljmp _ep4fflag_isr ; (A4) EP4 Full Flag
.db 0
ljmp _ep6fflag_isr ; (A8) EP6 Full Flag
.db 0
ljmp _ep8fflag_isr ; (AC) EP8 Full Flag
.db 0
ljmp _gpifcomplete_isr ; (B0) GPIF Operation Complete
.db 0
ljmp _gpifwaveform_isr ; (B4) GPIF Waveform
.db 0

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// SPDX-License-Identifier: GPL-2.0-or-later
/****************************************************************************
File : delay.c *
Contents : Delays handling fucntions code for NanoXplore *
USB-JTAG ANGIE adapter hardware. *
Based on openULINK project code by: Martin Schmoelzer. *
Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
<aboudjelida@nanoxplore.com> *
<ahmederrachedbjld@gmail.com> *
*****************************************************************************/
#include "delay.h"
#include <mcs51/compiler.h>
void syncdelay(uint8_t count)
{
for (uint8_t i = 0; i < count; i++)
NOP();
}
void delay_5us(void)
{
NOP();
}
void delay_1ms(void)
{
uint16_t i;
for (i = 0; i < 598; i++)
;
}
void delay_us(uint16_t delay)
{
uint16_t i;
uint16_t maxcount = (delay / 5);
for (i = 0; i < maxcount; i++)
delay_5us();
}
void delay_ms(uint16_t delay)
{
uint16_t i;
for (i = 0; i < delay; i++)
delay_1ms();
}

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// SPDX-License-Identifier: GPL-2.0-or-later
/*
This program configures the General Programmable Interface (GPIF) for FX2.
Please do not modify sections of text which are marked as "DO NOT EDIT ...".
*/
/* GPIF Program Code */
#include "reg_ezusb.h"
#include "delay.h"
/****************************** GPIF PROGRAM CODE ********************************/
/* DO NOT EDIT ... */
const char wavedata[128] = {
// Wave 0
/* LenBr */ 0x01, 0x3F, 0x01, 0x01, 0x01, 0x01, 0x01, 0x07,
/* Opcode*/ 0x02, 0x07, 0x02, 0x02, 0x02, 0x02, 0x02, 0x00,
/* Output*/ 0x04, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
/* LFun */ 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F,
// Wave 1
/* LenBr */ 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x07,
/* Opcode*/ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* Output*/ 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
/* LFun */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F,
// Wave 2
/* LenBr */ 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x07,
/* Opcode*/ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* Output*/ 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
/* LFun */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F,
// Wave 3
/* LenBr */ 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x07,
/* Opcode*/ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* Output*/ 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
/* LFun */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F,
};
/* END DO NOT EDIT */
/* DO NOT EDIT ... */
const char flowstates[36] = {
/* Wave 0 flowstates */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* Wave 1 flowstates */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* Wave 2 flowstates */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* Wave 3 flowstates */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
};
/* END DO NOT EDIT */
/* DO NOT EDIT ... */
const char initdata[7] = {
/* Regs */ 0xE0, 0x00, 0x00, 0x07, 0xEE, 0xF2, 0x00
};
/* END DO NOT EDIT */
void gpif_init(void)
{
uint8_t i;
IFCONFIG = 0xEE;
GPIFABORT = 0xFF; /* abort any waveforms pending */
GPIFREADYCFG = initdata[0];
GPIFCTLCFG = initdata[1];
GPIFIDLECS = initdata[2];
GPIFIDLECTL = initdata[3];
GPIFWFSELECT = initdata[5];
GPIFREADYSTAT = initdata[6];
/* use dual autopointer feature... */
AUTOPTRSETUP = 0x07;
/* source */
AUTOPTRH1 = (uint8_t)(((uint16_t)(&wavedata) >> 8) & 0xff);
AUTOPTRL1 = (uint8_t)((uint16_t)(&wavedata) & 0xff);
/* destination */
AUTOPTRH2 = 0xE4;
AUTOPTRL2 = 0x00;
/* transfer */
for (i = 0x00; i < 128; i++)
EXTAUTODAT2 = EXTAUTODAT1;
/* GPIF address pins update when GPIFADRH/L written */
syncdelay(3);
GPIFADRH = 0x00; /* bits[7:1] always 0 */
syncdelay(3);
GPIFADRL = 0x00; /* point to PERIPHERAL address 0x0000 */
/* Configure GPIF flowstates registers for Wave 0 of wavedata */
FLOWSTATE = flowstates[0];
FLOWLOGIC = flowstates[1];
FLOWEQ0CTL = flowstates[2];
FLOWEQ1CTL = flowstates[3];
FLOWHOLDOFF = flowstates[4];
FLOWSTB = flowstates[5];
FLOWSTBEDGE = flowstates[6];
FLOWSTBHPERIOD = flowstates[7];
}

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// SPDX-License-Identifier: GPL-2.0-or-later
/****************************************************************************
File : i2c.cpp *
Contents : i2c bit-bang library *
Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
<aboudjelida@nanoxplore.com> *
<ahmederrachedbjld@gmail.com> *
*****************************************************************************/
#include "i2c.h"
#include "io.h"
#include "delay.h"
#include "reg_ezusb.h"
void start_cd(void)
{
PIN_SCL_DIR = 0;
PIN_SDA_DIR = 0;
delay_us(10);
PIN_SDA = 0; //SDA = 1;
delay_us(1);
PIN_SCL = 0; //SCL = 1;
delay_us(1);
}
void repeated_start(void)
{
PIN_SDA = 1;
delay_us(1);
PIN_SCL = 1;
delay_us(1);
PIN_SDA = 0;
delay_us(1);
PIN_SCL = 0;
delay_us(1);
}
void stop_cd(void)
{
PIN_SDA = 0;
delay_us(1);
PIN_SCL = 1;
delay_us(1);
PIN_SDA = 1;
delay_us(1);
PIN_SDA_DIR = 1;
delay_us(1);
PIN_SCL_DIR = 1;
delay_us(1);
}
void clock_cd(void)
{
PIN_SCL = 1;
delay_us(1);
PIN_SCL = 0;
delay_us(1);
}
void send_ack(void)
{
PIN_SDA = 0;
delay_us(1);
PIN_SCL = 1;
delay_us(1);
PIN_SCL = 0;
delay_us(1);
}
void send_nack(void)
{
PIN_SDA = 1;
delay_us(1);
PIN_SCL = 1;
delay_us(1);
PIN_SCL = 0;
delay_us(1);
}
bool get_ack(void)
{
PIN_SDA_DIR = 1;
delay_us(1);
OED = 0xFE;
PIN_SCL = 1;
delay_us(1);
bool ack = PIN_SDA;
PIN_SCL = 0;
delay_us(1);
OED = 0xFF;
PIN_SDA_DIR = 0;
delay_us(1);
return ack;
}
/* here address(8 bits) = adr (7 bits) + type (1 bit) */
uint8_t get_address(uint8_t adr, uint8_t rdwr)
{
adr &= 0x7F;
adr = adr << 1;
adr |= (rdwr & 0x01);
return adr;
}
/* here send bit after bit and clocking scl with each bit */
void send_byte(uint8_t input)
{
for (uint8_t i = 0; i < 8; i++) {
if ((input & 0x80)) {
PIN_SDA = 1;
delay_us(1);
clock_cd();
} else {
PIN_SDA = 0;
delay_us(1);
clock_cd();
}
input = input << 1;
}
}
/* here receive bit after bit and clocking scl with each bit */
uint8_t receive_byte(void)
{
PIN_SDA_DIR = 1; //FX2 <-- FPGA
OED = 0xFE;
uint8_t input = 0x00;
for (uint8_t i = 0; i < 8; i++) {
PIN_SCL = 1;
delay_us(1);
input = input << 1;
if (PIN_SDA == 1)
input |= 0x01;
else
input |= 0X00;
PIN_SCL = 0;
delay_us(1);
}
OED = 0xFF;
PIN_SDA_DIR = 0;
return input;
}

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// SPDX-License-Identifier: GPL-2.0-or-later
/****************************************************************************
File : jtag.c *
Contents : Jtag handling functions code for NanoXplore *
USB-JTAG ANGIE adapter hardware. *
Based on openULINK project code by: Martin Schmoelzer. *
Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
<aboudjelida@nanoxplore.com> *
<ahmederrachedbjld@gmail.com> *
*****************************************************************************/
#include "jtag.h"
#include "io.h"
#include "msgtypes.h"
#include "reg_ezusb.h"
#include <stdbool.h>
#include <serial.h>
#include <stdio.h>
/** Delay value for SCAN_IN operations with less than maximum TCK frequency */
uint8_t delay_scan_in;
/** Delay value for SCAN_OUT operations with less than maximum TCK frequency */
uint8_t delay_scan_out;
/** Delay value for SCAN_IO operations with less than maximum TCK frequency */
uint8_t delay_scan_io;
/** Delay value for CLOCK_TCK operations with less than maximum frequency */
uint8_t delay_tck;
/** Delay value for CLOCK_TMS operations with less than maximum frequency */
uint8_t delay_tms;
/**
* Perform JTAG SCAN-IN operation at maximum TCK frequency.
*
* Dummy data is shifted into the JTAG chain via TDI, TDO data is sampled and
* stored in the EP2 IN buffer.
*
* Maximum achievable TCK frequency is 182 kHz for ANGIE clocked at 24 MHz.
*
* @param out_offset offset in EP1OUTBUF where payload data starts
* @param in_offset
*/
void jtag_scan_in(uint8_t out_offset, uint8_t in_offset)
{
uint8_t scan_size_bytes, bits_last_byte;
uint8_t tms_count_start, tms_count_end;
uint8_t tms_sequence_start, tms_sequence_end;
uint8_t tdo_data, i, j;
uint8_t outb_buffer;
/* Get parameters from EP1OUTBUF */
scan_size_bytes = EP1OUTBUF[out_offset];
bits_last_byte = EP1OUTBUF[out_offset + 1];
tms_count_start = (EP1OUTBUF[out_offset + 2] >> 4) & 0x0F;
tms_count_end = EP1OUTBUF[out_offset + 2] & 0x0F;
tms_sequence_start = EP1OUTBUF[out_offset + 3];
tms_sequence_end = EP1OUTBUF[out_offset + 4];
if (tms_count_start > 0)
jtag_clock_tms(tms_count_start, tms_sequence_start);
outb_buffer = IOB & ~(bmbit1 | bmbit2 | bmbit3);
/* Shift all bytes except the last byte */
for (i = 0; i < scan_size_bytes - 1; i++) {
tdo_data = 0;
for (j = 0; j < 8; j++) {
IOB = outb_buffer; /* TCK changes here */
tdo_data = tdo_data >> 1;
IOB = (outb_buffer | bmbit2);
if (PIN_TDO)
tdo_data |= 0x80;
}
/* Copy TDO data to EP1INBUF */
EP1INBUF[i + in_offset] = tdo_data;
}
tdo_data = 0;
/* Shift the last byte */
for (j = 0; j < bits_last_byte; j++) {
/* Assert TMS signal if requested and this is the last bit */
if (j == (bits_last_byte - 1) && tms_count_end > 0) {
outb_buffer |= bmbit1;
tms_count_end--;
tms_sequence_end = tms_sequence_end >> 1;
}
IOB = outb_buffer; /* TCK changes here */
tdo_data = tdo_data >> 1;
IOB = (outb_buffer | bmbit2);
if (PIN_TDO)
tdo_data |= 0x80;
}
tdo_data = tdo_data >> (8 - bits_last_byte);
/* Copy TDO data to EP1INBUF */
EP1INBUF[i + in_offset] = tdo_data;
/* Move to correct end state */
if (tms_count_end > 0)
jtag_clock_tms(tms_count_end, tms_sequence_end);
}
/**
* Perform JTAG SCAN-IN operation at variable TCK frequency.
*
* Dummy data is shifted into the JTAG chain via TDI, TDO data is sampled and
* stored in the EP2 IN buffer.
*
* Maximum achievable TCK frequency is 113 kHz for ANGIE clocked at 24 MHz.
*
* @param out_offset offset in EP1OUTBUF where payload data starts
* @param in_offset
*/
void jtag_slow_scan_in(uint8_t out_offset, uint8_t in_offset)
{
uint8_t scan_size_bytes, bits_last_byte;
uint8_t tms_count_start, tms_count_end;
uint8_t tms_sequence_start, tms_sequence_end;
uint8_t tdo_data, i, j, k;
uint8_t outb_buffer;
/* Get parameters from EP1OUTBUF */
scan_size_bytes = EP1OUTBUF[out_offset];
bits_last_byte = EP1OUTBUF[out_offset + 1];
tms_count_start = (EP1OUTBUF[out_offset + 2] >> 4) & 0x0F;
tms_count_end = EP1OUTBUF[out_offset + 2] & 0x0F;
tms_sequence_start = EP1OUTBUF[out_offset + 3];
tms_sequence_end = EP1OUTBUF[out_offset + 4];
if (tms_count_start > 0)
jtag_slow_clock_tms(tms_count_start, tms_sequence_start);
outb_buffer = IOB & ~(bmbit3 | bmbit2 | bmbit1);
/* Shift all bytes except the last byte */
for (i = 0; i < scan_size_bytes - 1; i++) {
tdo_data = 0;
for (j = 0; j < 8; j++) {
IOB = outb_buffer; /* TCK changes here */
for (k = 0; k < delay_scan_in; k++)
;
tdo_data = tdo_data >> 1;
IOB = (outb_buffer | bmbit2);
for (k = 0; k < delay_scan_in; k++)
;
if (PIN_TDO)
tdo_data |= 0x80;
}
/* Copy TDO data to EP1INBUF */
EP1INBUF[i + in_offset] = tdo_data;
}
tdo_data = 0;
/* Shift the last byte */
for (j = 0; j < bits_last_byte; j++) {
/* Assert TMS signal if requested and this is the last bit */
if (j == (bits_last_byte - 1) && tms_count_end > 0) {
outb_buffer |= bmbit1;
tms_count_end--;
tms_sequence_end = tms_sequence_end >> 1;
}
IOB = outb_buffer; /* TCK changes here */
for (k = 0; k < delay_scan_in; k++)
;
tdo_data = tdo_data >> 1;
IOB = (outb_buffer | bmbit2);
for (k = 0; k < delay_scan_in; k++)
;
if (PIN_TDO)
tdo_data |= 0x80;
}
tdo_data = tdo_data >> (8 - bits_last_byte);
/* Copy TDO data to EP1INBUF */
EP1INBUF[i + in_offset] = tdo_data;
/* Move to correct end state */
if (tms_count_end > 0)
jtag_slow_clock_tms(tms_count_end, tms_sequence_end);
}
/**
* Perform JTAG SCAN-OUT operation at maximum TCK frequency.
*
* Data stored in EP2 OUT buffer is shifted into the JTAG chain via TDI, TDO
* data is not sampled.
* The TAP-FSM state is always left in the PAUSE-DR/PAUSE-IR state.
*
* Maximum achievable TCK frequency is 142 kHz for ANGIE clocked at 24 MHz.
*
* @param out_offset offset in EP1OUTBUF where payload data starts
*/
void jtag_scan_out(uint8_t out_offset)
{
uint8_t scan_size_bytes, bits_last_byte;
uint8_t tms_count_start, tms_count_end;
uint8_t tms_sequence_start, tms_sequence_end;
uint8_t tdi_data, i, j;
uint8_t outb_buffer;
/* Get parameters from EP1OUTBUF */
scan_size_bytes = EP1OUTBUF[out_offset];
bits_last_byte = EP1OUTBUF[out_offset + 1];
tms_count_start = (EP1OUTBUF[out_offset + 2] >> 4) & 0x0F;
tms_count_end = EP1OUTBUF[out_offset + 2] & 0x0F;
tms_sequence_start = EP1OUTBUF[out_offset + 3];
tms_sequence_end = EP1OUTBUF[out_offset + 4];
if (tms_count_start > 0)
jtag_clock_tms(tms_count_start, tms_sequence_start);
outb_buffer = IOB & ~(bmbit2 | bmbit1);
/* Shift all bytes except the last byte */
for (i = 0; i < scan_size_bytes - 1; i++) {
tdi_data = EP1OUTBUF[i + out_offset + 5];
for (j = 0; j < 8; j++) {
if (tdi_data & 0x01)
outb_buffer |= bmbit3;
else
outb_buffer &= ~bmbit3;
IOB = outb_buffer; /* TDI and TCK change here */
tdi_data = tdi_data >> 1;
IOB = (outb_buffer | bmbit2);
}
}
tdi_data = EP1OUTBUF[i + out_offset + 5];
/* Shift the last byte */
for (j = 0; j < bits_last_byte; j++) {
if (tdi_data & 0x01)
outb_buffer |= bmbit3;
else
outb_buffer &= ~bmbit3;
/* Assert TMS signal if requested and this is the last bit */
if (j == (bits_last_byte - 1) && tms_count_end > 0) {
outb_buffer |= bmbit1;
tms_count_end--;
tms_sequence_end = tms_sequence_end >> 1;
}
IOB = outb_buffer; /* TDI and TCK change here */
tdi_data = tdi_data >> 1;
IOB = (outb_buffer | bmbit2);
}
/* Move to correct end state */
if (tms_count_end > 0)
jtag_clock_tms(tms_count_end, tms_sequence_end);
}
/**
* Perform JTAG SCAN-OUT operation at maximum TCK frequency.
*
* Data stored in EP2 OUT buffer is shifted into the JTAG chain via TDI, TDO
* data is not sampled.
* The TAP-FSM state is always left in the PAUSE-DR/PAUSE-IR state.
*
* Maximum achievable TCK frequency is 97 kHz for ANGIE clocked at 24 MHz.
*
* @param out_offset offset in EP1OUTBUF where payload data starts
*/
void jtag_slow_scan_out(uint8_t out_offset)
{
uint8_t scan_size_bytes, bits_last_byte;
uint8_t tms_count_start, tms_count_end;
uint8_t tms_sequence_start, tms_sequence_end;
uint8_t tdi_data, i, j, k;
uint8_t outb_buffer;
/* Get parameters from EP1OUTBUF */
scan_size_bytes = EP1OUTBUF[out_offset];
bits_last_byte = EP1OUTBUF[out_offset + 1];
tms_count_start = (EP1OUTBUF[out_offset + 2] >> 4) & 0x0F;
tms_count_end = EP1OUTBUF[out_offset + 2] & 0x0F;
tms_sequence_start = EP1OUTBUF[out_offset + 3];
tms_sequence_end = EP1OUTBUF[out_offset + 4];
if (tms_count_start > 0)
jtag_slow_clock_tms(tms_count_start, tms_sequence_start);
outb_buffer = IOB & ~(bmbit2 | bmbit1);
/* Shift all bytes except the last byte */
for (i = 0; i < scan_size_bytes - 1; i++) {
tdi_data = EP1OUTBUF[i + out_offset + 5];
for (j = 0; j < 8; j++) {
if (tdi_data & 0x01)
outb_buffer |= bmbit3;
else
outb_buffer &= ~bmbit3;
IOB = outb_buffer; /* TDI and TCK change here */
for (k = 0; k < delay_scan_out; k++)
;
tdi_data = tdi_data >> 1;
IOB = (outb_buffer | bmbit2);
for (k = 0; k < delay_scan_out; k++)
;
}
}
tdi_data = EP1OUTBUF[i + out_offset + 5];
/* Shift the last byte */
for (j = 0; j < bits_last_byte; j++) {
if (tdi_data & 0x01)
outb_buffer |= bmbit3;
else
outb_buffer &= ~bmbit3;
/* Assert TMS signal if requested and this is the last bit */
if (j == (bits_last_byte - 1) && tms_count_end > 0) {
outb_buffer |= bmbit1;
tms_count_end--;
tms_sequence_end = tms_sequence_end >> 1;
}
IOB = outb_buffer; /* TDI and TCK change here */
for (k = 0; k < delay_scan_out; k++)
;
tdi_data = tdi_data >> 1;
IOB = (outb_buffer | bmbit2);
for (k = 0; k < delay_scan_out; k++)
;
}
/* Move to correct end state */
if (tms_count_end > 0)
jtag_slow_clock_tms(tms_count_end, tms_sequence_end);
}
/**
* Perform bidirectional JTAG SCAN operation at maximum TCK frequency.
*
* Data stored in EP2 OUT buffer is shifted into the JTAG chain via TDI, TDO
* data is sampled and stored in the EP2 IN buffer.
* The TAP-FSM state is always left in the PAUSE-DR/PAUSE-IR state.
*
* Maximum achievable TCK frequency is 100 kHz for ANGIE clocked at 24 MHz.
*
* @param out_offset offset in EP1OUTBUF where payload data starts
* @param in_offset
*/
int it;
void jtag_scan_io(uint8_t out_offset, uint8_t in_offset)
{
uint8_t scan_size_bytes, bits_last_byte;
uint8_t tms_count_start, tms_count_end;
uint8_t tms_sequence_start, tms_sequence_end;
uint8_t tdi_data, tdo_data, i, j;
uint8_t outb_buffer;
it++;
/* Get parameters from EP1OUTBUF */
scan_size_bytes = EP1OUTBUF[out_offset];
bits_last_byte = EP1OUTBUF[out_offset + 1];
tms_count_start = (EP1OUTBUF[out_offset + 2] >> 4) & 0x0F;
tms_count_end = EP1OUTBUF[out_offset + 2] & 0x0F;
tms_sequence_start = EP1OUTBUF[out_offset + 3];
tms_sequence_end = EP1OUTBUF[out_offset + 4];
if (tms_count_start > 0)
jtag_clock_tms(tms_count_start, tms_sequence_start);
outb_buffer = IOB & ~(bmbit2 | bmbit1);
/* Shift all bytes except the last byte */
for (i = 0; i < scan_size_bytes - 1; i++) {
tdi_data = EP1OUTBUF[i + out_offset + 5];
tdo_data = 0;
for (j = 0; j < 8; j++) {
if (tdi_data & 0x01)
outb_buffer |= bmbit3;
else
outb_buffer &= ~bmbit3;
IOB = outb_buffer; /* TDI and TCK change here */
tdi_data = tdi_data >> 1;
IOB = (outb_buffer | bmbit2);
tdo_data = tdo_data >> 1;
if (PIN_TDO)
tdo_data |= 0x80;
}
/* Copy TDO data to EP1INBUF */
EP1INBUF[i + in_offset] = tdo_data;
}
tdi_data = EP1OUTBUF[i + out_offset + 5];
tdo_data = 0;
/* Shift the last byte */
for (j = 0; j < bits_last_byte; j++) {
if (tdi_data & 0x01)
outb_buffer |= bmbit3;
else
outb_buffer &= ~bmbit3;
/* Assert TMS signal if requested and this is the last bit */
if (j == (bits_last_byte - 1) && tms_count_end > 0) {
outb_buffer |= bmbit1;
tms_count_end--;
tms_sequence_end = tms_sequence_end >> 1;
}
IOB = outb_buffer; /* TDI and TCK change here */
tdi_data = tdi_data >> 1;
IOB = (outb_buffer | bmbit2);
tdo_data = tdo_data >> 1;
if (PIN_TDO)
tdo_data |= 0x80;
}
tdo_data = tdo_data >> (8 - bits_last_byte);
/* Copy TDO data to EP1INBUF */
EP1INBUF[i + in_offset] = tdo_data;
/* Move to correct end state */
if (tms_count_end > 0)
jtag_clock_tms(tms_count_end, tms_sequence_end);
}
/**
* Perform bidirectional JTAG SCAN operation at maximum TCK frequency.
*
* Data stored in EP2 OUT buffer is shifted into the JTAG chain via TDI, TDO
* data is sampled and stored in the EP2 IN buffer.
* The TAP-FSM state is always left in the PAUSE-DR/PAUSE-IR state.
*
* Maximum achievable TCK frequency is 78 kHz for ANGIE clocked at 24 MHz.
*
* @param out_offset offset in EP1OUTBUF where payload data starts
* @param in_offset
*/
void jtag_slow_scan_io(uint8_t out_offset, uint8_t in_offset)
{
uint8_t scan_size_bytes, bits_last_byte;
uint8_t tms_count_start, tms_count_end;
uint8_t tms_sequence_start, tms_sequence_end;
uint8_t tdi_data, tdo_data, i, j, k;
uint8_t outb_buffer;
/* Get parameters from EP1OUTBUF */
scan_size_bytes = EP1OUTBUF[out_offset];
bits_last_byte = EP1OUTBUF[out_offset + 1];
tms_count_start = (EP1OUTBUF[out_offset + 2] >> 4) & 0x0F;
tms_count_end = EP1OUTBUF[out_offset + 2] & 0x0F;
tms_sequence_start = EP1OUTBUF[out_offset + 3];
tms_sequence_end = EP1OUTBUF[out_offset + 4];
if (tms_count_start > 0)
jtag_slow_clock_tms(tms_count_start, tms_sequence_start);
outb_buffer = IOB & ~(bmbit2 | bmbit1);
/* Shift all bytes except the last byte */
for (i = 0; i < scan_size_bytes - 1; i++) {
tdi_data = EP1OUTBUF[i + out_offset + 5];
tdo_data = 0;
for (j = 0; j < 8; j++) {
if (tdi_data & 0x01)
outb_buffer |= bmbit3;
else
outb_buffer &= ~bmbit3;
IOB = outb_buffer; /* TDI and TCK change here */
for (k = 0; k < delay_scan_io; k++)
;
tdi_data = tdi_data >> 1;
IOB = (outb_buffer | bmbit2);
for (k = 0; k < delay_scan_io; k++)
;
tdo_data = tdo_data >> 1;
if (PIN_TDO)
tdo_data |= 0x80;
}
/* Copy TDO data to EP1INBUF */
EP1INBUF[i + in_offset] = tdo_data;
}
tdi_data = EP1OUTBUF[i + out_offset + 5];
tdo_data = 0;
/* Shift the last byte */
for (j = 0; j < bits_last_byte; j++) {
if (tdi_data & 0x01)
outb_buffer |= bmbit3;
else
outb_buffer &= ~bmbit3;
/* Assert TMS signal if requested and this is the last bit */
if (j == (bits_last_byte - 1) && tms_count_end > 0) {
outb_buffer |= bmbit1;
tms_count_end--;
tms_sequence_end = tms_sequence_end >> 1;
}
IOB = outb_buffer; /* TDI and TCK change here */
for (k = 0; k < delay_scan_io; k++)
;
tdi_data = tdi_data >> 1;
IOB = (outb_buffer | bmbit2);
for (k = 0; k < delay_scan_io; k++)
;
tdo_data = tdo_data >> 1;
if (PIN_TDO)
tdo_data |= 0x80;
}
tdo_data = tdo_data >> (8 - bits_last_byte);
/* Copy TDO data to EP1INBUF */
EP1INBUF[i + in_offset] = tdo_data;
/* Move to correct end state */
if (tms_count_end > 0)
jtag_slow_clock_tms(tms_count_end, tms_sequence_end);
}
/**
* Generate TCK clock cycles.
*
* Maximum achievable TCK frequency is 375 kHz for ANGIE clocked at 24 MHz.
*
* @param count number of TCK clock cycles to generate.
*/
void jtag_clock_tck(uint16_t count)
{
uint16_t i;
uint8_t outb_buffer = IOB & ~(bmbit2);
for (i = 0; i < count; i++) {
IOB = outb_buffer;
IOB = outb_buffer | bmbit2;
}
}
/**
* Generate TCK clock cycles at variable frequency.
*
* Maximum achievable TCK frequency is 166.6 kHz for ANGIE clocked at 24 MHz.
*
* @param count number of TCK clock cycles to generate.
*/
void jtag_slow_clock_tck(uint16_t count)
{
uint16_t i;
uint8_t j;
uint8_t outb_buffer = IOB & ~(bmbit2);
for (i = 0; i < count; i++) {
IOB = outb_buffer;
for (j = 0; j < delay_tck; j++)
;
IOB = outb_buffer | bmbit2;
for (j = 0; j < delay_tck; j++)
;
}
}
/**
* Perform TAP FSM state transitions at maximum TCK frequency.
*
* Maximum achievable TCK frequency is 176 kHz for ANGIE clocked at 24 MHz.
*
* @param count the number of state transitions to perform.
* @param sequence the TMS pin levels for each state transition, starting with
* the least-significant bit.
*/
void jtag_clock_tms(uint8_t count, uint8_t sequence)
{
uint8_t outb_buffer = IOB & ~(bmbit2);
uint8_t i;
for (i = 0; i < count; i++) {
/* Set TMS pin according to sequence parameter */
if (sequence & 0x1)
outb_buffer |= bmbit1;
else
outb_buffer &= ~bmbit1;
IOB = outb_buffer;
sequence = sequence >> 1;
IOB = outb_buffer | bmbit2;
}
}
/**
* Perform TAP-FSM state transitions at less than maximum TCK frequency.
*
* Maximum achievable TCK frequency is 117 kHz for ANGIE clocked at 24 MHz.
*
* @param count the number of state transitions to perform.
* @param sequence the TMS pin levels for each state transition, starting with
* the least-significant bit.
*/
void jtag_slow_clock_tms(uint8_t count, uint8_t sequence)
{
uint8_t outb_buffer = IOB & ~(bmbit2);
uint8_t i, j;
for (i = 0; i < count; i++) {
/* Set TMS pin according to sequence parameter */
if (sequence & 0x1)
outb_buffer |= bmbit1;
else
outb_buffer &= ~bmbit1;
IOB = outb_buffer;
for (j = 0; j < delay_tms; j++)
;
sequence = sequence >> 1;
IOB = outb_buffer | bmbit2;
for (j = 0; j < delay_tms; j++)
;
}
}
uint16_t jtag_get_signals(void)
{
uint8_t input_signal_state, output_signal_state;
input_signal_state = 0;
output_signal_state = 0;
/* Get states of input pins */
if (PIN_TDO)
input_signal_state |= SIGNAL_TDO;
/* Get states of output pins */
output_signal_state = IOB & MASK_PORTB_DIRECTION_OUT;
return ((uint16_t)input_signal_state << 8) | ((uint16_t)output_signal_state);
}
/**
* Set state of JTAG output signals.
*
* @param low signals which should be de-asserted.
* @param high signals which should be asserted.
*/
void jtag_set_signals(uint8_t low, uint8_t high)
{
IOB &= ~(low & MASK_PORTB_DIRECTION_OUT);
IOB |= (high & MASK_PORTB_DIRECTION_OUT);
}
/**
* Configure TCK delay parameters.
*
* @param scan_in number of delay cycles in scan_in operations.
* @param scan_out number of delay cycles in scan_out operations.
* @param scan_io number of delay cycles in scan_io operations.
* @param tck number of delay cycles in clock_tck operations.
* @param tms number of delay cycles in clock_tms operations.
*/
void jtag_configure_tck_delay(uint8_t scan_in, uint8_t scan_out,
uint8_t scan_io, uint8_t tck, uint8_t tms)
{
delay_scan_in = scan_in;
delay_scan_out = scan_out;
delay_scan_io = scan_io;
delay_tck = tck;
delay_tms = tms;
}

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@ -1,85 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/****************************************************************************
File : main.c *
Contents : main code for NanoXplore USB-JTAG ANGIE adapter *
hardware. *
Based on openULINK project code by: Martin Schmoelzer. *
Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
<aboudjelida@nanoxplore.com> *
<ahmederrachedbjld@gmail.com> *
*****************************************************************************/
#include "usb.h"
#include "delay.h"
#include "protocol.h"
#include "reg_ezusb.h"
#include <serial.h>
#include <stdio.h>
extern void sudav_isr(void)__interrupt SUDAV_ISR;
extern void sof_isr(void)__interrupt;
extern void sutok_isr(void)__interrupt;
extern void suspend_isr(void)__interrupt;
extern void usbreset_isr(void)__interrupt;
extern void highspeed_isr(void)__interrupt;
extern void ep0ack_isr(void)__interrupt;
extern void stub_isr(void)__interrupt;
extern void ep0in_isr(void)__interrupt;
extern void ep0out_isr(void)__interrupt;
extern void ep1in_isr(void)__interrupt;
extern void ep1out_isr(void)__interrupt;
extern void ep2_isr(void)__interrupt;
extern void ep4_isr(void)__interrupt;
extern void ep6_isr(void)__interrupt;
extern void ep8_isr(void)__interrupt;
extern void ibn_isr(void)__interrupt;
extern void ep0pingnak_isr(void)__interrupt;
extern void ep1pingnak_isr(void)__interrupt;
extern void ep2pingnak_isr(void)__interrupt;
extern void ep4pingnak_isr(void)__interrupt;
extern void ep6pingnak_isr(void)__interrupt;
extern void ep8pingnak_isr(void)__interrupt;
extern void errorlimit_isr(void)__interrupt;
extern void ep2piderror_isr(void)__interrupt;
extern void ep4piderror_isr(void)__interrupt;
extern void ep6piderror_isr(void)__interrupt;
extern void ep8piderror_isr(void)__interrupt;
extern void ep2pflag_isr(void)__interrupt;
extern void ep4pflag_isr(void)__interrupt;
extern void ep6pflag_isr(void)__interrupt;
extern void ep8pflag_isr(void)__interrupt;
extern void ep2eflag_isr(void)__interrupt;
extern void ep4eflag_isr(void)__interrupt;
extern void ep6eflag_isr(void)__interrupt;
extern void ep8eflag_isr(void)__interrupt;
extern void ep2fflag_isr(void)__interrupt;
extern void ep4fflag_isr(void)__interrupt;
extern void ep6fflag_isr(void)__interrupt;
extern void ep8fflag_isr(void)__interrupt;
extern void gpifcomplete_isr(void)__interrupt;
extern void gpifwaveform_isr(void)__interrupt;
void gpif_init(void);
int main(void)
{
CPUCS = ((CPUCS & ~bmclkspd) | (CLK_48M << 3) | CLKOE); /* required for sio0_init */
sio0_init(57600); /* needed for printf */
ep_init();
gpif_init();
interrupt_init();
io_init();
/* Perform ReNumeration */
USBCS |= (DISCON | RENUM);
delay_ms(250);
USBCS &= ~DISCON;
/* Begin executing command(s). This function never returns. */
command_loop();
/* Never reached, but SDCC complains about missing return statement */
return 0;
}

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@ -1,192 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/****************************************************************************
File : protocol.c *
Contents : Jtag commands handling protocol code for NanoXplore *
USB-JTAG ANGIE adapter hardware. *
Based on openULINK project code by: Martin Schmoelzer. *
Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
<aboudjelida@nanoxplore.com> *
<ahmederrachedbjld@gmail.com> *
*****************************************************************************/
#include "usb.h"
#include "protocol.h"
#include "jtag.h"
#include "delay.h"
#include "io.h"
#include "msgtypes.h"
#include "reg_ezusb.h"
#include <serial.h>
#include <stdio.h>
/** Index in EP1 Bulk-OUT data buffer that contains the current command ID */
volatile uint8_t cmd_id_index;
/** Number of data bytes already in EP1 Bulk-IN buffer */
volatile uint8_t payload_index_in;
/**
* Executes one command and updates global command indexes.
*
* @return true if this command was the last command.
* @return false if there are more commands within the current contents of the
* Bulk EP1-OUT data buffer.
*/
bool execute_command(void)
{
uint8_t usb_out_bytecount, usb_in_bytecount;
uint16_t signal_state = 0;
uint16_t count;
/* Most commands do not transfer IN data. To save code space, we write 0 to
* usb_in_bytecount here, then modify it in the switch statement below where
* necessary */
usb_in_bytecount = 0;
switch (EP1OUTBUF[cmd_id_index] /* Command ID */) {
case CMD_SCAN_IN:
usb_out_bytecount = 5;
usb_in_bytecount = EP1OUTBUF[cmd_id_index + 1];
jtag_scan_in((cmd_id_index + 1), payload_index_in);
break;
case CMD_SCAN_OUT:
usb_out_bytecount = EP1OUTBUF[cmd_id_index + 1] + 5;
jtag_scan_out(cmd_id_index + 1);
break;
case CMD_SCAN_IO:
usb_in_bytecount = EP1OUTBUF[cmd_id_index + 1];
usb_out_bytecount = usb_in_bytecount + 5;
jtag_scan_io((cmd_id_index + 1), payload_index_in);
break;
case CMD_CLOCK_TMS:
usb_out_bytecount = 2;
jtag_clock_tms(EP1OUTBUF[cmd_id_index + 1], EP1OUTBUF[cmd_id_index + 2]);
break;
case CMD_CLOCK_TCK:
usb_out_bytecount = 2;
count = (uint16_t)EP1OUTBUF[cmd_id_index + 1];
count |= ((uint16_t)EP1OUTBUF[cmd_id_index + 2]) << 8;
jtag_clock_tck(count);
break;
case CMD_SLOW_SCAN_IN:
usb_out_bytecount = 5;
usb_in_bytecount = EP1OUTBUF[cmd_id_index + 1];
jtag_slow_scan_in(cmd_id_index + 1, payload_index_in);
break;
case CMD_SLOW_SCAN_OUT:
usb_out_bytecount = EP1OUTBUF[cmd_id_index + 1] + 5;
jtag_slow_scan_out(cmd_id_index + 1);
break;
case CMD_SLOW_SCAN_IO:
usb_in_bytecount = EP1OUTBUF[cmd_id_index + 1];
usb_out_bytecount = usb_in_bytecount + 5;
jtag_slow_scan_io(cmd_id_index + 1, payload_index_in);
break;
case CMD_SLOW_CLOCK_TMS:
usb_out_bytecount = 2;
jtag_slow_clock_tms(EP1OUTBUF[cmd_id_index + 1], EP1OUTBUF[cmd_id_index + 2]);
break;
case CMD_SLOW_CLOCK_TCK:
usb_out_bytecount = 2;
count = (uint16_t)EP1OUTBUF[cmd_id_index + 1];
count |= ((uint16_t)EP1OUTBUF[cmd_id_index + 2]) << 8;
jtag_slow_clock_tck(count);
break;
case CMD_SLEEP_US:
usb_out_bytecount = 2;
count = (uint16_t)EP1OUTBUF[cmd_id_index + 1];
count |= ((uint16_t)EP1OUTBUF[cmd_id_index + 2]) << 8;
delay_us(count);
break;
case CMD_SLEEP_MS:
usb_out_bytecount = 2;
count = (uint16_t)EP1OUTBUF[cmd_id_index + 1];
count |= ((uint16_t)EP1OUTBUF[cmd_id_index + 2]) << 8;
delay_ms(count);
break;
case CMD_GET_SIGNALS:
usb_out_bytecount = 0;
usb_in_bytecount = 2;
signal_state = jtag_get_signals();
EP1INBUF[payload_index_in] = (signal_state >> 8);
EP1INBUF[payload_index_in + 1] = (signal_state & 0xFF);
break;
case CMD_SET_SIGNALS:
usb_out_bytecount = 2;
jtag_set_signals(EP1OUTBUF[cmd_id_index + 1], EP1OUTBUF[cmd_id_index + 2]);
break;
case CMD_CONFIGURE_TCK_FREQ:
usb_out_bytecount = 5;
jtag_configure_tck_delay(EP1OUTBUF[cmd_id_index + 1], /* scan_in */
EP1OUTBUF[cmd_id_index + 2], /* scan_out */
EP1OUTBUF[cmd_id_index + 3], /* scan_io */
EP1OUTBUF[cmd_id_index + 4], /* clock_tck */
EP1OUTBUF[cmd_id_index + 5]); /* clock_tms */
break;
case CMD_TEST:
usb_out_bytecount = 1;
/* Do nothing... This command is only used to test if the device is ready
* to accept new commands */
break;
default:
/* Should never be reached */
usb_out_bytecount = 0;
break;
}
/* Update EP1 Bulk-IN data byte count */
payload_index_in += usb_in_bytecount;
/* Determine if this was the last command */
if ((cmd_id_index + usb_out_bytecount + 1) >= EP1OUTBC)
return true;
/* Not the last command, update cmd_id_index */
cmd_id_index += (usb_out_bytecount + 1);
return false;
}
/**
* Forever wait for commands and execute them as they arrive.
*/
void command_loop(void)
{
bool last_command;
while (1) {
cmd_id_index = 0;
payload_index_in = 0;
/* Wait until host sends Bulk-OUT packet */
while ((!ep1_out) && (!ep6_out))
;
if (ep6_out) {
/* Execute I2C command */
i2c_recieve();
ep6_out = false;
}
if (ep1_out) {
ep1_out = false;
/* Execute the commands */
last_command = false;
while (!last_command)
last_command = execute_command();
/* Send back EP1 Bulk-IN packet if required */
if (payload_index_in > 0) {
EP1INBC = payload_index_in;
syncdelay(3);
while (!ep1_in)
;
ep1_in = false;
}
/* Re-arm EP1-OUT after command execution */
EP1OUTBC = 0;
syncdelay(3);
EP1OUTBC = 0;
syncdelay(3);
}
}
}

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// SPDX-License-Identifier: LGPL-2.1-or-later
/*
* This code was taken from the fx2lib project from this link:
* https://github.com/djmuhlestein/fx2lib
*
* Copyright (C) 2009 Ubixum, Inc.
*/
#include <reg_ezusb.h>
#include <fx2macros.h>
#include <serial.h>
#include <stdint.h>
/**
* using the comp port implies that timer 2 will be used as
* a baud rate generator. (Don't use timer 2)
**/
void sio0_init(uint32_t baud_rate) __critical
{
uint16_t hl; /* hl value for reload */
uint8_t mult; /* multiplier for clock speed */
uint32_t tmp; /* scratch for mult/divide */
mult = (CPUFREQ == CLK_12M) ? 1 : ((CPUFREQ == CLK_24M) ? 2 : 4);
/* set the clock rate */
/* use clock 2 */
RCLK = 1; TCLK = 1;
tmp = mult * 375000L * 2;
tmp /= baud_rate;
tmp += 1;
tmp /= 2;
hl = 0xFFFF - (uint16_t)tmp;
RCAP2H = (uint8_t)(((uint16_t)(hl) >> 8) & 0xff);
/* seems that the 24/48mhz calculations are always one less than suggested values */
/* trm table 14-16 */
RCAP2L = ((uint8_t)((uint16_t)(hl) & 0xff)) + (mult > 0 ? 1 : 0);
/* start the timer */
TR2 = 1;
/* set up the serial port */
SM0 = 0; SM1 = 1; /* serial mode 1 (asyncronous) */
SM2 = 0 ; /* has to do with receiving */
REN = 1 ; /* to enable receiving */
PCON |= 0x80; /* SET SMOD0, baud rate doubler */
TI = 1; /* we send initial byte */
}
int getchar(void)
{
char c;
while (!RI)
;
c = SBUF0;
RI = 0;
return c;
}
void _transchar(char c)
{
while (!TI)
; /* wait for TI=1 */
TI = 0;
SBUF0 = c;
}
int putchar (char c)
{
if (c == '\n')
_transchar('\r'); /* transmit \r\n */
_transchar(c);
if (c == '\r')
_transchar('\n'); /* transmit \r\n */
return c;
}

View File

@ -1,894 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/****************************************************************************
File : usb.c *
Contents : usb communication handling code for NanoXplore USB-JTAG *
ANGIE adapter hardware. *
Based on openULINK project code by: Martin Schmoelzer. *
Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
<aboudjelida@nanoxplore.com> *
<ahmederrachedbjld@gmail.com> *
*****************************************************************************/
#include "usb.h"
#include "stdint.h"
#include "delay.h"
#include "io.h"
#include "reg_ezusb.h"
#include <fx2macros.h>
#include <serial.h>
#include <stdio.h>
#include "i2c.h"
/* Also update external declarations in "include/usb.h" if making changes to
* these variables!
*/
volatile bool ep1_out;
volatile bool ep1_in;
volatile bool ep6_out;
volatile __xdata __at 0xE6B8 struct setup_data setup_data;
/* Define number of endpoints (except Control Endpoint 0) in a central place.
* Be sure to include the necessary endpoint descriptors!
*/
#define NUM_ENDPOINTS 3
__code struct usb_device_descriptor device_descriptor = {
.blength = sizeof(struct usb_device_descriptor),
.bdescriptortype = DESCRIPTOR_TYPE_DEVICE,
.bcdusb = 0x0200, /* BCD: 02.00 (Version 2.0 USB spec) */
.bdeviceclass = 0xEF,
.bdevicesubclass = 0x02,
.bdeviceprotocol = 0x01,
.bmaxpacketsize0 = 64,
.idvendor = 0x584e,
.idproduct = 0x414f,
.bcddevice = 0x0000,
.imanufacturer = 1,
.iproduct = 2,
.iserialnumber = 3,
.bnumconfigurations = 1
};
/* WARNING: ALL config, interface and endpoint descriptors MUST be adjacent! */
__code struct usb_config_descriptor config_descriptor = {
.blength = sizeof(struct usb_config_descriptor),
.bdescriptortype = DESCRIPTOR_TYPE_CONFIGURATION,
.wtotallength = sizeof(struct usb_config_descriptor) +
3 * sizeof(struct usb_interface_descriptor) +
((NUM_ENDPOINTS + 2) * sizeof(struct usb_endpoint_descriptor)),
.bnuminterfaces = 2,
.bconfigurationvalue = 1,
.iconfiguration = 1, /* String describing this configuration */
.bmattributes = 0x80, /* Only MSB set according to USB spec */
.maxpower = 50 /* 100 mA */
};
__code struct usb_interface_descriptor interface_descriptor00 = {
.blength = sizeof(struct usb_interface_descriptor),
.bdescriptortype = DESCRIPTOR_TYPE_INTERFACE,
.binterfacenumber = 0,
.balternatesetting = 0,
.bnumendpoints = NUM_ENDPOINTS,
.binterfaceclass = 0XFF,
.binterfacesubclass = 0x00,
.binterfaceprotocol = 0x00,
.iinterface = 4
};
__code struct usb_endpoint_descriptor bulk_ep1_out_endpoint_descriptor = {
.blength = sizeof(struct usb_endpoint_descriptor),
.bdescriptortype = 0x05,
.bendpointaddress = (1 | USB_DIR_OUT),
.bmattributes = 0x02,
.wmaxpacketsize = 64,
.binterval = 0
};
__code struct usb_endpoint_descriptor bulk_ep1_in_endpoint_descriptor = {
.blength = sizeof(struct usb_endpoint_descriptor),
.bdescriptortype = 0x05,
.bendpointaddress = (1 | USB_DIR_IN),
.bmattributes = 0x02,
.wmaxpacketsize = 64,
.binterval = 0
};
__code struct usb_endpoint_descriptor bulk_ep2_endpoint_descriptor = {
.blength = sizeof(struct usb_endpoint_descriptor),
.bdescriptortype = 0x05,
.bendpointaddress = (2 | USB_DIR_OUT),
.bmattributes = 0x02,
.wmaxpacketsize = 512,
.binterval = 0
};
__code struct usb_interface_descriptor interface_descriptor01 = {
.blength = sizeof(struct usb_interface_descriptor),
.bdescriptortype = DESCRIPTOR_TYPE_INTERFACE,
.binterfacenumber = 1,
.balternatesetting = 0,
.bnumendpoints = 2,
.binterfaceclass = 0x0A,
.binterfacesubclass = 0x00,
.binterfaceprotocol = 0x00,
.iinterface = 0x00
};
__code struct usb_endpoint_descriptor bulk_ep6_out_endpoint_descriptor = {
.blength = sizeof(struct usb_endpoint_descriptor),
.bdescriptortype = 0x05,
.bendpointaddress = (6 | USB_DIR_OUT),
.bmattributes = 0x02,
.wmaxpacketsize = 512,
.binterval = 0
};
__code struct usb_endpoint_descriptor bulk_ep8_in_endpoint_descriptor = {
.blength = sizeof(struct usb_endpoint_descriptor),
.bdescriptortype = 0x05,
.bendpointaddress = (8 | USB_DIR_IN),
.bmattributes = 0x02,
.wmaxpacketsize = 512,
.binterval = 0
};
__code struct usb_language_descriptor language_descriptor = {
.blength = 4,
.bdescriptortype = DESCRIPTOR_TYPE_STRING,
.wlangid = {0x0409} /* US English */
};
__code struct usb_string_descriptor strmanufacturer =
STR_DESCR(16, 'N', 'a', 'n', 'o', 'X', 'p', 'l', 'o', 'r', 'e', ',', ' ', 'S', 'A', 'S', '.');
__code struct usb_string_descriptor strproduct =
STR_DESCR(13, 'A', 'N', 'G', 'I', 'E', ' ', 'A', 'd', 'a', 'p', 't', 'e', 'r');
__code struct usb_string_descriptor strserialnumber =
STR_DESCR(6, '0', '0', '0', '0', '0', '1');
__code struct usb_string_descriptor strconfigdescr =
STR_DESCR(12, 'J', 'T', 'A', 'G', ' ', 'A', 'd', 'a', 'p', 't', 'e', 'r');
/* Table containing pointers to string descriptors */
__code struct usb_string_descriptor *__code en_string_descriptors[4] = {
&strmanufacturer,
&strproduct,
&strserialnumber,
&strconfigdescr
};
void sudav_isr(void)__interrupt SUDAV_ISR
{
EXIF &= ~0x10; /* Clear USBINT: Main global interrupt */
USBIRQ = SUDAVI;
EP0CS |= HSNAK;
usb_handle_setup_data();
}
void sof_isr(void)__interrupt SOF_ISR
{
}
void sutok_isr(void)__interrupt SUTOK_ISR
{
}
void suspend_isr(void)__interrupt SUSPEND_ISR
{
}
void usbreset_isr(void)__interrupt USBRESET_ISR
{
}
void highspeed_isr(void)__interrupt HIGHSPEED_ISR
{
}
void ep0ack_isr(void)__interrupt EP0ACK_ISR
{
}
void stub_isr(void)__interrupt STUB_ISR
{
}
void ep0in_isr(void)__interrupt EP0IN_ISR
{
}
void ep0out_isr(void)__interrupt EP0OUT_ISR
{
}
void ep1in_isr(void)__interrupt EP1IN_ISR
{
ep1_in = true;
EXIF &= ~0x10; /* Clear USBINT: Main global interrupt */
EPIRQ = 0x04; /* Clear individual EP1IN IRQ */
}
void ep1out_isr(void)__interrupt EP1OUT_ISR
{
ep1_out = true;
EXIF &= ~0x10; /* Clear USBINT: Main global interrupt */
EPIRQ = 0x08; /* Clear individual EP1OUT IRQ */
}
void ep2_isr(void)__interrupt EP2_ISR
{
}
void ep4_isr(void)__interrupt EP4_ISR
{
}
void ep6_isr(void)__interrupt EP6_ISR
{
ep6_out = true;
EXIF &= ~0x10; /* Clear USBINT: Main global interrupt */
EPIRQ = 0x40; /* Clear individual EP6OUT IRQ */
}
void ep8_isr(void)__interrupt EP8_ISR
{
EXIF &= ~0x10; /* Clear USBINT: Main global interrupt */
EPIRQ = 0x80; /* Clear individual EP8IN IRQ */
}
void ibn_isr(void)__interrupt IBN_ISR
{
}
void ep0pingnak_isr(void)__interrupt EP0PINGNAK_ISR
{
}
void ep1pingnak_isr(void)__interrupt EP1PINGNAK_ISR
{
}
void ep2pingnak_isr(void)__interrupt EP2PINGNAK_ISR
{
}
void ep4pingnak_isr(void)__interrupt EP4PINGNAK_ISR
{
}
void ep6pingnak_isr(void)__interrupt EP6PINGNAK_ISR
{
}
void ep8pingnak_isr(void)__interrupt EP8PINGNAK_ISR
{
}
void errorlimit_isr(void)__interrupt ERRORLIMIT_ISR
{
}
void ep2piderror_isr(void)__interrupt EP2PIDERROR_ISR
{
}
void ep4piderror_isr(void)__interrupt EP4PIDERROR_ISR
{
}
void ep6piderror_isr(void)__interrupt EP6PIDERROR_ISR
{
}
void ep8piderror_isr(void)__interrupt EP8PIDERROR_ISR
{
}
void ep2pflag_isr(void)__interrupt EP2PFLAG_ISR
{
}
void ep4pflag_isr(void)__interrupt EP4PFLAG_ISR
{
}
void ep6pflag_isr(void)__interrupt EP6PFLAG_ISR
{
}
void ep8pflag_isr(void)__interrupt EP8PFLAG_ISR
{
}
void ep2eflag_isr(void)__interrupt EP2EFLAG_ISR
{
}
void ep4eflag_isr(void)__interrupt EP4EFLAG_ISR
{
}
void ep6eflag_isr(void)__interrupt EP6EFLAG_ISR
{
}
void ep8eflag_isr(void)__interrupt EP8EFLAG_ISR
{
}
void ep2fflag_isr(void)__interrupt EP2FFLAG_ISR
{
}
void ep4fflag_isr(void)__interrupt EP4FFLAG_ISR
{
}
void ep6fflag_isr(void)__interrupt EP6FFLAG_ISR
{
}
void ep8fflag_isr(void)__interrupt EP8FFLAG_ISR
{
}
void gpifcomplete_isr(void)__interrupt GPIFCOMPLETE_ISR
{
}
void gpifwaveform_isr(void)__interrupt GPIFWAVEFORM_ISR
{
}
/**
* Return the control/status register for an endpoint
*
* @param ep endpoint address
* @return on success: pointer to Control & Status register for endpoint
* specified in \a ep
* @return on failure: NULL
*/
__xdata uint8_t *usb_get_endpoint_cs_reg(uint8_t ep)
{
/* Mask direction bit */
uint8_t ep_num = ep & ~0x80;
switch (ep_num) {
case 0:
return &EP0CS;
case 1:
return ep & 0x80 ? &EP1INCS : &EP1OUTCS;
case 2:
return &EP2CS;
case 4:
return &EP4CS;
case 6:
return &EP6CS;
case 8:
return &EP8CS;
default:
return NULL;
}
}
void usb_reset_data_toggle(uint8_t ep)
{
/* TOGCTL register:
+----+-----+-----+------+-----+-------+-------+-------+
| Q | S | R | IO | EP3 | EP2 | EP1 | EP0 |
+----+-----+-----+------+-----+-------+-------+-------+
To reset data toggle bits, we have to write the endpoint direction (IN/OUT)
to the IO bit and the endpoint number to the EP2..EP0 bits. Then, in a
separate write cycle, the R bit needs to be set.
*/
TOGCTL = (((ep & 0x80) >> 3) + (ep & 0x0F));
TOGCTL |= BMRESETTOGGLE;
}
/**
* Handle GET_STATUS request.
*
* @return on success: true
* @return on failure: false
*/
bool usb_handle_get_status(void)
{
uint8_t *ep_cs;
switch (setup_data.bmrequesttype) {
case GS_DEVICE:
/* Two byte response: Byte 0, Bit 0 = self-powered, Bit 1 = remote wakeup.
* Byte 1: reserved, reset to zero */
EP0BUF[0] = 0;
EP0BUF[1] = 0;
/* Send response */
EP0BCH = 0;
syncdelay(3);
EP0BCL = 2;
syncdelay(3);
break;
case GS_INTERFACE:
/* Always return two zero bytes according to USB 1.1 spec, p. 191 */
EP0BUF[0] = 0;
EP0BUF[1] = 0;
/* Send response */
EP0BCH = 0;
syncdelay(3);
EP0BCL = 2;
syncdelay(3);
break;
case GS_ENDPOINT:
/* Get stall bit for endpoint specified in low byte of wIndex */
ep_cs = usb_get_endpoint_cs_reg(setup_data.windex & 0xff);
if (*ep_cs & EPSTALL)
EP0BUF[0] = 0x01;
else
EP0BUF[0] = 0x00;
/* Second byte sent has to be always zero */
EP0BUF[1] = 0;
/* Send response */
EP0BCH = 0;
syncdelay(3);
EP0BCL = 2;
syncdelay(3);
break;
default:
return false;
}
return true;
}
/**
* Handle CLEAR_FEATURE request.
*
* @return on success: true
* @return on failure: false
*/
bool usb_handle_clear_feature(void)
{
__xdata uint8_t *ep_cs;
switch (setup_data.bmrequesttype) {
case CF_DEVICE:
/* Clear remote wakeup not supported: stall EP0 */
STALL_EP0();
break;
case CF_ENDPOINT:
if (setup_data.wvalue == 0) {
/* Unstall the endpoint specified in wIndex */
ep_cs = usb_get_endpoint_cs_reg(setup_data.windex);
if (!ep_cs)
return false;
*ep_cs &= ~EPSTALL;
} else {
/* Unsupported feature, stall EP0 */
STALL_EP0();
}
break;
default:
/* Vendor commands... */
break;
}
return true;
}
/**
* Handle SET_FEATURE request.
*
* @return on success: true
* @return on failure: false
*/
bool usb_handle_set_feature(void)
{
__xdata uint8_t *ep_cs;
switch (setup_data.bmrequesttype) {
case SF_DEVICE:
if (setup_data.wvalue == 2)
return true;
break;
case SF_ENDPOINT:
if (setup_data.wvalue == 0) {
/* Stall the endpoint specified in wIndex */
ep_cs = usb_get_endpoint_cs_reg(setup_data.windex);
if (!ep_cs)
return false;
*ep_cs |= EPSTALL;
} else {
/* Unsupported endpoint feature */
return false;
}
break;
default:
/* Vendor commands... */
break;
}
return true;
}
/**
* Handle GET_DESCRIPTOR request.
*
* @return on success: true
* @return on failure: false
*/
bool usb_handle_get_descriptor(void)
{
__xdata uint8_t descriptor_type;
__xdata uint8_t descriptor_index;
descriptor_type = (setup_data.wvalue & 0xff00) >> 8;
descriptor_index = setup_data.wvalue & 0x00ff;
switch (descriptor_type) {
case DESCRIPTOR_TYPE_DEVICE:
SUDPTRH = HI8(&device_descriptor);
SUDPTRL = LO8(&device_descriptor);
break;
case DESCRIPTOR_TYPE_CONFIGURATION:
SUDPTRH = HI8(&config_descriptor);
SUDPTRL = LO8(&config_descriptor);
break;
case DESCRIPTOR_TYPE_STRING:
if (setup_data.windex == 0) {
/* Supply language descriptor */
SUDPTRH = HI8(&language_descriptor);
SUDPTRL = LO8(&language_descriptor);
} else if (setup_data.windex == 0x0409 /* US English */) {
/* Supply string descriptor */
SUDPTRH = HI8(en_string_descriptors[descriptor_index - 1]);
SUDPTRL = LO8(en_string_descriptors[descriptor_index - 1]);
} else {
return false;
}
break;
default:
/* Unsupported descriptor type */
return false;
}
return true;
}
/**
* Handle SET_INTERFACE request.
*/
void usb_handle_set_interface(void)
{
/* Reset Data Toggle */
usb_reset_data_toggle(USB_DIR_IN | 4);
usb_reset_data_toggle(USB_DIR_OUT | 2);
/* Unstall & clear busy flag of all valid IN endpoints */
EP1INCS = 0 | EPBSY;
/* Unstall all valid OUT endpoints, reset bytecounts */
EP1OUTCS = 0;
EP1OUTBC = 0;
syncdelay(3);
}
/* Initialize GPIF interface transfer count */
void set_gpif_cnt(uint32_t count)
{
GPIFTCB3 = (uint8_t)(((uint32_t)(count) >> 24) & 0x000000ff);
syncdelay(3);
GPIFTCB2 = (uint8_t)(((uint32_t)(count) >> 16) & 0x000000ff);
syncdelay(3);
GPIFTCB1 = (uint8_t)(((uint32_t)(count) >> 8) & 0x000000ff);
syncdelay(3);
GPIFTCB0 = (uint8_t)((uint32_t)(count) & 0x000000ff);
}
/*
* Vendor commands handling:
*/
#define VR_CFGOPEN 0xB0
#define VR_CFGCLOSE 0xB1
uint8_t ix;
uint8_t bcnt;
uint8_t __xdata *eptr;
uint16_t wcnt;
uint32_t __xdata gcnt;
bool usb_handle_send_bitstream(void)
{
eptr = EP0BUF; /* points to EP0BUF 64-byte register */
wcnt = setup_data.wlength; /* total transfer count */
/* Clear EP0BUF for OUT requests */
if (setup_data.bmrequesttype & 0x80) {
bcnt = ((wcnt > 64) ? 64 : wcnt);
for (ix = 0; ix < bcnt; ix++)
eptr[ix] = 0;
}
switch (setup_data.brequest) {
case VR_CFGOPEN:
/* Clear bytecount / to allow new data in / to stops NAKing */
EP0BCH = 0;
EP0BCL = 0;
while (EP0CS & EPBSY)
; /* wait to finish transferring in EP0BUF, until not busy */
gcnt = ((uint32_t)(eptr[0]) << 24) | ((uint32_t)(eptr[1]) << 16)
| ((uint32_t)(eptr[2]) << 8) | (uint32_t)(eptr[3]);
/* Angie board FPGA bitstream download */
switch ((setup_data.wvalue) & 0x00C0) {
case 0x00:
PIN_PROGRAM_B = 0; /* Apply RPGM- pulse */
GPIFWFSELECT = 0xF2; /* Restore Config mode waveforms select */
syncdelay(3);
EP2FIFOCFG = BMAUTOOUT; /* and Automatic 8-bit GPIF OUT mode */
syncdelay(3);
PIN_PROGRAM_B = 1; /* Negate RPGM- pulse */
delay_ms(10); /* FPGA init time < 10mS */
set_gpif_cnt(gcnt); /* Initialize GPIF interface transfer count */
PIN_RDWR_B = 0;
PIN_CSI_B = 0;
GPIFTRIG = GPIF_EP2; /* Trigger GPIF OUT transfer on EP2 */
syncdelay(3);
break;
default:
break;
}
break;
case VR_CFGCLOSE:
ix = 10;
/* wait until GPIF transaction has been completed */
while ((GPIFTRIG & BMGPIFDONE) == 0) {
if (ix-- == 0) {
break;
}
delay_ms(1);
}
switch ((setup_data.wvalue) & 0x00C0) {
case 0x00:
PIN_CSI_B = 1;
PIN_RDWR_B = 1;
IFCONFIG &= 0xFC; /* Exit gpif mode */
break;
default:
break;
}
EP0BCH = 0;
EP0BCL = (uint8_t)(setup_data.wlength); /* Signal buffer is filled */
break;
default:
return true; /* Error: unknown VR command */
}
return false; /* no error; command handled OK */
}
/**
* Handle the arrival of a USB Control Setup Packet.
*/
void usb_handle_setup_data(void)
{
switch (setup_data.brequest) {
case GET_STATUS:
if (!usb_handle_get_status())
STALL_EP0();
break;
case CLEAR_FEATURE:
if (!usb_handle_clear_feature())
STALL_EP0();
break;
case 2: case 4:
/* Reserved values */
STALL_EP0();
break;
case SET_FEATURE:
if (!usb_handle_set_feature())
STALL_EP0();
break;
case SET_ADDRESS:
/* Handled by USB core */
break;
case SET_DESCRIPTOR:
/* Set Descriptor not supported. */
STALL_EP0();
break;
case GET_DESCRIPTOR:
if (!usb_handle_get_descriptor())
STALL_EP0();
break;
case GET_CONFIGURATION:
/* ANGIE has only one configuration, return its index */
EP0BUF[0] = config_descriptor.bconfigurationvalue;
EP0BCH = 0;
EP0BCL = 1;
syncdelay(3);
break;
case SET_CONFIGURATION:
/* ANGIE has only one configuration -> nothing to do */
break;
case GET_INTERFACE:
/* ANGIE only has one interface, return its number */
EP0BUF[0] = interface_descriptor00.binterfacenumber;
EP0BCH = 0;
EP0BCL = 1;
syncdelay(3);
break;
case SET_INTERFACE:
usb_handle_set_interface();
break;
case SYNCH_FRAME:
/* Isochronous endpoints not used -> nothing to do */
break;
default:
/* if not Vendor command, Stall EndPoint 0 */
if (usb_handle_send_bitstream())
STALL_EP0();
break;
}
}
/**
* Handle the initialization of endpoints.
*/
void ep_init(void)
{
EP1INCFG = 0xA0;
syncdelay(3);
EP1OUTCFG = 0xA0;
syncdelay(3);
EP2CFG = 0xA0;
syncdelay(3);
EP4CFG = 0x00;
syncdelay(3);
EP6CFG = 0xA2;
syncdelay(3);
EP8CFG = 0xE2;
syncdelay(3);
/* arm EP1-OUT */
EP1OUTBC = 0;
syncdelay(3);
EP1OUTBC = 0;
syncdelay(3);
/* arm EP1-IN */
EP1INBC = 0;
syncdelay(3);
EP1INBC = 0;
syncdelay(3);
/* arm EP6-OUT */
EP6BCL = 0x80;
syncdelay(3);
EP6BCL = 0x80;
syncdelay(3);
/* Standard procedure to reset FIFOs */
FIFORESET = BMNAKALL; /* NAK all transfers during the reset */
syncdelay(3);
FIFORESET = 0x02; /* reset EP2 FIFO */
syncdelay(3);
FIFORESET = 0x00; /* deactivate the NAK all */
syncdelay(3);
EP2FIFOCFG = 0x00;
syncdelay(3);
EP2FIFOCFG = BMAUTOOUT; /* Automatic 8-bit GPIF OUT mode */
syncdelay(3);
}
void i2c_recieve(void)
{
PIN_SDA_DIR = 0;
if (EP6FIFOBUF[0] == 1) {
uint8_t rdwr = EP6FIFOBUF[0]; //read
uint8_t data_count = EP6FIFOBUF[1]; //data sent count
uint8_t count = EP6FIFOBUF[2]; //requested data count
uint8_t adr = EP6FIFOBUF[3]; //address
uint8_t address = get_address(adr, rdwr); //address byte (read command)
uint8_t address_2 = get_address(adr, 0); //address byte 2 (write command)
printf("%d\n", address - 1);
/* start: */
start_cd();
/* address: */
send_byte(address_2); //write
/* ack: */
uint8_t ack = get_ack();
/* send data */
if (data_count) { //if there is a byte reg
for (uint8_t i = 0; i < data_count; i++) {
send_byte(EP6FIFOBUF[i + 4]);
/* ack(): */
ack = get_ack();
}
}
/* repeated start: */
repeated_start();
/* address: */
send_byte(address);
/* get ack: */
ack = get_ack();
/* receive data */
for (uint8_t i = 0; i < count - 1; i++) {
EP8FIFOBUF[i] = receive_byte();
/* send ack: */
send_ack();
}
EP8FIFOBUF[count - 1] = receive_byte();
/* send Nack: */
send_nack();
/* stop */
stop_cd();
EP8BCH = 0; //EP8
syncdelay(3);
EP8BCL = count; //EP8
EP6BCL = 0x80; //EP6
syncdelay(3);
EP6BCL = 0x80; //EP6
} else {
uint8_t rdwr = EP6FIFOBUF[0]; //write
uint8_t count = EP6FIFOBUF[1]; //data count
uint8_t adr = EP6FIFOBUF[2]; //address
uint8_t address = get_address(adr, rdwr); //address byte (read command)
uint8_t ack_cnt = 0;
/* start(): */
start_cd();
/* address: */
send_byte(address); //write
/* ack(): */
if (!get_ack())
ack_cnt++;
/* send data */
for (uint8_t i = 0; i < count; i++) {
send_byte(EP6FIFOBUF[i + 3]);
/* get ack: */
if (!get_ack())
ack_cnt++;
}
/* stop */
stop_cd();
EP8FIFOBUF[0] = ack_cnt;
EP8BCH = 0; //EP8
syncdelay(3);
EP8BCL = 1; //EP8
EP6BCL = 0x80; //EP6
syncdelay(3);
EP6BCL = 0x80; //EP6
}
}
/**
* Interrupt initialization. Configures USB interrupts.
**/
void interrupt_init(void)
{
/* Enable Interrupts */
EA = 1;
/* Enable USB interrupt (EIE register) */
EUSB = 1;
EICON |= 0x20;
/* Enable INT 2 & 4 Autovectoring */
INTSETUP |= (AV2EN | AV4EN);
/* Enable individual EP1OUT&IN & EP6&8 interrupts */
EPIE |= 0xCC;
/* Clear individual USB interrupt IRQ */
EPIRQ = 0xCC;
/* Enable SUDAV interrupt */
USBIEN |= SUDAVI;
/* Clear SUDAV interrupt */
USBIRQ = SUDAVI;
}
/**
* Handle the initialization of io ports.
*/
void io_init(void)
{
/* PORT A */
PORTACFG = 0x01; /* 0: normal ou 1: alternate function (each bit) */
OEA = 0xEF; /* all OUT exept INIT_B IN */
IOA = 0xFF;
/* PORT B */
OEB = 0xEF; /* all OUT exept TDO */
IOB = 0xFF;
PIN_TRST = 1;
PIN_TMS = 0;
PIN_TCK = 0;
PIN_TDI = 0;
PIN_SRST = 1;
/* PORT C */
PORTCCFG = 0x00; /* 0: normal ou 1: alternate function (each bit) */
OEC = 0xFF;
IOC = 0xFF;
/* PORT D */
OED = 0xFF;
IOD = 0xFF;
}

View File

@ -1,109 +0,0 @@
# SPDX-License-Identifier: BSD-3-Clause
# Copyright (C) 2023 by NanoXplore, France - all rights reserved
# Needed by timing test
export PROJECT := angie_bitstream
TARGET_PART := xc6slx9-2tqg144
export TOPLEVEL := S609
# Detects the ROOT dir from the .git marker
sp :=
sp +=
_walk = $(if $1,$(wildcard /$(subst $(sp),/,$1)/$2) $(call _walk,$(wordlist 2,$(words $1),x $1),$2))
_find = $(firstword $(call _walk,$(strip $(subst /, ,$1)),$2))
_ROOT := $(patsubst %/.git,%,$(call _find,$(CURDIR),.git))
SHELL := /bin/bash
TOP_DIR := $(realpath $(_ROOT))
HDL_DIR := $(CURDIR)
SRC_DIR := $(HDL_DIR)/src
TOOLS_DIR := $(TOP_DIR)/tools/build
COMMON_DIR := $(TOP_DIR)/common/hdl
COMMON_HDL_DIR := $(COMMON_DIR)/src
COMMON_LIBS := $(COMMON_DIR)/libs
HDL_BUILD_DIR := $(HDL_DIR)/build
OUTPUT_DIR ?= $(HDL_BUILD_DIR)/output
FINAL_OUTPUT_DIR := $(OUTPUT_DIR)/$(PROJECT)
# Tools
MKDIR := mkdir -p
CP := cp -f
HDL_SRC_PATH := $(addprefix $(COMMON_DIR)/ips/, $(HDL_IPS)) $(HDL_DIR)
VHDSOURCE += $(foreach ip,$(HDL_SRC_PATH),$(wildcard $(ip)/src/*.vhd))
VSOURCE += $(foreach ip,$(HDL_SRC_PATH),$(wildcard $(ip)/src/*.v))
VSOURCE += $(foreach ip,$(HDL_SRC_PATH),$(wildcard $(ip)/src/*.vh))
CONSTRAINTS ?= $(SRC_DIR)/$(PROJECT).ucf
COMMON_OPTS := -intstyle xflow
XST_OPTS :=
NGDBUILD_OPTS :=
MAP_OPTS := -mt 2
PAR_OPTS := -mt 4
BITGEN_OPTS := -g Binary:Yes
XILINX_PLATFORM := lin64
PATH := $(PATH):$(XILINX_HOME)/bin/$(XILINX_PLATFORM)
RUN = @echo -ne "\n\n\e[1;33m======== $(1) ========\e[m\n\n"; \
cd $(HDL_BUILD_DIR) && $(XILINX_HOME)/bin/$(XILINX_PLATFORM)/$(1)
compile: $(HDL_BUILD_DIR)/$(PROJECT).bin
install: $(HDL_BUILD_DIR)/$(PROJECT).bin
$(MKDIR) $(FINAL_OUTPUT_DIR)
$(CP) $(HDL_BUILD_DIR)/$(PROJECT).bin $(FINAL_OUTPUT_DIR)
clean:
rm -rf $(HDL_BUILD_DIR)
$(HDL_BUILD_DIR)/$(PROJECT).bin: $(HDL_BUILD_DIR)/$(PROJECT).ncd
$(call RUN,bitgen) $(COMMON_OPTS) $(BITGEN_OPTS) \
-w $(PROJECT).ncd $(PROJECT).bit
$(HDL_BUILD_DIR)/$(PROJECT).ncd: $(HDL_BUILD_DIR)/$(PROJECT).map.ncd
$(call RUN,par) $(COMMON_OPTS) $(PAR_OPTS) \
-w $(PROJECT).map.ncd $(PROJECT).ncd $(PROJECT).pcf
$(HDL_BUILD_DIR)/$(PROJECT).map.ncd: $(HDL_BUILD_DIR)/$(PROJECT).ngd
$(call RUN,map) $(COMMON_OPTS) $(MAP_OPTS) \
-p $(TARGET_PART) \
-w $(PROJECT).ngd -o $(PROJECT).map.ncd $(PROJECT).pcf
$(HDL_BUILD_DIR)/$(PROJECT).ngd: $(HDL_BUILD_DIR)/$(PROJECT).ngc
$(call RUN,ngdbuild) $(COMMON_OPTS) $(NGDBUILD_OPTS) \
-p $(TARGET_PART) -uc $(CONSTRAINTS) \
$(PROJECT).ngc $(PROJECT).ngd
$(HDL_BUILD_DIR)/$(PROJECT).ngc: $(HDL_BUILD_DIR)/$(PROJECT).prj $(HDL_BUILD_DIR)/$(PROJECT).scr
$(call RUN,xst) $(COMMON_OPTS) -ifn $(PROJECT).scr
$(HDL_BUILD_DIR)/$(PROJECT).scr: | $(HDL_BUILD_DIR)
@echo "Updating $@"
@mkdir -p $(HDL_BUILD_DIR)
@rm -f $@
@echo "run" \
"-ifn $(PROJECT).prj" \
"-ofn $(PROJECT).ngc" \
"-ifmt mixed" \
"$(XST_OPTS)" \
"-top $(TOPLEVEL)" \
"-ofmt NGC" \
"-p $(TARGET_PART)" \
> $(HDL_BUILD_DIR)/$(PROJECT).scr
$(HDL_BUILD_DIR)/$(PROJECT).prj: | $(HDL_BUILD_DIR)
@echo "Updating $@"
@rm -f $@
@$(foreach file,$(VSOURCE),echo "verilog work \"$(file)\"" >> $@;)
@$(foreach file,$(VHDSOURCE),echo "vhdl work \"$(file)\"" >> $@;)
@$(foreach lib,$(HDL_LIBS),$(foreach file,$(wildcard $(COMMON_LIBS)/$(lib)/src/*.vhd),echo "vhdl $(lib) \"$(file)\"" >> $@;))
@$(foreach lib,$(HDL_LIBS),$(foreach file,$(wildcard $(COMMON_LIBS)/$(lib)/src/*.v),echo "verilog $(lib) \"$(file)\"" >> $@;))
@$(foreach lib,$(HDL_LIBS),$(foreach file,$(wildcard $(COMMON_LIBS)/$(lib)/src/*.vh),echo "verilog $(lib) \"$(file)\"" >> $@;))
$(HDL_BUILD_DIR):
$(MKDIR) $(HDL_BUILD_DIR)
.PHONY: clean compile install

View File

@ -1,18 +0,0 @@
# SPDX-License-Identifier: BSD-3-Clause
# Copyright (C) 2023 by NanoXplore, France - all rights reserved
This is the source code of Nanoxplore USB-JTAG Adapter Angie's bitstream.
This bitstream is for the "xc6slx9-2tqg144" Spartan-6 Xilinx FPGA.
To generate this bitstream, you need to install Xilinx ISE Webpack 14.7
You will need to give the ISE software path : export XILINX_HOME=path/to/ise/sw
Please set the enviromnent first by executing the ". ./set_env.sh"
All you have to do now is to write your vhd and constrains codes.
One all is setup, you can use the make commands:
make compile : to compile your (.vhd & .ucf) files in the "src" directory
A directory named "build" will be created, which contains all the generated
files including the bitstream file.
make clean : to delete the build directory.

View File

@ -1,14 +0,0 @@
#!/bin/bash
# SPDX-License-Identifier: BSD-3-Clause
# Copyright (C) 2023 by NanoXplore, France - all rights reserved
[ -z "${XILINX_HOME}" ] && export XILINX_HOME=/home/software/Xilinx/ISE/14.7/ISE_DS/ISE
export PATH="$XILINX_HOME:$PATH"
echo "SET XILINX_HOME to ${XILINX_HOME}"
# This is needed for isim
XILINX_HOME_BASE=${XILINX_HOME}/..
for part in common EDK PlanAhead ISE
do
el=${XILINX_HOME_BASE}/${part}
. ${el}/.settings64.sh ${el}
done

View File

@ -1,50 +0,0 @@
## SPDX-License-Identifier: BSD-3-Clause
##--------------------------------------------------------------------------
## Project Context: nanoXplore USB-JTAG Adapter Board, Spartan6
## Design Name: NJTAG USB-JTAG Adapter FPGA source code
## Module Name: _angie_openocd.ucf
## Target Device: XC6SLX9-2 TQ144
## Tool versions: ISE Webpack 13.2 -> 14.2
## Author: Ahmed BOUDJELIDA nanoXplore SAS
##--------------------------------------------------------------------------
# WARNING: PullUps on JTAG inputs should be enabled after configuration
# (bitgen option) since the pins are not connected.
net TRST LOC = 'P48' ;
net TMS LOC = 'P43' ;
net TCK LOC = 'P44' ;
net TDI LOC = 'P45' ;
net TDO LOC = 'P46' ;
net SRST LOC = 'P61' ;
net SDA LOC = 'P50' ;
net SCL LOC = 'P51' ;
net SDA_DIR LOC = 'P56' ;
net SCL_DIR LOC = 'P57' ;
net SI_TDO LOC = 'P16' ;
net SO_TRST LOC = 'P32' ;
net SO_TMS LOC = 'P27' ;
net SO_TCK LOC = 'P30' ;
net SO_TDI LOC = 'P26' ;
net SO_SRST LOC = 'P12' ;
net SO_SDA_OUT LOC = 'P140' ;
net SO_SDA_IN LOC = 'P1' ;
net SO_SCL LOC = 'P137';
net ST_0 LOC = 'P29' ;
net ST_1 LOC = 'P21' ;
net ST_2 LOC = 'P11' ;
net ST_4 LOC = 'P134' ;
net ST_5 LOC = 'P139' ;
net FTP<0> LOC = 'P121' ;
net FTP<1> LOC = 'P120' ;
net FTP<2> LOC = 'P119' ;
net FTP<3> LOC = 'P116' ;
net FTP<4> LOC = 'P111' ;
net FTP<5> LOC = 'P112' ;
net FTP<6> LOC = 'P115' ;
net FTP<7> LOC = 'P114' ;

View File

@ -1,103 +0,0 @@
-- SPDX-License-Identifier: BSD-3-Clause
----------------------------------------------------------------------------
-- Project Context: nanoXplore USB-JTAG Adapter Board, Spartan6
-- Design Name: NJTAG USB-JTAG Adapter FPGA source code
-- Module Name: _angie_openocd.vhd
-- Target Device: XC6SLX9-2 TQ144
-- Tool versions: ISE Webpack 13.2 -> 14.2
-- Author: Ahmed BOUDJELIDA nanoXplore SAS
----------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
library UNISIM;
use UNISIM.VComponents.all;
entity S609 is port(
TRST : in std_logic;
TMS : in std_logic;
TCK : in std_logic;
TDI : in std_logic;
TDO : out std_logic;
SRST : in std_logic;
SDA : inout std_logic;
SDA_DIR : in std_logic;
SCL : in std_logic;
SCL_DIR : in std_logic;
FTP : out std_logic_vector(7 downto 0); -- Test points
SI_TDO : in std_logic;
ST_0 : out std_logic;
ST_1 : out std_logic;
ST_2 : out std_logic;
ST_4 : out std_logic;
ST_5 : out std_logic;
SO_SDA_OUT : out std_logic;
SO_SDA_IN : in std_logic;
SO_SCL : out std_logic;
SO_TRST : out std_logic;
SO_TMS : out std_logic;
SO_TCK : out std_logic;
SO_TDI : out std_logic;
SO_SRST : out std_logic
);
end S609;
architecture A_S609 of S609 is
begin
--Directions:
ST_0 <= '0';
ST_1 <= '1';
--TDO:
TDO <= not SI_TDO;
--TRST - TCK - TMS - TDI:
SO_TRST <= TRST;
SO_TMS <= TMS;
SO_TCK <= TCK;
SO_TDI <= TDI;
ST_2 <= SRST;
SO_SRST <= '0';
SO_SCL <= SCL;
SDA <= not(SO_SDA_IN) when (SDA_DIR = '1') else 'Z';
SO_SDA_OUT <= SDA;
process(SDA_DIR)
begin
if(SDA_DIR = '0') then
ST_5 <= '0';
else
ST_5 <= '1';
end if;
end process;
process(SCL_DIR)
begin
if(SCL_DIR = '0') then
ST_4 <= '0';
else
ST_4 <= '1';
end if;
end process;
--Points de test:
FTP(0) <= SDA;
FTP(1) <= SCL;
FTP(2) <= not(SO_SDA_IN);
FTP(3) <= SDA_DIR;
FTP(5) <= SRST;
FTP(4) <= SI_TDO;
FTP(6) <= '1';
FTP(7) <= '1';
end A_S609;

View File

@ -43,9 +43,9 @@ unsigned int dump_swit;
* NOTE that this specific encoding could be space-optimized; and that
* trace data streams could also be history-sensitive.
*/
static void show_task(int port, unsigned int data)
static void show_task(int port, unsigned data)
{
unsigned int code = data >> 16;
unsigned code = data >> 16;
char buf[16];
if (dump_swit)
@ -77,7 +77,7 @@ static void show_task(int port, unsigned int data)
static void show_reserved(FILE *f, char *label, int c)
{
unsigned int i;
unsigned i;
if (dump_swit)
return;
@ -96,9 +96,9 @@ static void show_reserved(FILE *f, char *label, int c)
printf("\n");
}
static bool read_varlen(FILE *f, int c, unsigned int *value)
static bool read_varlen(FILE *f, int c, unsigned *value)
{
unsigned int size;
unsigned size;
unsigned char buf[4];
*value = 0;
@ -135,8 +135,8 @@ err:
static void show_hard(FILE *f, int c)
{
unsigned int type = c >> 3;
unsigned int value;
unsigned type = c >> 3;
unsigned value;
char *label;
if (dump_swit)
@ -230,16 +230,16 @@ static void show_hard(FILE *f, int c)
*/
struct {
int port;
void (*show)(int port, unsigned int data);
void (*show)(int port, unsigned data);
} format[] = {
{ .port = 31, .show = show_task, },
};
static void show_swit(FILE *f, int c)
{
unsigned int port = c >> 3;
unsigned int value = 0;
unsigned int i;
unsigned port = c >> 3;
unsigned value = 0;
unsigned i;
if (port + 1 == dump_swit) {
if (!read_varlen(f, c, &value))
@ -272,7 +272,7 @@ static void show_swit(FILE *f, int c)
static void show_timestamp(FILE *f, int c)
{
unsigned int counter = 0;
unsigned counter = 0;
char *label = "";
bool delayed = false;

View File

@ -12,7 +12,7 @@
#include <assert.h>
#include <helper/list.h>
static OOCD_LIST_HEAD(threads);
static LIST_HEAD(threads);
struct thread {
int id;

View File

@ -1,248 +1,249 @@
/* Autogenerated with ../../../../src/helper/bin2char.sh */
0x08,0xb5,0x00,0xbf,0x00,0xbf,0x00,0xbf,0x00,0xbf,0xdf,0xf8,0x1c,0xd0,0x07,0x48,
0x07,0x49,0x4f,0xf0,0x00,0x02,0x88,0x42,0xb8,0xbf,0x40,0xf8,0x04,0x2b,0xff,0xf6,
0xfa,0xaf,0x00,0xf0,0x71,0xf9,0xfe,0xe7,0xe0,0x0e,0x00,0x20,0x44,0x13,0x00,0x20,
0x88,0x13,0x00,0x20,0x10,0xb5,0x07,0x4c,0x23,0x78,0x00,0x2b,0x07,0xd1,0x06,0x4b,
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0x00,0xf0,0xa8,0xf9,0xfe,0xe7,0x00,0x00,0xf0,0x0e,0x00,0x20,0x54,0x13,0x00,0x20,
0x98,0x13,0x00,0x20,0x08,0xb5,0x07,0x4b,0x07,0x48,0x03,0x33,0x1b,0x1a,0x06,0x2b,
0x04,0xd9,0x06,0x4b,0x00,0x2b,0x01,0xd0,0x00,0xf0,0x5c,0xf8,0x08,0xbc,0x01,0xbc,
0x00,0x47,0xc0,0x46,0x50,0x13,0x00,0x20,0x50,0x13,0x00,0x20,0x00,0x00,0x00,0x00,
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0x04,0xd0,0x06,0x4b,0x00,0x2b,0x01,0xd0,0x00,0xf0,0x44,0xf8,0x08,0xbc,0x01,0xbc,
0x00,0x47,0xc0,0x46,0x50,0x13,0x00,0x20,0x50,0x13,0x00,0x20,0x00,0x00,0x00,0x00,
0x10,0xb5,0x08,0x4c,0x23,0x78,0x00,0x2b,0x09,0xd1,0xff,0xf7,0xcb,0xff,0x06,0x4b,
0x00,0x2b,0x02,0xd0,0x05,0x48,0xaf,0xf3,0x00,0x80,0x01,0x23,0x23,0x70,0x10,0xbc,
0x01,0xbc,0x00,0x47,0x44,0x13,0x00,0x20,0x00,0x00,0x00,0x00,0xd4,0x0e,0x00,0x20,
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0xd8,0x30,0x9f,0xe5,0x00,0x00,0x53,0xe3,0xcc,0x30,0x9f,0x05,0x03,0xd0,0xa0,0xe1,
0x00,0x20,0x0f,0xe1,0x0f,0x00,0x12,0xe3,0x15,0x00,0x00,0x0a,0xd1,0xf0,0x21,0xe3,
0x03,0xd0,0xa0,0xe1,0x01,0xaa,0x4d,0xe2,0x0a,0x30,0xa0,0xe1,0xd7,0xf0,0x21,0xe3,
0x03,0xd0,0xa0,0xe1,0x01,0x3a,0x43,0xe2,0xdb,0xf0,0x21,0xe3,0x03,0xd0,0xa0,0xe1,
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0xd3,0xf0,0x21,0xe3,0x03,0xd0,0xa0,0xe1,0x02,0x39,0x43,0xe2,0xff,0x30,0xc3,0xe3,
0xff,0x3c,0xc3,0xe3,0x04,0x30,0x03,0xe5,0x00,0x20,0x53,0xe9,0xc0,0x20,0x82,0xe3,
0x02,0xf0,0x21,0xe1,0x01,0xa8,0x43,0xe2,0x00,0x10,0xb0,0xe3,0x01,0xb0,0xa0,0xe1,
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0x80,0x52,0xff,0xf7,0xab,0xff,0x01,0x37,0xdd,0xf8,0x04,0xc0,0x38,0xb9,0x34,0x44,
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0xd1,0xf8,0x00,0x80,0xcc,0xf3,0x03,0x49,0x28,0xf0,0xff,0x08,0x49,0xea,0x08,0x08,
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0x1d,0x68,0xcf,0x0f,0xc1,0xf3,0xc1,0x66,0x25,0xf4,0xe1,0x75,0x46,0xea,0x07,0x26,
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0x46,0x49,0x4a,0xf6,0xaa,0x25,0x0d,0x60,0x45,0x4d,0x1b,0x03,0x2e,0x68,0xb3,0xf5,
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0xff,0xf7,0xc2,0xff,0x18,0xe0,0x4b,0x43,0xfa,0x18,0x10,0x69,0xf9,0x58,0x52,0x68,
0xff,0xf7,0xa2,0xff,0x10,0xe0,0x4b,0x43,0xfa,0x18,0x10,0x69,0xf9,0x58,0x52,0x68,
0xff,0xf7,0x44,0xff,0x08,0xe0,0x4b,0x43,0xfa,0x18,0xf8,0x58,0x51,0x68,0xff,0xf7,
0x1b,0xff,0x01,0xe0,0x40,0xf2,0x05,0x10,0x33,0x68,0x2b,0x60,0x0b,0x4b,0x1b,0x68,
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0x00,0xb1,0xfe,0xe7,0x82,0xf0,0x01,0x02,0x22,0x60,0xa4,0xe7,0xd8,0x1b,0x00,0x20,
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0x04,0x40,0x03,0x40,0x94,0x13,0x00,0x20,0xfe,0xe7,0x00,0x00,0x08,0xb5,0x04,0x4b,
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0xa8,0x01,0x00,0x10,0x84,0x04,0x60,0x42,0x08,0xb5,0x04,0x4b,0x1b,0x68,0x9b,0x69,
0x98,0x47,0x03,0x4b,0x00,0x22,0x1a,0x60,0x08,0xbd,0x00,0xbf,0xa8,0x01,0x00,0x10,
0x84,0x04,0x60,0x42,0x10,0xb5,0x33,0x4b,0x33,0x48,0x1b,0x68,0x33,0x4a,0x13,0xf0,
0x02,0x0f,0x03,0x68,0x43,0xf0,0x02,0x03,0x03,0x60,0x13,0x68,0x01,0x68,0x19,0xd0,
0x21,0xf4,0xe1,0x72,0xc3,0xf3,0xc1,0x04,0x22,0xf0,0x01,0x02,0x22,0x43,0xc3,0xf3,
0xc0,0x11,0x42,0xea,0x01,0x22,0xc3,0xf3,0x41,0x11,0x42,0xea,0x81,0x12,0x02,0x60,
0x02,0x68,0xd4,0x07,0x03,0xd5,0x26,0x4a,0x12,0x68,0x50,0x07,0xfb,0xd5,0x03,0xf0,
0x07,0x03,0x18,0xe0,0x21,0xf4,0xe1,0x72,0xc3,0xf3,0xc1,0x24,0x22,0xf0,0x01,0x02,
0xc3,0xf3,0xc0,0x31,0x22,0x43,0x42,0xea,0x01,0x22,0xc3,0xf3,0x41,0x31,0x42,0xea,
0x81,0x12,0x02,0x60,0x02,0x68,0xd1,0x07,0x03,0xd5,0x19,0x4a,0x12,0x68,0x52,0x07,
0xfb,0xd5,0xc3,0xf3,0x02,0x23,0x4a,0xf6,0xaa,0x22,0x16,0x49,0x16,0x48,0x0a,0x60,
0x02,0x68,0x1b,0x03,0xb3,0xf5,0xe0,0x4f,0x22,0xf4,0xe2,0x42,0x18,0xbf,0x43,0xf4,
0x80,0x73,0x13,0x43,0x03,0x60,0x45,0xf2,0xaa,0x53,0x0b,0x60,0x0f,0x4b,0x10,0x49,
0x01,0x22,0x1a,0x60,0x00,0x22,0x0a,0x60,0x1a,0x60,0x05,0x22,0xc3,0xf8,0x58,0x22,
0x4f,0xf0,0xff,0x32,0xc1,0xf8,0x8c,0x22,0xc1,0xf8,0x90,0x22,0x02,0x22,0xc3,0xf8,
0x58,0x22,0x10,0xbd,0x00,0x00,0x09,0x40,0x24,0x00,0x03,0x40,0x08,0x13,0x00,0x50,
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0x34,0x20,0x03,0x40,0x2d,0xe9,0xf8,0x4f,0xd4,0x4d,0x29,0x68,0x11,0xf0,0x01,0x01,
0x40,0xf0,0x95,0x81,0xdf,0xf8,0x90,0xe3,0x05,0x27,0xd1,0x4b,0xce,0xf8,0x00,0x70,
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0xdf,0xf8,0x78,0xc3,0xdf,0xf8,0x78,0x83,0xdc,0xf8,0x00,0x20,0xd8,0xf8,0x00,0x40,
0x92,0xb2,0x5a,0x43,0xc2,0xf3,0x8f,0x16,0x22,0x0c,0x12,0x04,0x32,0x43,0xc8,0xf8,
0x00,0x20,0xc4,0x4a,0xc4,0x4c,0x12,0x68,0x26,0x68,0x5a,0x43,0xc3,0x4e,0x92,0x09,
0x22,0x60,0x32,0x68,0x54,0xf8,0x24,0x8c,0xc2,0xf3,0x07,0x42,0x5a,0x43,0x28,0xf0,
0xff,0x08,0xc2,0xf3,0x87,0x12,0xdf,0xf8,0x3c,0x93,0x42,0xea,0x08,0x02,0xdf,0xf8,
0x38,0x83,0x44,0xf8,0x24,0x2c,0xd9,0xf8,0x00,0xa0,0xd8,0xf8,0x00,0x20,0xca,0xf3,
0x07,0x4a,0x22,0xf0,0xff,0x02,0x4a,0xea,0x02,0x02,0xc8,0xf8,0x00,0x20,0xd9,0xf8,
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0x28,0xf4,0x7f,0x48,0x02,0xf4,0x7f,0x42,0x42,0xea,0x08,0x02,0xdf,0xf8,0x00,0x83,
0xca,0xf8,0x00,0x20,0xd8,0xf8,0x00,0x20,0xae,0xf5,0x09,0x7e,0x4f,0xea,0x12,0x6b,
0x0b,0xfb,0x03,0xfb,0xda,0xf8,0x04,0x20,0xcb,0xf3,0x8f,0x1b,0x12,0x0c,0x12,0x04,
0x4b,0xea,0x02,0x02,0xca,0xf8,0x04,0x20,0xd9,0xf8,0x00,0x20,0xc2,0xf3,0x07,0x22,
0x53,0x43,0x9f,0x4a,0x9b,0x00,0xd2,0xf8,0x00,0x90,0x03,0xf4,0x7f,0x43,0x29,0xf4,
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0x52,0xf8,0x24,0x3c,0x4f,0xea,0x1a,0x6a,0x23,0xf4,0x7f,0x43,0x43,0xea,0x0a,0x23,
0x42,0xf8,0x24,0x3c,0xd9,0xf8,0x00,0xa0,0x52,0xf8,0x24,0x3c,0xca,0xf3,0x07,0x4a,
0x23,0xf0,0xff,0x03,0x4a,0xea,0x03,0x03,0x42,0xf8,0x24,0x3c,0xd9,0xf8,0x00,0xa0,
0x52,0xf8,0x1c,0x3c,0x0a,0xf4,0x7f,0x4a,0x23,0xf4,0x7f,0x43,0x4a,0xea,0x03,0x03,
0x42,0xf8,0x1c,0x3c,0xd9,0xf8,0x00,0x90,0x52,0xf8,0x1c,0x3c,0x5f,0xfa,0x89,0xf9,
0x23,0xf0,0xff,0x03,0x49,0xea,0x03,0x03,0xdf,0xf8,0x5c,0x92,0x42,0xf8,0x1c,0x3c,
0x32,0x68,0xd9,0xf8,0x00,0x30,0x02,0xf4,0x70,0x42,0x23,0xf4,0x70,0x43,0x13,0x43,
0xc9,0xf8,0x00,0x30,0xd8,0xf8,0x00,0x20,0xdf,0xf8,0x40,0x82,0x02,0xf4,0x70,0x42,
0xd8,0xf8,0x00,0x30,0x23,0xf4,0x70,0x43,0x13,0x43,0xc8,0xf8,0x00,0x30,0x32,0x68,
0x54,0xf8,0x24,0x3c,0x12,0x0e,0x23,0xf4,0x7f,0x43,0x43,0xea,0x02,0x23,0x44,0xf8,
0x24,0x3c,0x70,0x4b,0x1b,0x68,0x62,0x6a,0xc3,0xf3,0x0b,0x06,0x22,0xf4,0x7f,0x63,
0x23,0xf0,0x0f,0x03,0x33,0x43,0x6c,0x4e,0x63,0x62,0x32,0x68,0x63,0x6a,0x02,0xf4,
0x70,0x22,0x23,0xf4,0x70,0x23,0x13,0x43,0x63,0x62,0x68,0x4c,0x22,0x68,0xd8,0xf8,
0x58,0x30,0xc2,0xf3,0x83,0x42,0x23,0xf4,0x70,0x23,0x43,0xea,0x02,0x43,0xc8,0xf8,
0x58,0x30,0xdc,0xf8,0x00,0x30,0xd8,0xf8,0x58,0x20,0xc3,0xf3,0x0b,0x4c,0x22,0xf4,
0x7f,0x63,0x23,0xf0,0x0f,0x03,0x4c,0xea,0x03,0x03,0xc8,0xf8,0x58,0x30,0x23,0x68,
0xd8,0xf8,0x5c,0x20,0x4f,0xea,0xd3,0x5c,0x22,0xf0,0xff,0x73,0x23,0xf4,0x80,0x33,
0x43,0xea,0x0c,0x43,0xc8,0xf8,0x5c,0x30,0x33,0x68,0x55,0x4a,0x0f,0x33,0x03,0xf0,
0x0f,0x03,0x13,0x60,0x26,0x68,0x53,0x68,0xc6,0xf3,0x80,0x56,0x23,0xf4,0x00,0x03,
0x43,0xea,0xc6,0x53,0x53,0x60,0x53,0x68,0x4e,0x4e,0x43,0xf4,0x80,0x43,0x53,0x60,
0x02,0x23,0xce,0xf8,0x24,0x32,0x4a,0xf6,0xaa,0x23,0xdf,0xf8,0x74,0xc1,0xce,0xf8,
0x00,0x30,0xdc,0xf8,0x00,0x30,0x32,0x68,0x03,0xf0,0x0f,0x08,0x22,0xf4,0x7f,0x02,
0x42,0xea,0x08,0x42,0xc3,0xf3,0x03,0x23,0x42,0xea,0x03,0x53,0xdf,0xf8,0x54,0x81,
0x33,0x60,0xd8,0xf8,0x00,0x30,0x32,0x68,0xc3,0xf3,0x03,0x49,0x22,0xf0,0xff,0x02,
0x49,0xea,0x02,0x02,0xc3,0xf3,0x03,0x63,0x42,0xea,0x03,0x13,0x33,0x60,0xdc,0xf8,
0x00,0x60,0xdf,0xf8,0x34,0xc1,0x06,0xf4,0x70,0x22,0xdc,0xf8,0x00,0x30,0x23,0xf4,
0x7f,0x03,0x1a,0x43,0xc6,0xf3,0x03,0x63,0x42,0xea,0x03,0x53,0x32,0x4e,0xcc,0xf8,
0x00,0x30,0x32,0x68,0x5c,0xf8,0x08,0x3c,0xc2,0xf3,0x03,0x22,0x23,0xf0,0x0f,0x03,
0x13,0x43,0x4c,0xf8,0x08,0x3c,0xd8,0xf8,0x00,0x20,0xdc,0xf8,0x08,0x30,0x02,0xf4,
0xf8,0x52,0x23,0xf4,0xf8,0x53,0x13,0x43,0xcc,0xf8,0x08,0x30,0x32,0x68,0xdc,0xf8,
0x0c,0x30,0x12,0x0b,0x02,0xf4,0x70,0x42,0x23,0xf4,0x70,0x43,0x13,0x43,0xcc,0xf8,
0x0c,0x30,0x32,0x68,0x21,0x4e,0xc2,0xf3,0x04,0x42,0x33,0x68,0x23,0xf0,0x1f,0x03,
0x13,0x43,0x33,0x60,0x22,0x68,0x1e,0x4c,0xc2,0xf3,0x01,0x42,0x23,0x68,0x23,0xf4,
0x40,0x13,0x43,0xea,0x02,0x53,0x23,0x60,0x45,0xf2,0xaa,0x53,0x19,0x4a,0xce,0xf8,
0x00,0x30,0x17,0x60,0x2b,0x68,0x43,0xf0,0x01,0x03,0x2b,0x60,0x11,0x60,0x16,0x4b,
0x16,0x4c,0x1b,0x68,0x16,0x4a,0x13,0xf0,0x02,0x0f,0x23,0x68,0x15,0x4d,0x43,0xf0,
0x02,0x03,0x23,0x60,0x13,0x68,0x21,0x68,0x59,0xd0,0x3f,0xe0,0x40,0x00,0x03,0x40,
0x00,0x20,0x03,0x40,0x8c,0x11,0x00,0x50,0x44,0x22,0x03,0x40,0x74,0x11,0x00,0x50,
0x34,0x22,0x03,0x40,0x84,0x11,0x00,0x50,0x80,0x11,0x00,0x50,0xb0,0x12,0x00,0x50,
0x78,0x22,0x03,0x40,0x84,0x20,0x03,0x40,0x98,0x11,0x00,0x50,0x98,0x20,0x03,0x40,
0xa8,0x20,0x03,0x40,0x3c,0x00,0x03,0x40,0x00,0x00,0x09,0x40,0x24,0x00,0x03,0x40,
0x08,0x13,0x00,0x50,0x1c,0x00,0x03,0x40,0x88,0x22,0x03,0x40,0x88,0x11,0x00,0x50,
0x40,0x22,0x03,0x40,0x78,0x11,0x00,0x50,0x24,0x22,0x03,0x40,0x28,0x22,0x03,0x40,
0x7c,0x11,0x00,0x50,0x70,0x11,0x00,0x50,0x1c,0x22,0x03,0x40,0x14,0x22,0x03,0x40,
0x90,0x11,0x00,0x50,0x94,0x11,0x00,0x50,0x88,0x20,0x03,0x40,0x21,0xf4,0xe1,0x72,
0xc3,0xf3,0xc1,0x46,0x22,0xf0,0x01,0x02,0xc3,0xf3,0xc0,0x51,0x32,0x43,0x42,0xea,
0x01,0x22,0xc3,0xf3,0x41,0x51,0x42,0xea,0x81,0x12,0x22,0x60,0x22,0x68,0xd7,0x07,
0x02,0xd5,0x2a,0x68,0x56,0x07,0xfc,0xd5,0xc3,0xf3,0x02,0x43,0x16,0xe0,0xc3,0xf3,
0xc1,0x62,0xde,0x0f,0x42,0xea,0x06,0x26,0x21,0xf4,0xe1,0x72,0x22,0xf0,0x01,0x02,
0x32,0x43,0xc3,0xf3,0x41,0x71,0x42,0xea,0x81,0x12,0x22,0x60,0x22,0x68,0xd4,0x07,
0x02,0xd5,0x2a,0x68,0x51,0x07,0xfc,0xd5,0xc3,0xf3,0x02,0x63,0x4a,0xf6,0xaa,0x22,
0x3a,0x49,0x3b,0x4c,0x0a,0x60,0x22,0x68,0x1b,0x03,0xb3,0xf5,0xe0,0x4f,0x22,0xf4,
0xe2,0x42,0x18,0xbf,0x43,0xf4,0x80,0x73,0x13,0x43,0x23,0x60,0x45,0xf2,0xaa,0x53,
0x4f,0xf6,0xff,0x74,0x0b,0x60,0x33,0x4b,0x00,0x21,0x01,0x22,0x19,0x60,0x43,0xf8,
0x20,0x2c,0x31,0x4a,0x4f,0xf0,0x05,0x0e,0x14,0x60,0x30,0x4c,0x43,0xf8,0x20,0x1c,
0x02,0xf5,0xec,0x72,0x10,0x23,0xc4,0xf8,0x00,0xe0,0x13,0x60,0x2c,0x4b,0x15,0x26,
0x1e,0x60,0x02,0x26,0x26,0x60,0x2b,0x4e,0x37,0x68,0xc4,0xf8,0x00,0xe0,0xdf,0xf8,
0xb4,0xe0,0xce,0xf8,0x00,0x10,0xce,0xf8,0x04,0x10,0x18,0xb1,0x31,0x68,0x41,0xf4,
0x00,0x01,0x31,0x60,0x02,0x21,0x05,0x20,0x21,0x60,0x20,0x60,0x08,0x20,0x10,0x60,
0x15,0x22,0x1a,0x60,0x21,0x60,0x2b,0x68,0x9a,0x07,0xfc,0xd4,0x1e,0x4b,0x1b,0x68,
0x13,0xf0,0x10,0x0f,0x14,0xbf,0x04,0x25,0x00,0x25,0xff,0xf7,0x1b,0xfd,0x3b,0x02,
0x07,0xd4,0x05,0x23,0x23,0x60,0x33,0x68,0x23,0xf4,0x00,0x03,0x33,0x60,0x02,0x23,
0x23,0x60,0xbd,0xb9,0x15,0x4b,0x16,0x48,0x19,0x68,0x03,0xf5,0x10,0x53,0x04,0x33,
0x1a,0x68,0xc9,0xb2,0x02,0xf0,0x0f,0x02,0x51,0x43,0x1b,0x68,0x14,0x22,0x03,0xf0,
0x0f,0x03,0x9b,0x02,0xc3,0xeb,0x81,0x21,0x01,0xf6,0xd8,0x71,0xbd,0xe8,0xf8,0x4f,
0xff,0xf7,0xea,0xbc,0x28,0x46,0xbd,0xe8,0xf8,0x8f,0x00,0xbf,0x64,0x20,0x03,0x40,
0xa8,0x20,0x03,0x40,0x50,0x20,0x03,0x40,0x34,0x20,0x03,0x40,0x88,0x22,0x03,0x40,
0xb4,0x22,0x03,0x40,0x7c,0x22,0x03,0x40,0x54,0x20,0x03,0x40,0x2c,0x00,0x03,0x40,
0xf4,0x0e,0x00,0x20,0xc0,0x22,0x03,0x40,0x08,0xb5,0x01,0x1c,0x00,0x22,0x00,0x20,
0x00,0x23,0x00,0xf0,0xeb,0xf8,0x08,0xbc,0x02,0xbc,0x08,0x47,0x10,0xb5,0x00,0x21,
0x04,0x1c,0x00,0xf0,0x5d,0xf9,0x05,0x4b,0x18,0x68,0xc3,0x6b,0x00,0x2b,0x01,0xd0,
0x00,0xf0,0x06,0xf8,0x20,0x1c,0xff,0xf7,0xa7,0xfc,0xc0,0x46,0x0c,0x0f,0x00,0x20,
0x18,0x47,0xc0,0x46,0x38,0xb5,0x0a,0x4b,0x0a,0x4c,0xe4,0x1a,0xa4,0x10,0x0a,0xd0,
0x09,0x4a,0xa5,0x18,0xad,0x00,0xed,0x18,0x2b,0x68,0x01,0x3c,0x00,0xf0,0x0e,0xf8,
0x04,0x3d,0x00,0x2c,0xf8,0xd1,0x00,0xf0,0xcd,0xf9,0x38,0xbc,0x01,0xbc,0x00,0x47,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xff,0xff,0xff,0x3f,0x18,0x47,0xc0,0x46,
0x70,0xb5,0x10,0x4e,0x10,0x4d,0xad,0x1b,0xad,0x10,0x00,0x24,0x00,0x2d,0x06,0xd0,
0xa3,0x00,0xf3,0x58,0x01,0x34,0x00,0xf0,0x1d,0xf8,0xa5,0x42,0xf8,0xd1,0x00,0xf0,
0xab,0xf9,0x0a,0x4e,0x0a,0x4d,0xad,0x1b,0xad,0x10,0x00,0x24,0x00,0x2d,0x06,0xd0,
0xa3,0x00,0xf3,0x58,0x01,0x34,0x00,0xf0,0x0d,0xf8,0xa5,0x42,0xf8,0xd1,0x70,0xbc,
0x01,0xbc,0x00,0x47,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x18,0x47,0xc0,0x46,0x70,0xb5,0x0f,0x2a,0x34,0xd9,0x04,0x1c,
0x0c,0x43,0x0b,0x1c,0xa4,0x07,0x33,0xd1,0x15,0x1c,0x04,0x1c,0x10,0x3d,0x2d,0x09,
0x01,0x35,0x2d,0x01,0x49,0x19,0x1e,0x68,0x26,0x60,0x5e,0x68,0x66,0x60,0x9e,0x68,
0xa6,0x60,0xde,0x68,0x10,0x33,0xe6,0x60,0x10,0x34,0x99,0x42,0xf3,0xd1,0x0f,0x23,
0x45,0x19,0x13,0x40,0x03,0x2b,0x1d,0xd9,0x1c,0x1f,0x00,0x23,0xa4,0x08,0x01,0x34,
0xa4,0x00,0xce,0x58,0xee,0x50,0x04,0x33,0xa3,0x42,0xfa,0xd1,0xed,0x18,0xc9,0x18,
0x03,0x23,0x1a,0x40,0x05,0xd0,0x00,0x23,0xcc,0x5c,0xec,0x54,0x01,0x33,0x93,0x42,
0xfa,0xd1,0x70,0xbc,0x02,0xbc,0x08,0x47,0x05,0x1c,0x00,0x2a,0xf3,0xd1,0xf8,0xe7,
0x05,0x1c,0xf0,0xe7,0x1a,0x1c,0xf8,0xe7,0x70,0xb5,0x83,0x07,0x43,0xd0,0x54,0x1e,
0x00,0x2a,0x3d,0xd0,0x0d,0x06,0x2d,0x0e,0x03,0x1c,0x03,0x26,0x03,0xe0,0x62,0x1e,
0x00,0x2c,0x35,0xd0,0x14,0x1c,0x01,0x33,0x5a,0x1e,0x15,0x70,0x33,0x42,0xf6,0xd1,
0x03,0x2c,0x24,0xd9,0xff,0x25,0x0d,0x40,0x2a,0x02,0x15,0x43,0x2a,0x04,0x15,0x43,
0x0f,0x2c,0x11,0xd9,0x26,0x1c,0x10,0x3e,0x36,0x09,0x01,0x36,0x36,0x01,0x1a,0x1c,
0x9b,0x19,0x15,0x60,0x55,0x60,0x95,0x60,0xd5,0x60,0x10,0x32,0x93,0x42,0xf8,0xd1,
0x0f,0x22,0x14,0x40,0x03,0x2c,0x0a,0xd9,0x26,0x1f,0xb6,0x08,0x01,0x36,0xb6,0x00,
0x1a,0x1c,0x9b,0x19,0x20,0xc2,0x93,0x42,0xfc,0xd1,0x03,0x22,0x14,0x40,0x00,0x2c,
0x06,0xd0,0x09,0x06,0x1c,0x19,0x09,0x0e,0x19,0x70,0x01,0x33,0xa3,0x42,0xfb,0xd1,
0x70,0xbc,0x02,0xbc,0x08,0x47,0x14,0x1c,0x03,0x1c,0xc9,0xe7,0xf8,0xb5,0x44,0x46,
0x5f,0x46,0x56,0x46,0x4d,0x46,0x9b,0x46,0x30,0x4b,0xf0,0xb4,0x1c,0x68,0xa4,0x23,
0x5b,0x00,0x05,0x1c,0xe0,0x58,0x0e,0x1c,0x90,0x46,0x00,0x28,0x4d,0xd0,0x43,0x68,
0x1f,0x2b,0x0f,0xdc,0x5c,0x1c,0x00,0x2d,0x23,0xd1,0x02,0x33,0x9b,0x00,0x44,0x60,
0x1e,0x50,0x00,0x20,0x3c,0xbc,0x90,0x46,0x99,0x46,0xa2,0x46,0xab,0x46,0xf8,0xbc,
0x02,0xbc,0x08,0x47,0x22,0x4b,0x00,0x2b,0x3c,0xd0,0xc8,0x20,0x40,0x00,0xaf,0xf3,
0x00,0x80,0x00,0x28,0x36,0xd0,0xa4,0x22,0x00,0x23,0x52,0x00,0xa1,0x58,0x43,0x60,
0x01,0x60,0xa0,0x50,0x40,0x32,0x83,0x50,0x04,0x32,0x83,0x50,0x01,0x24,0x00,0x2d,
0xdb,0xd0,0x9a,0x00,0x91,0x46,0x81,0x44,0x42,0x46,0x88,0x21,0x4f,0x46,0x7a,0x50,
0xc4,0x22,0x52,0x00,0x90,0x46,0x80,0x44,0x42,0x46,0x87,0x39,0x99,0x40,0x12,0x68,
0x0a,0x43,0x94,0x46,0x8a,0x46,0x42,0x46,0x61,0x46,0x11,0x60,0x84,0x22,0x49,0x46,
0x5f,0x46,0x52,0x00,0x8f,0x50,0x02,0x2d,0xbf,0xd1,0x02,0x1c,0x55,0x46,0x8d,0x32,
0xff,0x32,0x11,0x68,0x0d,0x43,0x15,0x60,0xb7,0xe7,0x20,0x1c,0x4d,0x30,0xff,0x30,
0xe0,0x50,0xac,0xe7,0x01,0x20,0x40,0x42,0xb4,0xe7,0xc0,0x46,0x0c,0x0f,0x00,0x20,
0x00,0x00,0x00,0x00,0x08,0xb5,0x04,0x4b,0x00,0x2b,0x02,0xd0,0x03,0x48,0xff,0xf7,
0x9b,0xfe,0x08,0xbc,0x01,0xbc,0x00,0x47,0x00,0x00,0x00,0x00,0x15,0x0b,0x00,0x20,
0xf0,0xb5,0x56,0x46,0x5f,0x46,0x4d,0x46,0x44,0x46,0xf0,0xb4,0x0e,0x1c,0x3f,0x4b,
0x1b,0x68,0x87,0xb0,0x03,0x93,0x49,0x33,0xff,0x33,0x01,0x90,0x04,0x93,0xa4,0x22,
0x03,0x9b,0x52,0x00,0x9f,0x58,0x00,0x2f,0x4d,0xd0,0x04,0x9b,0x98,0x46,0x00,0x23,
0x9b,0x46,0xc4,0x23,0x5b,0x00,0x9c,0x46,0xbc,0x44,0x63,0x46,0x02,0x93,0xc6,0x23,
0x5b,0x00,0x9a,0x46,0x7c,0x68,0xa5,0x00,0x7d,0x19,0xba,0x44,0x01,0x3c,0x08,0xd5,
0x27,0xe0,0x6b,0x1d,0xff,0x33,0x1b,0x68,0xb3,0x42,0x04,0xd0,0x04,0x3d,0x01,0x3c,
0x1f,0xd3,0x00,0x2e,0xf5,0xd1,0x7b,0x68,0x01,0x3b,0x6a,0x68,0xa3,0x42,0x3e,0xd0,
0x5b,0x46,0x6b,0x60,0x00,0x2a,0xf1,0xd0,0x7b,0x68,0x99,0x46,0x01,0x23,0xa3,0x40,
0x02,0x99,0x09,0x68,0x05,0x91,0x19,0x42,0x26,0xd1,0x00,0xf0,0x43,0xf8,0x7b,0x68,
0x4b,0x45,0xc4,0xd1,0x43,0x46,0x1b,0x68,0xbb,0x42,0xc0,0xd1,0x04,0x3d,0x01,0x3c,
0xdf,0xd2,0x1b,0x4b,0x00,0x2b,0x0e,0xd0,0x7b,0x68,0x00,0x2b,0x27,0xd1,0x3b,0x68,
0x00,0x2b,0x28,0xd0,0x42,0x46,0x38,0x1c,0x13,0x60,0xaf,0xf3,0x00,0x80,0x43,0x46,
0x1f,0x68,0x00,0x2f,0xb5,0xd1,0x07,0xb0,0x3c,0xbc,0x90,0x46,0x99,0x46,0xa2,0x46,
0xab,0x46,0xf0,0xbc,0x01,0xbc,0x00,0x47,0x51,0x46,0x09,0x68,0x19,0x42,0x08,0xd1,
0x2b,0x1c,0x84,0x33,0x19,0x68,0x01,0x98,0x00,0xf0,0x14,0xf8,0xcf,0xe7,0x7c,0x60,
0xc0,0xe7,0x2b,0x1c,0x84,0x33,0x18,0x68,0x00,0xf0,0x0c,0xf8,0xc7,0xe7,0x3b,0x68,
0xb8,0x46,0x1f,0x1c,0xdd,0xe7,0x00,0x23,0xfa,0xe7,0xc0,0x46,0x0c,0x0f,0x00,0x20,
0x00,0x00,0x00,0x00,0x10,0x47,0xc0,0x46,0xf8,0xb5,0xc0,0x46,0xf8,0xbc,0x08,0xbc,
0x9e,0x46,0x70,0x47,0xf8,0xb5,0xc0,0x46,0xf8,0xbc,0x08,0xbc,0x9e,0x46,0x70,0x47,
0x00,0x00,0x00,0x00,0x24,0xf2,0xff,0x7f,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x28,0x15,0x00,0x20,0xff,0xff,0xff,0xc5,0xff,0xff,0xff,0xff,0xc5,0xff,0xff,0xff,
0xc5,0xc5,0xc5,0xff,0xc5,0xc5,0xc5,0xff,0x43,0x00,0x00,0x00,0x18,0x0f,0x00,0x20,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x12,0x00,0x20,
0x6c,0x12,0x00,0x20,0xd4,0x12,0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xf8,0x0e,0x00,0x20,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x08,0x0f,0x00,0x20,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
@ -306,9 +307,8 @@
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x08,0x0f,0x00,0x20,0x61,0x00,0x00,0x20,0x35,0x00,0x00,0x20,0x00,0x00,0x00,0x00,
0x69,0x0c,0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x18,0x0f,0x00,0x20,0xc1,0x00,0x00,0x20,0x91,0x00,0x00,0x20,0x00,0x00,0x00,0x00,
0x95,0x0d,0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,

View File

@ -1,257 +1,258 @@
/* Autogenerated with ../../../../src/helper/bin2char.sh */
0x08,0xb5,0x00,0xbf,0x00,0xbf,0x00,0xbf,0x00,0xbf,0xdf,0xf8,0x1c,0xd0,0x07,0x48,
0x07,0x49,0x4f,0xf0,0x00,0x02,0x88,0x42,0xb8,0xbf,0x40,0xf8,0x04,0x2b,0xff,0xf6,
0xfa,0xaf,0x00,0xf0,0x71,0xf9,0xfe,0xe7,0xe8,0x0e,0x00,0x20,0x4c,0x13,0x00,0x20,
0xf4,0x13,0x00,0x20,0x10,0xb5,0x07,0x4c,0x23,0x78,0x00,0x2b,0x07,0xd1,0x06,0x4b,
0x07,0x49,0x4f,0xf0,0x00,0x02,0x88,0x42,0xb8,0xbf,0x40,0xf8,0x04,0x2b,0xfa,0xdb,
0x00,0xf0,0xa8,0xf9,0xfe,0xe7,0x00,0x00,0xf0,0x0e,0x00,0x20,0x54,0x13,0x00,0x20,
0xfc,0x13,0x00,0x20,0x08,0xb5,0x07,0x4b,0x07,0x48,0x03,0x33,0x1b,0x1a,0x06,0x2b,
0x04,0xd9,0x06,0x4b,0x00,0x2b,0x01,0xd0,0x00,0xf0,0x5c,0xf8,0x08,0xbc,0x01,0xbc,
0x00,0x47,0xc0,0x46,0x50,0x13,0x00,0x20,0x50,0x13,0x00,0x20,0x00,0x00,0x00,0x00,
0x08,0x48,0x09,0x49,0x09,0x1a,0x89,0x10,0x08,0xb5,0xcb,0x0f,0x59,0x18,0x49,0x10,
0x04,0xd0,0x06,0x4b,0x00,0x2b,0x01,0xd0,0x00,0xf0,0x44,0xf8,0x08,0xbc,0x01,0xbc,
0x00,0x47,0xc0,0x46,0x50,0x13,0x00,0x20,0x50,0x13,0x00,0x20,0x00,0x00,0x00,0x00,
0x10,0xb5,0x08,0x4c,0x23,0x78,0x00,0x2b,0x09,0xd1,0xff,0xf7,0xcb,0xff,0x06,0x4b,
0x00,0x2b,0x02,0xd0,0x05,0x48,0xaf,0xf3,0x00,0x80,0x01,0x23,0x23,0x70,0x10,0xbc,
0x01,0xbc,0x00,0x47,0x4c,0x13,0x00,0x20,0x00,0x00,0x00,0x00,0xd8,0x0e,0x00,0x20,
0x08,0xb5,0x09,0x4b,0x00,0x2b,0x03,0xd0,0x08,0x48,0x09,0x49,0xaf,0xf3,0x00,0x80,
0x08,0x48,0x03,0x68,0x00,0x2b,0x04,0xd0,0x07,0x4b,0x00,0x2b,0x01,0xd0,0x00,0xf0,
0x0d,0xf8,0x08,0xbc,0x01,0xbc,0x00,0x47,0x00,0x00,0x00,0x00,0xd8,0x0e,0x00,0x20,
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0x52,0x00,0xa3,0x18,0x18,0x68,0x01,0x43,0x19,0x60,0xd8,0xe7,0x1c,0x1c,0x4d,0x34,
0xff,0x34,0x5c,0x51,0xb3,0xe7,0xc0,0x46,0x04,0x0f,0x00,0x20,0x00,0x00,0x00,0x00,
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0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x84,0x15,0x00,0x20,0xff,0xff,0xff,0xc5,
0xff,0xff,0xff,0xff,0xc5,0xff,0xff,0xff,0xc5,0xc5,0xc5,0xff,0xc5,0xc5,0xc5,0xff,
0x43,0x00,0x00,0x00,0x10,0x0f,0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0xfc,0x11,0x00,0x20,0x64,0x12,0x00,0x20,0xcc,0x12,0x00,0x20,
0x20,0x46,0x10,0xbd,0x70,0x13,0x00,0x20,0x01,0x39,0xf8,0xb5,0x44,0x0b,0x08,0x44,
0x45,0x0b,0x66,0x03,0xac,0x42,0x14,0xd8,0x0b,0x4f,0xe3,0x5d,0x6b,0xb9,0x30,0x46,
0x00,0xf0,0xfc,0xf8,0x38,0xb1,0x00,0x04,0x00,0xf4,0x7f,0x00,0x40,0xea,0x04,0x60,
0x40,0xf4,0x81,0x70,0xf8,0xbd,0x01,0x23,0xe3,0x55,0x01,0x34,0x06,0xf5,0x00,0x56,
0xe8,0xe7,0x00,0x20,0xf8,0xbd,0x00,0xbf,0x70,0x13,0x00,0x20,0x2d,0xe9,0xf0,0x4f,
0x53,0x1e,0x85,0xb0,0x0b,0x44,0x02,0x90,0x0d,0x46,0x4f,0xea,0x51,0x38,0x5b,0x0b,
0x16,0x46,0x23,0x48,0x01,0x93,0x00,0x21,0x84,0x22,0x00,0xf0,0xbd,0xfc,0x4f,0xea,
0x48,0x37,0xc5,0xf3,0x0c,0x0c,0x4f,0xf0,0x00,0x09,0x01,0x9b,0x98,0x45,0x32,0xd8,
0x74,0x19,0xdf,0xf8,0x70,0xb0,0xcd,0xf8,0x0c,0xc0,0x07,0xf5,0x00,0x5a,0x54,0x45,
0x88,0xbf,0xc4,0xf3,0x0c,0x04,0x39,0x46,0x4f,0xf4,0x00,0x52,0x58,0x46,0x8c,0xbf,
0x34,0x1b,0x34,0x46,0x00,0xf0,0x60,0xfc,0xdd,0xf8,0x0c,0xc0,0x02,0x9b,0x0b,0xeb,
0x0c,0x00,0x03,0xeb,0x09,0x01,0x22,0x46,0x00,0xf0,0x56,0xfc,0x38,0x46,0x4f,0xf4,
0x00,0x51,0x08,0xf1,0x01,0x08,0xff,0xf7,0x9f,0xff,0x68,0xb9,0x39,0x46,0x58,0x46,
0x4f,0xf4,0x00,0x52,0x25,0x44,0x00,0xf0,0xaf,0xf8,0x36,0x1b,0xc5,0xf3,0x0c,0x0c,
0xa1,0x44,0x57,0x46,0xc9,0xe7,0x00,0x20,0x05,0xb0,0xbd,0xe8,0xf0,0x8f,0x00,0xbf,
0x70,0x13,0x00,0x20,0x00,0x60,0x00,0x20,0xb2,0xf5,0x00,0x5f,0xf8,0xb5,0x07,0x46,
0x0e,0x46,0x15,0x46,0x0b,0xd8,0x08,0x46,0x11,0x46,0xff,0xf7,0x7d,0xff,0x04,0x46,
0x40,0xb9,0x38,0x46,0x31,0x46,0x2a,0x46,0x00,0xf0,0x8e,0xf8,0x02,0xe0,0x4f,0xf4,
0x82,0x70,0xf8,0xbd,0x20,0x46,0xf8,0xbd,0x08,0xb5,0x00,0xf0,0x85,0xf8,0x00,0x20,
0x08,0xbd,0x00,0x00,0xf8,0xb5,0x31,0x48,0x31,0x49,0x32,0x4a,0x32,0x4c,0xff,0xf7,
0x3d,0xff,0x00,0x23,0x23,0x60,0x22,0x68,0x2c,0x4f,0x14,0x23,0x03,0xfb,0x02,0x73,
0x08,0x33,0x5b,0x68,0x00,0x2b,0xf7,0xd0,0x2c,0x4b,0x1a,0x68,0x11,0x07,0xfb,0xd4,
0x2b,0x4d,0x2c,0x4e,0x2a,0x68,0x32,0x60,0x42,0xf0,0x33,0x02,0x2a,0x60,0x1a,0x68,
0x12,0x07,0xfc,0xd4,0x21,0x68,0x14,0x22,0x02,0xfb,0x01,0x73,0x98,0x68,0x01,0x38,
0x13,0x46,0x04,0x28,0x26,0xd8,0xdf,0xe8,0x00,0xf0,0x03,0x06,0x0e,0x16,0x1e,0x00,
0xff,0xf7,0x28,0xff,0x20,0xe0,0x4b,0x43,0xfa,0x18,0x10,0x69,0xf9,0x58,0x52,0x68,
0xff,0xf7,0xc2,0xff,0x18,0xe0,0x4b,0x43,0xfa,0x18,0x10,0x69,0xf9,0x58,0x52,0x68,
0xff,0xf7,0xa2,0xff,0x10,0xe0,0x4b,0x43,0xfa,0x18,0x10,0x69,0xf9,0x58,0x52,0x68,
0xff,0xf7,0x44,0xff,0x08,0xe0,0x4b,0x43,0xfa,0x18,0xf8,0x58,0x51,0x68,0xff,0xf7,
0x1b,0xff,0x01,0xe0,0x40,0xf2,0x05,0x10,0x33,0x68,0x2b,0x60,0x0b,0x4b,0x1b,0x68,
0x1b,0x07,0xfb,0xd4,0x22,0x68,0x14,0x23,0x03,0xfb,0x02,0x77,0xfb,0x68,0xf8,0x60,
0x00,0xb1,0xfe,0xe7,0x82,0xf0,0x01,0x02,0x22,0x60,0xa4,0xe7,0xd8,0x1f,0x00,0x20,
0x00,0x20,0x00,0x20,0x00,0x40,0x00,0x20,0xf4,0x13,0x00,0x20,0x00,0x40,0x03,0x40,
0x04,0x40,0x03,0x40,0xf8,0x13,0x00,0x20,0xfe,0xe7,0x00,0x00,0x08,0xb5,0x04,0x4b,
0x1b,0x68,0x5b,0x69,0x98,0x47,0x03,0x4b,0x00,0x22,0x1a,0x60,0x08,0xbd,0x00,0xbf,
0xa8,0x01,0x00,0x10,0x84,0x04,0x60,0x42,0x08,0xb5,0x04,0x4b,0x1b,0x68,0x9b,0x69,
0x98,0x47,0x03,0x4b,0x00,0x22,0x1a,0x60,0x08,0xbd,0x00,0xbf,0xa8,0x01,0x00,0x10,
0x84,0x04,0x60,0x42,0x10,0xb5,0x33,0x4b,0x33,0x48,0x1b,0x68,0x33,0x4a,0x13,0xf0,
0x02,0x0f,0x03,0x68,0x43,0xf0,0x02,0x03,0x03,0x60,0x13,0x68,0x01,0x68,0x19,0xd0,
0x21,0xf4,0xe1,0x72,0xc3,0xf3,0xc1,0x04,0x22,0xf0,0x01,0x02,0x22,0x43,0xc3,0xf3,
0xc0,0x11,0x42,0xea,0x01,0x22,0xc3,0xf3,0x41,0x11,0x42,0xea,0x81,0x12,0x02,0x60,
0x02,0x68,0xd4,0x07,0x03,0xd5,0x26,0x4a,0x12,0x68,0x50,0x07,0xfb,0xd5,0x03,0xf0,
0x07,0x03,0x18,0xe0,0x21,0xf4,0xe1,0x72,0xc3,0xf3,0xc1,0x24,0x22,0xf0,0x01,0x02,
0xc3,0xf3,0xc0,0x31,0x22,0x43,0x42,0xea,0x01,0x22,0xc3,0xf3,0x41,0x31,0x42,0xea,
0x81,0x12,0x02,0x60,0x02,0x68,0xd1,0x07,0x03,0xd5,0x19,0x4a,0x12,0x68,0x52,0x07,
0xfb,0xd5,0xc3,0xf3,0x02,0x23,0x17,0x49,0x17,0x48,0x4a,0xf6,0xaa,0x22,0x0a,0x60,
0x02,0x68,0x1b,0x03,0xb3,0xf5,0xe0,0x4f,0x22,0xf4,0xe2,0x42,0x18,0xbf,0x43,0xf4,
0x80,0x73,0x13,0x43,0x03,0x60,0x45,0xf2,0xaa,0x53,0x0b,0x60,0x0f,0x4b,0x10,0x49,
0x01,0x22,0x1a,0x60,0x00,0x22,0x0a,0x60,0x1a,0x60,0x05,0x22,0xc3,0xf8,0x58,0x22,
0x4f,0xf0,0xff,0x32,0xc1,0xf8,0x8c,0x22,0xc1,0xf8,0x90,0x22,0x02,0x22,0xc3,0xf8,
0x58,0x22,0x10,0xbd,0x10,0x00,0x09,0x40,0x24,0x00,0x03,0x40,0x08,0x13,0x00,0x50,
0x1c,0x00,0x03,0x40,0x64,0x20,0x03,0x40,0xa8,0x20,0x03,0x40,0x30,0x20,0x03,0x40,
0x34,0x20,0x03,0x40,0x2d,0xe9,0xf8,0x4f,0xd4,0x4d,0x29,0x68,0x11,0xf0,0x01,0x01,
0x40,0xf0,0x95,0x81,0xdf,0xf8,0x90,0xe3,0xd1,0x4b,0xdf,0xf8,0x90,0xc3,0xdf,0xf8,
0x90,0x83,0xdf,0xf8,0x90,0x93,0x05,0x27,0xce,0xf8,0x00,0x70,0x1b,0x68,0xc3,0xf3,
0x03,0x23,0x4f,0xf4,0x40,0x72,0x01,0x33,0xb2,0xfb,0xf3,0xf3,0xdc,0xf8,0x00,0x20,
0xd8,0xf8,0x00,0x40,0x92,0xb2,0x5a,0x43,0xc2,0xf3,0x8f,0x16,0x22,0x0c,0x12,0x04,
0x32,0x43,0xc8,0xf8,0x00,0x20,0xc3,0x4a,0xc3,0x4c,0x12,0x68,0x26,0x68,0xc3,0x4e,
0x5a,0x43,0x92,0x09,0x22,0x60,0x32,0x68,0x54,0xf8,0x24,0x8c,0xc2,0xf3,0x07,0x42,
0x5a,0x43,0x28,0xf0,0xff,0x08,0xc2,0xf3,0x87,0x12,0x42,0xea,0x08,0x02,0xdf,0xf8,
0x38,0x83,0x44,0xf8,0x24,0x2c,0xd9,0xf8,0x00,0xa0,0xd8,0xf8,0x00,0x20,0xca,0xf3,
0x07,0x4a,0x22,0xf0,0xff,0x02,0x4a,0xea,0x02,0x02,0xc8,0xf8,0x00,0x20,0xd9,0xf8,
0x00,0x20,0xdf,0xf8,0x18,0xa3,0x12,0x0e,0xda,0xf8,0x00,0x80,0x5a,0x43,0x92,0x00,
0x28,0xf4,0x7f,0x48,0x02,0xf4,0x7f,0x42,0x42,0xea,0x08,0x02,0xdf,0xf8,0x00,0x83,
0xca,0xf8,0x00,0x20,0xd8,0xf8,0x00,0x20,0x4f,0xea,0x12,0x6b,0xda,0xf8,0x04,0x20,
0x0b,0xfb,0x03,0xfb,0x12,0x0c,0xcb,0xf3,0x8f,0x1b,0x12,0x04,0x4b,0xea,0x02,0x02,
0xca,0xf8,0x04,0x20,0xd9,0xf8,0x00,0x20,0xc2,0xf3,0x07,0x22,0x53,0x43,0xa0,0x4a,
0xd2,0xf8,0x00,0x90,0x9b,0x00,0x29,0xf4,0x7f,0x49,0x03,0xf4,0x7f,0x43,0x43,0xea,
0x09,0x03,0xdf,0xf8,0xc0,0x92,0x13,0x60,0xd9,0xf8,0x00,0xa0,0x52,0xf8,0x24,0x3c,
0x4f,0xea,0x1a,0x6a,0x23,0xf4,0x7f,0x43,0x43,0xea,0x0a,0x23,0x42,0xf8,0x24,0x3c,
0xd9,0xf8,0x00,0xa0,0x52,0xf8,0x24,0x3c,0xca,0xf3,0x07,0x4a,0x23,0xf0,0xff,0x03,
0x4a,0xea,0x03,0x03,0x42,0xf8,0x24,0x3c,0xd9,0xf8,0x00,0xa0,0x52,0xf8,0x1c,0x3c,
0x0a,0xf4,0x7f,0x4a,0x23,0xf4,0x7f,0x43,0x4a,0xea,0x03,0x03,0x42,0xf8,0x1c,0x3c,
0xd9,0xf8,0x00,0x90,0x52,0xf8,0x1c,0x3c,0x5f,0xfa,0x89,0xf9,0x23,0xf0,0xff,0x03,
0x49,0xea,0x03,0x03,0xdf,0xf8,0x60,0x92,0x42,0xf8,0x1c,0x3c,0x32,0x68,0xd9,0xf8,
0x00,0x30,0x02,0xf4,0x70,0x42,0x23,0xf4,0x70,0x43,0x13,0x43,0xc9,0xf8,0x00,0x30,
0xd8,0xf8,0x00,0x20,0xdf,0xf8,0x44,0x82,0xd8,0xf8,0x00,0x30,0x02,0xf4,0x70,0x42,
0x23,0xf4,0x70,0x43,0x13,0x43,0xc8,0xf8,0x00,0x30,0x32,0x68,0x54,0xf8,0x24,0x3c,
0x12,0x0e,0x23,0xf4,0x7f,0x43,0x43,0xea,0x02,0x23,0x44,0xf8,0x24,0x3c,0x71,0x4b,
0x1b,0x68,0x62,0x6a,0xc3,0xf3,0x0b,0x06,0x22,0xf4,0x7f,0x63,0x23,0xf0,0x0f,0x03,
0x33,0x43,0x6d,0x4e,0x63,0x62,0x32,0x68,0x63,0x6a,0x02,0xf4,0x70,0x22,0x23,0xf4,
0x70,0x23,0x13,0x43,0x63,0x62,0x69,0x4c,0x22,0x68,0xd8,0xf8,0x58,0x30,0xc2,0xf3,
0x83,0x42,0x23,0xf4,0x70,0x23,0x43,0xea,0x02,0x43,0xc8,0xf8,0x58,0x30,0xdc,0xf8,
0x00,0x30,0xd8,0xf8,0x58,0x20,0xc3,0xf3,0x0b,0x4c,0x22,0xf4,0x7f,0x63,0x23,0xf0,
0x0f,0x03,0x4c,0xea,0x03,0x03,0xc8,0xf8,0x58,0x30,0x23,0x68,0xd8,0xf8,0x5c,0x20,
0x4f,0xea,0xd3,0x5c,0x22,0xf0,0xff,0x73,0x23,0xf4,0x80,0x33,0x43,0xea,0x0c,0x43,
0xc8,0xf8,0x5c,0x30,0x33,0x68,0x56,0x4a,0xdf,0xf8,0xa4,0xc1,0x0f,0x33,0x03,0xf0,
0x0f,0x03,0x13,0x60,0x26,0x68,0x53,0x68,0xc6,0xf3,0x80,0x56,0x23,0xf4,0x00,0x03,
0x43,0xea,0xc6,0x53,0x53,0x60,0x53,0x68,0x4e,0x4e,0x43,0xf4,0x80,0x43,0x53,0x60,
0x02,0x23,0xce,0xf8,0x00,0x30,0xae,0xf5,0x09,0x7e,0x4a,0xf6,0xaa,0x23,0xce,0xf8,
0x00,0x30,0xdc,0xf8,0x00,0x30,0x32,0x68,0x03,0xf0,0x0f,0x08,0x22,0xf4,0x7f,0x02,
0x42,0xea,0x08,0x42,0xc3,0xf3,0x03,0x23,0x42,0xea,0x03,0x53,0xdf,0xf8,0x54,0x81,
0x33,0x60,0xd8,0xf8,0x00,0x30,0x32,0x68,0xc3,0xf3,0x03,0x49,0x22,0xf0,0xff,0x02,
0x49,0xea,0x02,0x02,0xc3,0xf3,0x03,0x63,0x42,0xea,0x03,0x13,0x33,0x60,0xdc,0xf8,
0x00,0x60,0xdf,0xf8,0x34,0xc1,0xdc,0xf8,0x00,0x30,0x06,0xf4,0x70,0x22,0x23,0xf4,
0x7f,0x03,0x1a,0x43,0xc6,0xf3,0x03,0x63,0x42,0xea,0x03,0x53,0x32,0x4e,0xcc,0xf8,
0x00,0x30,0x32,0x68,0x5c,0xf8,0x08,0x3c,0xc2,0xf3,0x03,0x22,0x23,0xf0,0x0f,0x03,
0x13,0x43,0x4c,0xf8,0x08,0x3c,0xd8,0xf8,0x00,0x20,0xdc,0xf8,0x08,0x30,0x02,0xf4,
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0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x0e,0x33,0xcd,0xab,0x34,0x12,0x6d,0xe6,0xec,0xde,0x05,0x00,0x0b,0x00,0x00,0x00,
0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0e,0x33,0xcd,0xab,0x34,0x12,0x6d,0xe6,
0xec,0xde,0x05,0x00,0x0b,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
@ -306,9 +307,8 @@
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x0f,0x00,0x20,0x61,0x00,0x00,0x20,
0x35,0x00,0x00,0x20,0x00,0x00,0x00,0x00,0x6d,0x0c,0x00,0x20,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x18,0x0f,0x00,0x20,0xc1,0x00,0x00,0x20,0x91,0x00,0x00,0x20,0x00,0x00,0x00,0x00,
0x95,0x0d,0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,

View File

@ -42,7 +42,7 @@ typedef uint32_t (*flash_sector_erase_pntr_t) (uint32_t);
*
******************************************************************************/
static void issue_fsm_command(flash_state_command_t command);
static void enable_sectors_for_write(uint32_t);
static void enable_sectors_for_write(void);
static uint32_t scale_cycle_values(uint32_t specified_timing,
uint32_t scale_value);
static void set_write_mode(void);
@ -80,51 +80,42 @@ uint32_t flash_bank_erase(bool force_precondition)
uint32_t error_return;
uint32_t sector_address;
uint32_t reg_val;
uint32_t bank_no;
uint32_t top_bank_start_addr = (HWREG(FLASH_BASE + FLASH_O_FCFG_B1_START) &
FLASH_FCFG_B1_START_B1_START_ADDR_M)
>> FLASH_FCFG_B1_START_B1_START_ADDR_S;
for (bank_no = 0; bank_no < flash_bank_count(); bank_no++) {
/* Enable all sectors for erase. */
enable_sectors_for_write(bank_no);
/* Enable all sectors for erase. */
enable_sectors_for_write();
/* Clear the Status register. */
issue_fsm_command(FAPI_CLEAR_STATUS);
/* Clear the Status register. */
issue_fsm_command(FAPI_CLEAR_STATUS);
/* Enable erase of all sectors and enable precondition if required. */
reg_val = HWREG(FLASH_BASE + FLASH_O_FSM_ST_MACHINE);
/* Enable erase of all sectors and enable precondition if required. */
reg_val = HWREG(FLASH_BASE + FLASH_O_FSM_ST_MACHINE);
HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_ENABLE;
HWREG(FLASH_BASE + FLASH_O_FSM_SECTOR1) = 0x00000000;
HWREG(FLASH_BASE + FLASH_O_FSM_SECTOR2) = 0x00000000;
if (force_precondition)
HWREG(FLASH_BASE + FLASH_O_FSM_ST_MACHINE) |=
FLASH_FSM_ST_MACHINE_DO_PRECOND;
HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_DISABLE;
/* Issue the bank erase command to the FSM. */
issue_fsm_command(FAPI_ERASE_BANK);
/* Wait for erase to finish. */
while (flash_check_fsm_for_ready() == FAPI_STATUS_FSM_BUSY)
;
/* Update status. */
error_return = flash_check_fsm_for_error();
/* Disable sectors for erase. */
flash_disable_sectors_for_write();
/* Set configured precondition mode since it may have been forced on. */
if (!(reg_val & FLASH_FSM_ST_MACHINE_DO_PRECOND)) {
HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_ENABLE;
HWREG(FLASH_BASE + FLASH_O_FSM_SECTOR1) = 0x00000000;
HWREG(FLASH_BASE + FLASH_O_FSM_SECTOR2) = 0x00000000;
if (force_precondition)
HWREG(FLASH_BASE + FLASH_O_FSM_ST_MACHINE) |=
FLASH_FSM_ST_MACHINE_DO_PRECOND;
HWREG(FLASH_BASE + FLASH_O_FSM_ST_MACHINE) &=
~FLASH_FSM_ST_MACHINE_DO_PRECOND;
HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_DISABLE;
// Write address to FADDR register.
HWREG(FLASH_BASE + FLASH_O_FADDR) = ADDR_OFFSET + (bank_no * top_bank_start_addr);
/* Issue the bank erase command to the FSM. */
issue_fsm_command(FAPI_ERASE_BANK);
/* Wait for erase to finish. */
while (flash_check_fsm_for_ready() == FAPI_STATUS_FSM_BUSY)
;
/* Update status. */
error_return = flash_check_fsm_for_error();
/* Set configured precondition mode since it may have been forced on. */
if (!(reg_val & FLASH_FSM_ST_MACHINE_DO_PRECOND)) {
HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_ENABLE;
HWREG(FLASH_BASE + FLASH_O_FSM_ST_MACHINE) &=
~FLASH_FSM_ST_MACHINE_DO_PRECOND;
HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_DISABLE;
}
if (error_return != FAPI_STATUS_SUCCESS)
break;
}
/* Program security data to default values in the customer configuration */
@ -137,9 +128,6 @@ uint32_t flash_bank_erase(bool force_precondition)
CCFG_SIZE_SECURITY);
}
/* Disable sectors for erase. */
flash_disable_sectors_for_write();
/* Return status of operation. */
return error_return;
}
@ -173,34 +161,23 @@ uint32_t flash_program(uint8_t *data_buffer, uint32_t address, uint32_t count)
******************************************************************************/
void flash_disable_sectors_for_write(void)
{
uint32_t bank_no;
/* Configure flash back to read mode */
set_read_mode();
for (bank_no = 0; bank_no < flash_bank_count(); bank_no++) {
/* Disable Level 1 Protection. */
HWREG(FLASH_BASE + FLASH_O_FBPROT) = FLASH_FBPROT_PROTL1DIS;
/* Select flash bank. */
HWREG(FLASH_BASE + FLASH_O_FMAC) = bank_no;
/* Disable all sectors for erase and programming. */
HWREG(FLASH_BASE + FLASH_O_FBSE) = 0x0000;
/* Disable Level 1 Protection. */
HWREG(FLASH_BASE + FLASH_O_FBPROT) = FLASH_FBPROT_PROTL1DIS;
/* Enable Level 1 Protection. */
HWREG(FLASH_BASE + FLASH_O_FBPROT) = 0;
/* Disable all sectors for erase and programming. */
HWREG(FLASH_BASE + FLASH_O_FBSE) = 0x0000;
/* Enable Level 1 Protection. */
HWREG(FLASH_BASE + FLASH_O_FBPROT) = 0;
/* Protect sectors from sector erase. */
HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_ENABLE;
HWREG(FLASH_BASE + FLASH_O_FSM_SECTOR1) = 0xFFFFFFFF;
HWREG(FLASH_BASE + FLASH_O_FSM_SECTOR2) = 0xFFFFFFFF;
HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_DISABLE;
}
// Select bank 0
HWREG(FLASH_BASE + FLASH_O_FMAC) = 0x0;
/* Protect sectors from sector erase. */
HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_ENABLE;
HWREG(FLASH_BASE + FLASH_O_FSM_SECTOR1) = 0xFFFFFFFF;
HWREG(FLASH_BASE + FLASH_O_FSM_SECTOR2) = 0xFFFFFFFF;
HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_DISABLE;
}
/******************************************************************************
@ -237,7 +214,7 @@ static void issue_fsm_command(flash_state_command_t command)
* the FLASH_O_FSM_SECTOR1 register.
*
******************************************************************************/
static void enable_sectors_for_write(uint32_t bank_no)
static void enable_sectors_for_write(void)
{
/* Trim flash module for program/erase operation. */
trim_for_write();
@ -246,7 +223,7 @@ static void enable_sectors_for_write(uint32_t bank_no)
set_write_mode();
/* Select flash bank. */
HWREG(FLASH_BASE + FLASH_O_FMAC) = bank_no;
HWREG(FLASH_BASE + FLASH_O_FMAC) = 0x00;
/* Disable Level 1 Protection. */
HWREG(FLASH_BASE + FLASH_O_FBPROT) = FLASH_FBPROT_PROTL1DIS;

View File

@ -246,46 +246,6 @@ static inline uint32_t flash_check_fsm_for_ready(void)
return FAPI_STATUS_FSM_READY;
}
/******************************************************************************
*
* Get the number of banks
*
* This function returns the number of bank of the flash.
*
* Returns the number of banks
*
******************************************************************************/
static inline uint32_t flash_bank_count(void)
{
uint32_t bank_count;
bank_count = (HWREG(FLASH_BASE + FLASH_O_FCFG_BANK) &
FLASH_FCFG_BANK_MAIN_NUM_BANK_M) >>
FLASH_FCFG_BANK_MAIN_NUM_BANK_S;
return bank_count;
}
/******************************************************************************
*
* Get the size of the bank.
*
* This function returns the size of the main bank in number of bytes.
*
* Returns the flash size in number of bytes.
*
******************************************************************************/
static inline uint8_t flash_bank_width(void)
{
uint8_t bank_width;
bank_width = (uint8_t)(((HWREG(FLASH_BASE + FLASH_O_FCFG_BANK) &
FLASH_FCFG_BANK_MAIN_BANK_WIDTH_M) >>
FLASH_FCFG_BANK_MAIN_BANK_WIDTH_S) >> 3);
return bank_width;
}
/******************************************************************************
*
* Erase a flash sector.

View File

@ -116,10 +116,6 @@
/* FMC Sequential Pump Information */
#define FLASH_O_FSEQPMP 0x000020A8
#define FLASH_O_FADDR 0x00002110
#define FLASH_O_FWPWRITE0 0x00002120
/* FMC FSM Command */
#define FLASH_O_FSM_CMD 0x0000220C
@ -183,14 +179,9 @@
/* FMC FSM Sector Erased 2 */
#define FLASH_O_FSM_SECTOR2 0x000022C4
#define FLASH_O_FCFG_BANK 0x00002400
/* FMC Flash Bank 0 Starting Address */
#define FLASH_O_FCFG_B0_START 0x00002410
/* FMC Flash Bank 1 Starting Address */
#define FLASH_O_FCFG_B1_START 0x00002414
/* FMC Flash Bank 0 Sector Size 0 */
#define FLASH_O_FCFG_B0_SSIZE0 0x00002430
@ -1362,16 +1353,4 @@
* 1: DCDC and GLDO are bypassed and an external regulator supplies VDDR */
#define AON_PMCTL_PWRCTL_EXT_REG_MODE 0x00000002
/* Field: [3:0] MAIN_NUM_BANK */
#define FLASH_FCFG_BANK_MAIN_NUM_BANK_M 0x0000000F
#define FLASH_FCFG_BANK_MAIN_NUM_BANK_S 0
/* Field: [23:0] B1_START_ADDR */
#define FLASH_FCFG_B1_START_B1_START_ADDR_M 0x00FFFFFF
#define FLASH_FCFG_B1_START_B1_START_ADDR_S 0
/* Field: [15:4] MAIN_BANK_WIDTH */
#define FLASH_FCFG_BANK_MAIN_BANK_WIDTH_M 0x0000FFF0
#define FLASH_FCFG_BANK_MAIN_BANK_WIDTH_S 4
#endif /* #ifndef OPENOCD_LOADERS_FLASH_CC26XX_HW_REGS_H */

View File

@ -1,35 +0,0 @@
# SPDX-License-Identifier: GPL-2.0-or-later
TOOLCHAIN:=mipsel-linux-gnu-
CC:=$(TOOLCHAIN)gcc
OBJCOPY:=$(TOOLCHAIN)objcopy
CFLAGS:=-O2 -Wall -Wextra -fpic -Wno-int-to-pointer-cast
SRC=dw-spi.c
OBJ=$(patsubst %.c, %.o,$(SRC))
# sparx-iv
ifeq ($(TOOLCHAIN),mipsel-linux-gnu-)
CFLAGS+= -march=24kec
endif
all: \
$(TOOLCHAIN)transaction.inc \
$(TOOLCHAIN)erase.inc \
$(TOOLCHAIN)check_fill.inc \
$(TOOLCHAIN)program.inc \
$(TOOLCHAIN)read.inc
$(TOOLCHAIN)%.bin: $(OBJ)
$(OBJCOPY) --dump-section .$*=$@ $<
%.inc: %.bin
xxd -i > $@ < $<
.PHONY: clean
clean:
rm -rf .ccls-cache
find . \( \
-iname "*.o" \
-o -iname "*.bin" \
-o -iname "*.inc" \
\) -delete

View File

@ -1,246 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/**
* @file
* Helper functions for DesignWare SPI Core driver.
* These helpers are loaded into CPU and execute Flash manipulation algorithms
* at full CPU speed. Due to inability to control nCS pin, this is the only way
* to communicate with Flash chips connected via DW SPI serial interface.
*
* In order to avoid using stack, all functions used in helpers are inlined.
* Software breakpoints are used to terminate helpers.
*
* Pushing byte to TX FIFO does not make byte immediately available in RX FIFO
* and nCS is only asserted when TX FIFO is not empty. General approach is to
* fill TX FIFO with as many bytes as possible, at the same time reading
* available bytes from RX FIFO.
*
* This file contains helper functions.
*/
#include "dw-spi.h"
#include "../../../../src/flash/nor/dw-spi-helper.h"
/**
* @brief Generic flash transaction.
*
* @param[in] arg: Function arguments.
*/
__attribute__((section(".transaction"))) void
transaction(struct dw_spi_transaction *arg)
{
register uint8_t *buffer_tx = (uint8_t *)arg->buffer;
register uint8_t *buffer_rx = buffer_tx;
register uint32_t size = arg->size;
register volatile uint8_t *status = (uint8_t *)arg->status_reg;
register volatile uint8_t *data = (uint8_t *)arg->data_reg;
wait_tx_finish(status);
flush_rx(status, data);
for (; size > 0; size--) {
send_u8(status, data, *buffer_tx++);
if (arg->read_flag && rx_available(status))
*buffer_rx++ = rcv_byte(data);
}
// Pushed all data to TX FIFO. Read bytes left in RX FIFO.
if (arg->read_flag) {
while (buffer_rx < buffer_tx) {
wait_rx_available(status);
*buffer_rx++ = rcv_byte(data);
}
}
RETURN;
}
/**
* @brief Check flash sectors are filled with pattern. Primary use for
* checking sector erase state.
*
* @param[in] arg: Function arguments.
*/
__attribute__((section(".check_fill"))) void
check_fill(struct dw_spi_check_fill *arg)
{
register uint32_t tx_size;
register uint32_t rx_size;
register uint32_t dummy_count;
register uint8_t filled;
register uint8_t *fill_status_array = (uint8_t *)arg->fill_status_array;
register volatile uint8_t *status = (uint8_t *)arg->status_reg;
register volatile uint8_t *data = (uint8_t *)arg->data_reg;
for (; arg->sector_count > 0; arg->sector_count--,
arg->address += arg->sector_size,
fill_status_array++) {
wait_tx_finish(status);
flush_rx(status, data);
/*
* Command byte and address bytes make up for dummy_count number of
* bytes, that must be skipped in RX FIFO before actual data arrives.
*/
send_u8(status, data, arg->read_cmd);
if (arg->four_byte_mode) {
dummy_count = 1 + 4; // Command byte + 4 address bytes
send_u32(status, data, arg->address);
} else {
dummy_count = 1 + 3; // Command byte + 3 address bytes
send_u24(status, data, arg->address);
}
for (tx_size = arg->sector_size, rx_size = arg->sector_size, filled = 1;
tx_size > 0; tx_size--) {
send_u8(status, data, 0); // Dummy write to push out read data.
if (rx_available(status)) {
if (dummy_count > 0) {
// Read data not arrived yet.
rcv_byte(data);
dummy_count--;
} else {
if (rcv_byte(data) != arg->pattern) {
filled = 0;
break;
}
rx_size--;
}
}
}
if (filled) {
for (; rx_size > 0; rx_size--) {
wait_rx_available(status);
if (rcv_byte(data) != arg->pattern) {
filled = 0;
break;
}
}
}
*fill_status_array = filled;
}
RETURN;
}
/**
* @brief Erase flash sectors.
*
* @param[in] arg: Function arguments.
*/
__attribute__((section(".erase"))) void
erase(struct dw_spi_erase *arg)
{
register uint32_t address = arg->address;
register uint32_t count = arg->sector_count;
register volatile uint8_t *status = (uint8_t *)arg->status_reg;
register volatile uint8_t *data = (uint8_t *)arg->data_reg;
for (; count > 0; count--, address += arg->sector_size) {
write_enable(status, data, arg->write_enable_cmd);
wait_write_enable(status, data, arg->read_status_cmd,
arg->write_enable_mask);
erase_sector(status, data, arg->erase_sector_cmd, address,
arg->four_byte_mode);
wait_busy(status, data, arg->read_status_cmd, arg->busy_mask);
}
RETURN;
}
/**
* @brief Flash program.
*
* @param[in] arg: Function arguments.
*/
__attribute__((section(".program"))) void
program(struct dw_spi_program *arg)
{
register uint8_t *buffer = (uint8_t *)arg->buffer;
register uint32_t buffer_size = arg->buffer_size;
register volatile uint8_t *status = (uint8_t *)arg->status_reg;
register volatile uint8_t *data = (uint8_t *)arg->data_reg;
register uint32_t page_size;
while (buffer_size > 0) {
write_enable(status, data, arg->write_enable_cmd);
wait_write_enable(status, data, arg->read_status_cmd,
arg->write_enable_mask);
wait_tx_finish(status);
send_u8(status, data, arg->program_cmd);
if (arg->four_byte_mode)
send_u32(status, data, arg->address);
else
send_u24(status, data, arg->address);
for (page_size = MIN(arg->page_size, buffer_size); page_size > 0;
page_size--, buffer_size--) {
send_u8(status, data, *buffer++);
}
arg->address += arg->page_size;
wait_busy(status, data, arg->read_status_cmd, arg->busy_mask);
}
RETURN;
}
/**
* @brief Read data from flash.
*
* @param[in] arg: Function arguments.
*/
__attribute__((section(".read"))) void
read(struct dw_spi_read *arg)
{
register uint32_t tx_size = arg->buffer_size;
register uint32_t rx_size = arg->buffer_size;
register uint32_t dummy_count;
register uint8_t *buffer = (uint8_t *)arg->buffer;
register volatile uint8_t *status = (uint8_t *)arg->status_reg;
register volatile uint8_t *data = (uint8_t *)arg->data_reg;
wait_tx_finish(status);
flush_rx(status, data);
/*
* Command byte and address bytes make up for dummy_count number of
* bytes, that must be skipped in RX FIFO before actual data arrives.
*/
send_u8(status, data, arg->read_cmd);
if (arg->four_byte_mode) {
dummy_count = 1 + 4; // Command byte + 4 address bytes
send_u32(status, data, arg->address);
} else {
dummy_count = 1 + 3; // Command byte + 3 address bytes
send_u24(status, data, arg->address);
}
for (; tx_size > 0; tx_size--) {
send_u8(status, data, 0); // Dummy write to push out read data.
if (rx_available(status)) {
if (dummy_count > 0) {
rcv_byte(data);
dummy_count--;
} else {
*buffer++ = rcv_byte(data);
rx_size--;
}
}
}
while (rx_size > 0) {
wait_rx_available(status);
if (dummy_count > 0) {
// Read data not arrived yet.
rcv_byte(data);
dummy_count--;
} else {
*buffer++ = rcv_byte(data);
rx_size--;
}
}
RETURN;
}

View File

@ -1,313 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/**
* @file
* Helper functions for DesignWare SPI Core driver.
* These helpers are loaded into CPU and execute Flash manipulation algorithms
* at full CPU speed. Due to inability to control nCS pin, this is the only way
* to communicate with Flash chips connected via DW SPI serial interface.
*
* In order to avoid using stack, all functions used in helpers are inlined.
* Software breakpoints are used to terminate helpers.
*
* This file contains functions, common to helpers.
*/
#ifndef _DW_SPI_H_
#define _DW_SPI_H_
#include <stdint.h>
#include <sys/param.h>
#include "../../../../src/helper/types.h"
/**
* @brief SI busy status bit.
*
* Set when serial transfer is in progress, cleared when master is idle or
* disabled.
*/
#define DW_SPI_STATUS_BUSY 0x01
/**
* @brief SI TX FIFO not full status bit.
*
* Set when TX FIFO has room for one or more data-word.
*/
#define DW_SPI_STATUS_TFNF 0x02
/**
* @brief SI TX FIFO empty status bit.
*/
#define DW_SPI_STATUS_TFE 0x04
/**
* @brief SI RX FIFO not empty status bit.
*/
#define DW_SPI_STATUS_RFNE 0x08
/**
* @brief Return from helper function.
*/
#define RETURN \
do { \
asm("sdbbp\n\t"); \
return; \
} while (0)
/**
* @brief Append byte to TX FIFO.
*
* For each transferred byte, DW SPI controller receives a byte into RX FIFO.
* Slave data are read by pushing dummy bytes to TX FIFO.
*
* @param[in] dr: Pointer to DR register.
* @param[in] byte: Data to push.
*/
__attribute__((always_inline)) static inline void
_send_byte(volatile uint8_t *dr, uint8_t byte)
{
*dr = byte;
}
/**
* @brief Get byte from RX FIFO.
*
* Reading RX byte removes it from RX FIFO.
*
* @param[in] dr: Pointer to DR register.
* @return RX FIFO byte.
*/
__attribute__((always_inline)) static inline uint8_t
rcv_byte(volatile uint8_t *dr)
{
return *dr;
}
/**
* @brief Check transmission is currently in progress.
*
* @param[in] sr: Pointer to SR register.
* @retval 1: Transmission is in progress.
* @retval 0: Controller is idle or off.
*/
__attribute__((always_inline)) static inline int
tx_in_progress(volatile uint8_t *sr)
{
return (*sr ^ DW_SPI_STATUS_TFE) & (DW_SPI_STATUS_BUSY | DW_SPI_STATUS_TFE);
}
/**
* @brief Wait for controller to finish previous transaction.
*
* @param[in] sr: Pointer to SR register.
*/
__attribute__((always_inline)) static inline void
wait_tx_finish(volatile uint8_t *sr)
{
while (tx_in_progress(sr))
;
}
/**
* @brief Wait for room in TX FIFO.
*
* @param[in] sr: Pointer to SR register.
*/
__attribute__((always_inline)) static inline void
wait_tx_available(volatile uint8_t *sr)
{
while (!(*sr & DW_SPI_STATUS_TFNF))
;
}
/**
* @brief Check for data available in RX FIFO.
*
* @param[in] sr: Pointer to SR register.
* @retval 1: Data available.
* @retval 0: No data available.
*/
__attribute__((always_inline)) static inline int
rx_available(volatile uint8_t *sr)
{
return *sr & DW_SPI_STATUS_RFNE;
}
/**
* @brief Wait for data in RX FIFO.
*
* @param[in] sr: Pointer to SR register.
*/
__attribute__((always_inline)) static inline void
wait_rx_available(volatile uint8_t *sr)
{
while (!rx_available(sr))
;
}
/**
* @brief Flush RX FIFO.
*
* @param[in] sr: Pointer to SR register.
* @param[in] dr: Pointer to DR register.
*/
__attribute__((always_inline)) static inline void
flush_rx(volatile uint8_t *sr, volatile uint8_t *dr)
{
while (*sr & DW_SPI_STATUS_RFNE)
*dr;
}
/**
* @brief Append variable number of bytes to TX FIFO.
*
* @param[in] sr: Pointer to SR register.
* @param[in] dr: Pointer to DR register.
* @param[in] word: Data to append.
* @param[in] bytes: Number of bytes to append.
*/
__attribute__((always_inline)) static inline void
_send_bytes(volatile uint8_t *sr, volatile uint8_t *dr, uint32_t word,
int bytes)
{
for (register int i = bytes - 1; i >= 0; i--) {
wait_tx_available(sr);
_send_byte(dr, (word >> (i * 8)) & 0xff);
}
}
/**
* @brief Append 8 bit value to TX FIFO.
*
* @param[in] sr: Pointer to SR register.
* @param[in] dr: Pointer to DR register.
* @param[in] word: Data to push.
*/
__attribute__((always_inline)) static inline void
send_u8(volatile uint8_t *sr, volatile uint8_t *dr, uint8_t byte)
{
wait_tx_available(sr);
_send_byte(dr, byte);
}
/**
* @brief Append 24 bit value to TX FIFO.
*
* Used to send Flash addresses in 24 bit mode.
*
* @param[in] sr: Pointer to SR register.
* @param[in] dr: Pointer to DR register.
* @param[in] word: Data to push.
*/
__attribute__((always_inline)) static inline void
send_u24(volatile uint8_t *sr, volatile uint8_t *dr, uint32_t word)
{
_send_bytes(sr, dr, word, 3);
}
/**
* @brief Append 32 bit value to TX FIFO.
*
* @param[in] sr: Pointer to SR register.
* @param[in] dr: Pointer to DR register.
* @param[in] word: Data to push.
*/
__attribute__((always_inline)) static inline void
send_u32(volatile uint8_t *sr, volatile uint8_t *dr, uint32_t word)
{
_send_bytes(sr, dr, word, 4);
}
/**
* @brief Read chip status register.
*
* @param[in] sr: Pointer to SR register.
* @param[in] dr: Pointer to DR register.
* @param[in] stat_cmd: Read status command.
* @return Chip status.
*/
__attribute__((always_inline)) static inline uint8_t
read_status(volatile uint8_t *sr, volatile uint8_t *dr, uint8_t stat_cmd)
{
wait_tx_finish(sr);
flush_rx(sr, dr);
/*
* Don't bother with wait_tx_available() as TX FIFO is empty
* and we only send two bytes.
*/
_send_byte(dr, stat_cmd);
_send_byte(dr, 0); // Dummy write to push out read data.
wait_rx_available(sr);
rcv_byte(dr); // Dummy read to skip command byte.
wait_rx_available(sr);
return rcv_byte(dr);
}
/**
* @brief Enable Flash chip write.
*
* @param[in] sr: Pointer to SR register.
* @param[in] dr: Pointer to DR register.
* @param[in] we_cmd: Write enable command.
*/
__attribute__((always_inline)) static inline void
write_enable(volatile uint8_t *sr, volatile uint8_t *dr, uint8_t we_cmd)
{
wait_tx_finish(sr);
_send_byte(dr, we_cmd);
}
/**
* @brief Erase Flash sector.
*
* @param[in] sr: Pointer to SR register.
* @param[in] dr: Pointer to DR register.
* @param[in] erase_cmd: Erase sector cmd.
* @param[in] address: Sector address.
* @param[in] four_byte_mode: Device is in 32 bit mode flag.
*/
__attribute__((always_inline)) static inline void
erase_sector(volatile uint8_t *sr, volatile uint8_t *dr, uint8_t erase_cmd,
uint32_t address, uint8_t four_byte_mode)
{
wait_tx_finish(sr);
_send_byte(dr, erase_cmd);
if (four_byte_mode)
send_u32(sr, dr, address);
else
send_u24(sr, dr, address);
}
/**
* @brief Wait for write enable flag.
*
* @param[in] sr: Pointer to SR register.
* @param[in] dr: Pointer to DR register.
* @param[in] stat_cmd: Read status command.
* @param[in] we_mask: Write enable status mask.
*/
__attribute__((always_inline)) static inline void
wait_write_enable(volatile uint8_t *sr, volatile uint8_t *dr, uint8_t stat_cmd,
uint8_t we_mask)
{
while (!(read_status(sr, dr, stat_cmd) & we_mask))
;
}
/**
* @brief Wait while flash is busy.
*
* @param[in] sr: Pointer to SR register.
* @param[in] dr: Pointer to DR register.
* @param[in] stat_cmd: Read status command.
* @param[in] busy_mask: Flash busy mask.
*/
__attribute__((always_inline)) static inline void
wait_busy(volatile uint8_t *sr, volatile uint8_t *dr, uint8_t stat_cmd,
uint8_t busy_mask)
{
while (read_status(sr, dr, stat_cmd) & busy_mask)
;
}
#endif // _DW_SPI_H_

View File

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View File

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View File

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0xe4, 0xff, 0x60, 0x14, 0x00, 0x00, 0x00, 0x00, 0x8b, 0xff, 0x00, 0x55,
0x25, 0x00, 0xc9, 0x90, 0x3f, 0x00, 0x00, 0x70, 0x08, 0x00, 0xe0, 0x03,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xca, 0x98, 0x10, 0x00, 0x09, 0x24,
0x00, 0x00, 0x43, 0x90, 0x02, 0x00, 0x63, 0x30, 0xfd, 0xff, 0x60, 0x10,
0x06, 0x18, 0x2a, 0x01, 0xff, 0x00, 0x63, 0x30, 0xf8, 0xff, 0x29, 0x25,
0x00, 0x00, 0x83, 0xa0, 0xf8, 0xff, 0x27, 0x15, 0x25, 0x58, 0x00, 0x01,
0x07, 0x00, 0xc3, 0x88, 0x04, 0x00, 0xc3, 0x98, 0x2b, 0x48, 0x03, 0x01,
0x0a, 0x58, 0x69, 0x00, 0xbb, 0xff, 0x60, 0x15, 0x21, 0x50, 0xab, 0x00,
0xc6, 0xff, 0x00, 0x10, 0x03, 0x00, 0xc9, 0x88

View File

@ -1,33 +0,0 @@
0x0f, 0x00, 0x87, 0x88, 0x07, 0x00, 0x88, 0x88, 0x13, 0x00, 0x83, 0x88,
0x1b, 0x00, 0x85, 0x88, 0x0c, 0x00, 0x87, 0x98, 0x04, 0x00, 0x88, 0x98,
0x10, 0x00, 0x83, 0x98, 0x18, 0x00, 0x85, 0x98, 0x00, 0x00, 0x62, 0x90,
0x05, 0x00, 0x42, 0x30, 0x04, 0x00, 0x42, 0x38, 0xfc, 0xff, 0x40, 0x14,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x62, 0x90, 0x08, 0x00, 0x42, 0x30,
0x07, 0x00, 0x40, 0x50, 0x20, 0x00, 0x86, 0x90, 0x00, 0x00, 0xa2, 0x90,
0x00, 0x00, 0x62, 0x90, 0x08, 0x00, 0x42, 0x30, 0xfc, 0xff, 0x40, 0x14,
0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x86, 0x90, 0x00, 0x00, 0x62, 0x90,
0x02, 0x00, 0x42, 0x30, 0xfd, 0xff, 0x40, 0x10, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0xa6, 0xa0, 0x21, 0x00, 0x82, 0x90, 0x35, 0x00, 0x40, 0x10,
0x03, 0x00, 0x82, 0x88, 0x18, 0x00, 0x06, 0x24, 0xf8, 0xff, 0x09, 0x24,
0x00, 0x00, 0x82, 0x98, 0x25, 0x20, 0x40, 0x00, 0x00, 0x00, 0x62, 0x90,
0x02, 0x00, 0x42, 0x30, 0xfd, 0xff, 0x40, 0x10, 0x06, 0x10, 0xc4, 0x00,
0xff, 0x00, 0x42, 0x30, 0xf8, 0xff, 0xc6, 0x24, 0xf9, 0xff, 0xc9, 0x14,
0x00, 0x00, 0xa2, 0xa0, 0x05, 0x00, 0x06, 0x24, 0x23, 0x00, 0xe0, 0x10,
0x25, 0x20, 0xe0, 0x00, 0x00, 0x00, 0x62, 0x90, 0x02, 0x00, 0x42, 0x30,
0xfd, 0xff, 0x40, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0, 0xa0,
0x00, 0x00, 0x62, 0x90, 0x08, 0x00, 0x42, 0x30, 0x06, 0x00, 0x40, 0x50,
0xff, 0xff, 0x84, 0x24, 0x00, 0x00, 0xa2, 0x90, 0x14, 0x00, 0xc0, 0x50,
0x00, 0x00, 0x02, 0xa1, 0xff, 0xff, 0xc6, 0x24, 0xff, 0xff, 0x84, 0x24,
0xf1, 0xff, 0x80, 0x14, 0x00, 0x00, 0x00, 0x00, 0x11, 0x00, 0xe0, 0x10,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x62, 0x90, 0x08, 0x00, 0x42, 0x30,
0xfd, 0xff, 0x40, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa2, 0x90,
0x03, 0x00, 0xc0, 0x50, 0xff, 0xff, 0xe7, 0x24, 0xf8, 0xff, 0x00, 0x10,
0xff, 0xff, 0xc6, 0x24, 0x06, 0x00, 0xe0, 0x10, 0x00, 0x00, 0x02, 0xa1,
0xf4, 0xff, 0x00, 0x10, 0x01, 0x00, 0x08, 0x25, 0xff, 0xff, 0xe7, 0x24,
0xec, 0xff, 0x00, 0x10, 0x01, 0x00, 0x08, 0x25, 0x3f, 0x00, 0x00, 0x70,
0x08, 0x00, 0xe0, 0x03, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x06, 0x24,
0xf8, 0xff, 0x09, 0x24, 0x00, 0x00, 0x82, 0x98, 0x25, 0x20, 0x40, 0x00,
0x00, 0x00, 0x62, 0x90, 0x02, 0x00, 0x42, 0x30, 0xfd, 0xff, 0x40, 0x10,
0x06, 0x10, 0xc4, 0x00, 0xff, 0x00, 0x42, 0x30, 0xf8, 0xff, 0xc6, 0x24,
0xf9, 0xff, 0xc9, 0x14, 0x00, 0x00, 0xa2, 0xa0, 0xcc, 0xff, 0x00, 0x10,
0x04, 0x00, 0x06, 0x24

View File

@ -1,21 +0,0 @@
0x03, 0x00, 0x85, 0x88, 0x0b, 0x00, 0x88, 0x88, 0x0f, 0x00, 0x83, 0x88,
0x17, 0x00, 0x86, 0x88, 0x00, 0x00, 0x85, 0x98, 0x08, 0x00, 0x88, 0x98,
0x0c, 0x00, 0x83, 0x98, 0x14, 0x00, 0x86, 0x98, 0x00, 0x00, 0x62, 0x90,
0x05, 0x00, 0x42, 0x30, 0x04, 0x00, 0x42, 0x38, 0xfc, 0xff, 0x40, 0x14,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x62, 0x90, 0x08, 0x00, 0x42, 0x30,
0x06, 0x00, 0x40, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc2, 0x90,
0x00, 0x00, 0x62, 0x90, 0x08, 0x00, 0x42, 0x30, 0xfc, 0xff, 0x40, 0x14,
0x00, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x11, 0x00, 0x00, 0x00, 0x00,
0x25, 0x38, 0xa0, 0x00, 0x21, 0x40, 0x05, 0x01, 0x00, 0x00, 0xa9, 0x90,
0x01, 0x00, 0xa5, 0x24, 0x00, 0x00, 0x62, 0x90, 0x02, 0x00, 0x42, 0x30,
0xfd, 0xff, 0x40, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc9, 0xa0,
0x1c, 0x00, 0x82, 0x90, 0x08, 0x00, 0x40, 0x10, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x62, 0x90, 0x08, 0x00, 0x42, 0x30, 0x04, 0x00, 0x40, 0x10,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc2, 0x90, 0x01, 0x00, 0xe7, 0x24,
0xff, 0xff, 0xe2, 0xa0, 0xef, 0xff, 0xa8, 0x54, 0x00, 0x00, 0xa9, 0x90,
0x1c, 0x00, 0x82, 0x90, 0x0c, 0x00, 0x40, 0x10, 0x00, 0x00, 0x00, 0x00,
0x2b, 0x10, 0xe8, 0x00, 0x09, 0x00, 0x40, 0x10, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x62, 0x90, 0x08, 0x00, 0x42, 0x30, 0xfd, 0xff, 0x40, 0x10,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc2, 0x90, 0x01, 0x00, 0xe7, 0x24,
0xf9, 0xff, 0x07, 0x15, 0xff, 0xff, 0xe2, 0xa0, 0x3f, 0x00, 0x00, 0x70,
0x08, 0x00, 0xe0, 0x03, 0x00, 0x00, 0x00, 0x00

View File

@ -103,7 +103,7 @@ static void fespi_disable_hw_mode(volatile uint32_t *ctrl_base);
static void fespi_enable_hw_mode(volatile uint32_t *ctrl_base);
static int fespi_wip(volatile uint32_t *ctrl_base);
static int fespi_write_buffer(volatile uint32_t *ctrl_base,
const uint8_t *buffer, unsigned int offset, unsigned int len,
const uint8_t *buffer, unsigned offset, unsigned len,
uint32_t flash_info);
/* Can set bits 3:0 in result. */
@ -113,7 +113,7 @@ static int fespi_write_buffer(volatile uint32_t *ctrl_base,
* after pprog_cmd
*/
int flash_fespi(volatile uint32_t *ctrl_base, uint32_t page_size,
const uint8_t *buffer, unsigned int offset, uint32_t count,
const uint8_t *buffer, unsigned offset, uint32_t count,
uint32_t flash_info)
{
int result;
@ -163,12 +163,12 @@ err:
return result;
}
static uint32_t fespi_read_reg(volatile uint32_t *ctrl_base, unsigned int address)
static uint32_t fespi_read_reg(volatile uint32_t *ctrl_base, unsigned address)
{
return ctrl_base[address / 4];
}
static void fespi_write_reg(volatile uint32_t *ctrl_base, unsigned int address, uint32_t value)
static void fespi_write_reg(volatile uint32_t *ctrl_base, unsigned address, uint32_t value)
{
ctrl_base[address / 4] = value;
}
@ -188,7 +188,7 @@ static void fespi_enable_hw_mode(volatile uint32_t *ctrl_base)
/* Can set bits 7:4 in result. */
static int fespi_txwm_wait(volatile uint32_t *ctrl_base)
{
unsigned int timeout = TIMEOUT;
unsigned timeout = TIMEOUT;
while (timeout--) {
uint32_t ip = fespi_read_reg(ctrl_base, FESPI_REG_IP);
@ -209,7 +209,7 @@ static void fespi_set_dir(volatile uint32_t *ctrl_base, bool dir)
/* Can set bits 11:8 in result. */
static int fespi_tx(volatile uint32_t *ctrl_base, uint8_t in)
{
unsigned int timeout = TIMEOUT;
unsigned timeout = TIMEOUT;
while (timeout--) {
uint32_t txfifo = fespi_read_reg(ctrl_base, FESPI_REG_TXFIFO);
@ -224,7 +224,7 @@ static int fespi_tx(volatile uint32_t *ctrl_base, uint8_t in)
/* Can set bits 15:12 in result. */
static int fespi_rx(volatile uint32_t *ctrl_base, uint8_t *out)
{
unsigned int timeout = TIMEOUT;
unsigned timeout = TIMEOUT;
while (timeout--) {
uint32_t value = fespi_read_reg(ctrl_base, FESPI_REG_RXFIFO);
@ -252,7 +252,7 @@ static int fespi_wip(volatile uint32_t *ctrl_base)
if (result != ERROR_OK)
return result | ERROR_STACK(0x20000);
unsigned int timeout = TIMEOUT;
unsigned timeout = TIMEOUT;
while (timeout--) {
result = fespi_tx(ctrl_base, 0);
if (result != ERROR_OK)
@ -273,7 +273,7 @@ static int fespi_wip(volatile uint32_t *ctrl_base)
/* Can set bits 23:20 in result. */
static int fespi_write_buffer(volatile uint32_t *ctrl_base,
const uint8_t *buffer, unsigned int offset, unsigned int len,
const uint8_t *buffer, unsigned offset, unsigned len,
uint32_t flash_info)
{
int result = fespi_tx(ctrl_base, SPIFLASH_WRITE_ENABLE);
@ -304,7 +304,7 @@ static int fespi_write_buffer(volatile uint32_t *ctrl_base,
if (result != ERROR_OK)
return result | ERROR_STACK(0x600000);
for (unsigned int i = 0; i < len; i++) {
for (unsigned i = 0; i < len; i++) {
result = fespi_tx(ctrl_base, buffer[i]);
if (result != ERROR_OK)
return result | ERROR_STACK(0x700000);

View File

@ -1,70 +1,60 @@
/* Autogenerated with ../../../../src/helper/bin2char.sh */
0x08,0xb5,0xdf,0xf8,0x08,0xd0,0x00,0xf0,0x95,0xf9,0x00,0x00,0xec,0x15,0x0c,0x20,
0x03,0x4b,0x18,0x70,0x08,0x33,0x19,0x70,0x1a,0x78,0xd2,0x09,0xfc,0xd1,0x70,0x47,
0x16,0x00,0x02,0x40,0x13,0x4b,0x14,0x49,0x1a,0x68,0xea,0xb1,0x1a,0x68,0x01,0x2a,
0x1e,0xd0,0x1b,0x68,0x02,0x2b,0x1b,0xd1,0x10,0x4b,0x1a,0x78,0x50,0xb1,0x02,0xf0,
0xf7,0x02,0x1a,0x70,0x01,0x22,0x08,0x78,0x01,0x23,0x93,0x40,0x03,0x43,0xdb,0xb2,
0x0b,0x70,0x70,0x47,0x42,0xf0,0x08,0x02,0x1a,0x70,0x01,0x22,0x08,0x78,0x01,0x23,
0x93,0x40,0x20,0xea,0x03,0x03,0xf3,0xe7,0x01,0x22,0x00,0x28,0xf6,0xd0,0xea,0xe7,
0x00,0x22,0xfa,0xe7,0x00,0x00,0x0c,0x20,0x1f,0x00,0x02,0x40,0x43,0x00,0x02,0x40,
0x73,0xb5,0x04,0x46,0x00,0x20,0x15,0x46,0x0e,0x46,0xff,0xf7,0xcb,0xff,0x0f,0x4b,
0x01,0x94,0xc4,0xf3,0x07,0x44,0x1c,0x70,0x9d,0xf8,0x05,0x20,0x5a,0x70,0x9d,0xf8,
0x04,0x20,0x9a,0x70,0xf3,0x21,0x02,0x20,0xff,0xf7,0xb2,0xff,0x2c,0x46,0x63,0x1b,
0xb3,0x42,0x05,0xd3,0x01,0x20,0x02,0xb0,0xbd,0xe8,0x70,0x40,0xff,0xf7,0xb2,0xbf,
0xe0,0x21,0x14,0xf8,0x01,0x0b,0xff,0xf7,0xa3,0xff,0xf0,0xe7,0x1a,0x00,0x02,0x40,
0x08,0x4b,0x1b,0x68,0x02,0x2b,0x08,0x4b,0x07,0xd1,0x08,0x4a,0x80,0x21,0x11,0x70,
0xc0,0x22,0x1a,0x70,0x00,0x22,0x1a,0x71,0x70,0x47,0x1a,0x78,0x42,0xf0,0x80,0x02,
0x1a,0x70,0x70,0x47,0x00,0x00,0x0c,0x20,0x10,0x30,0x0c,0x40,0x00,0x30,0x0c,0x40,
0x38,0xb5,0x00,0x20,0xff,0xf7,0x8e,0xff,0xc0,0x21,0x05,0x20,0xff,0xf7,0x80,0xff,
0x0b,0x4b,0x0c,0x4a,0x6f,0xf0,0x7f,0x44,0x6f,0xf0,0x2e,0x00,0x19,0x46,0x18,0x70,
0x0d,0x78,0xed,0x09,0xfc,0xd1,0x15,0x78,0xed,0x07,0x01,0xd5,0x01,0x3c,0xf6,0xd1,
0x01,0x20,0xff,0xf7,0x77,0xff,0x00,0x2c,0x0c,0xbf,0x03,0x20,0x00,0x20,0x38,0xbd,
0x08,0xb5,0xdf,0xf8,0x08,0xd0,0x00,0xf0,0x2f,0xf9,0x00,0x00,0x48,0x15,0x0c,0x20,
0x03,0x4b,0x18,0x70,0x19,0x72,0x08,0x33,0x1a,0x78,0xd2,0x09,0xfc,0xd1,0x70,0x47,
0x16,0x00,0x02,0x40,0x70,0xb5,0x11,0x4c,0x23,0x78,0x03,0xf0,0xfd,0x03,0x23,0x70,
0xc0,0x21,0x05,0x20,0xff,0xf7,0xec,0xff,0x0d,0x4a,0x0e,0x49,0x6f,0xf0,0x7f,0x43,
0x6f,0xf0,0x2e,0x05,0x10,0x46,0x15,0x70,0x06,0x78,0xf6,0x09,0xfc,0xd1,0x0e,0x78,
0xf6,0x07,0x01,0xd5,0x01,0x3b,0xf6,0xd1,0x22,0x78,0x42,0xf0,0x02,0x02,0x00,0x2b,
0x22,0x70,0x0c,0xbf,0x03,0x20,0x00,0x20,0x70,0xbd,0x00,0xbf,0x1f,0x00,0x02,0x40,
0x1e,0x00,0x02,0x40,0x1a,0x00,0x02,0x40,0x08,0xb5,0xc0,0x21,0x06,0x20,0xff,0xf7,
0x5f,0xff,0xff,0xf7,0xd5,0xff,0x28,0xb9,0x03,0x4b,0x1b,0x78,0x13,0xf0,0x02,0x0f,
0x08,0xbf,0x02,0x20,0x08,0xbd,0x00,0xbf,0x1a,0x00,0x02,0x40,0x70,0x47,0x00,0x00,
0x38,0xb5,0x17,0x4c,0xc1,0x21,0x05,0x20,0xff,0xf7,0x4a,0xff,0x25,0x78,0xc1,0x21,
0x35,0x20,0xff,0xf7,0x45,0xff,0x23,0x78,0xed,0xb2,0xdb,0xb2,0x05,0xb9,0xd3,0xb1,
0xff,0xf7,0xda,0xff,0xd0,0xb9,0x0f,0x4b,0x20,0x70,0xf2,0x21,0x18,0x70,0x01,0x20,
0xff,0xf7,0x36,0xff,0xff,0xf7,0xac,0xff,0x80,0xb9,0xc1,0x21,0x05,0x20,0xff,0xf7,
0x2f,0xff,0x25,0x78,0xc1,0x21,0x35,0x20,0xff,0xf7,0x2a,0xff,0x23,0x78,0xed,0xb2,
0xdb,0xb2,0x15,0xb9,0x0b,0xb9,0x00,0x20,0x38,0xbd,0x02,0x20,0x38,0xbd,0x00,0xbf,
0x1a,0x00,0x02,0x40,0x1b,0x00,0x02,0x40,0x2d,0xe9,0xf8,0x43,0x81,0x46,0x0d,0x46,
0x90,0x46,0xff,0xf7,0x75,0xff,0xff,0xf7,0xc3,0xff,0x06,0x46,0xb8,0xb9,0x09,0xf1,
0xff,0x07,0x27,0xf0,0xff,0x07,0xa7,0xeb,0x09,0x04,0xac,0x42,0x28,0xbf,0x2c,0x46,
0x5c,0xb1,0xff,0xf7,0xa1,0xff,0x10,0xbb,0x42,0x46,0xa1,0xb2,0x48,0x46,0xff,0xf7,
0x37,0xff,0xff,0xf7,0x75,0xff,0xd0,0xb9,0xa0,0x44,0x2c,0x1b,0x14,0xb9,0x30,0x46,
0xbd,0xe8,0xf8,0x83,0xff,0xf7,0x90,0xff,0x88,0xb9,0xb4,0xf5,0x80,0x7f,0x25,0x46,
0x28,0xbf,0x4f,0xf4,0x80,0x75,0x42,0x46,0xa9,0xb2,0x38,0x46,0xff,0xf7,0x20,0xff,
0xff,0xf7,0x5e,0xff,0x18,0xb9,0xa8,0x44,0x2f,0x44,0x64,0x1b,0xe6,0xe7,0x06,0x46,
0xe5,0xe7,0x00,0x00,0x2d,0xe9,0xf7,0x4f,0x06,0x46,0x0d,0x46,0xff,0xf7,0x38,0xff,
0xff,0xf7,0x86,0xff,0x82,0x46,0x58,0xb9,0x15,0x4f,0xdf,0xf8,0x58,0x80,0xdf,0xf8,
0x58,0x90,0xab,0x46,0x74,0x19,0xa4,0xeb,0x0b,0x04,0xbb,0xf1,0x00,0x0f,0x03,0xd1,
0x50,0x46,0x03,0xb0,0xbd,0xe8,0xf0,0x8f,0xff,0xf7,0x5e,0xff,0xa8,0xb9,0x01,0x94,
0xc4,0xf3,0x07,0x44,0x3c,0x70,0x9d,0xf8,0x05,0x30,0x88,0xf8,0x00,0x30,0x9d,0xf8,
0x04,0x30,0x89,0xf8,0x00,0x30,0xf3,0x21,0x20,0x20,0xff,0xf7,0xb1,0xfe,0xff,0xf7,
0x27,0xff,0x10,0xb9,0xab,0xf5,0x80,0x5b,0xdc,0xe7,0x82,0x46,0xe0,0xe7,0x00,0xbf,
0x1a,0x00,0x02,0x40,0x1b,0x00,0x02,0x40,0x1c,0x00,0x02,0x40,0x08,0xb5,0xff,0xf7,
0xff,0xfe,0xff,0xf7,0x4d,0xff,0x50,0xb9,0xff,0xf7,0x36,0xff,0x38,0xb9,0xc0,0x21,
0xc7,0x20,0xff,0xf7,0x95,0xfe,0xbd,0xe8,0x08,0x40,0xff,0xf7,0x09,0xbf,0x08,0xbd,
0x10,0xb5,0x04,0x46,0xff,0xf7,0xec,0xfe,0xc3,0x21,0x9f,0x20,0xff,0xf7,0x88,0xfe,
0x06,0x4b,0x07,0x4a,0x19,0x78,0x01,0x33,0x00,0x20,0x1b,0x78,0x12,0x78,0x1b,0x02,
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0xdf,0xe8,0x03,0xf0,0x02,0x17,0x1f,0x22,0x01,0xa8,0xff,0xf7,0xc9,0xff,0xb0,0xb9,
0x01,0x9b,0x2b,0x70,0x19,0x0a,0x1b,0x0c,0x69,0x70,0xab,0x70,0xe8,0x70,0x23,0x7c,
0x00,0x23,0x23,0x74,0x62,0x7c,0x63,0x74,0xa2,0x7c,0xa3,0x74,0xe2,0x7c,0xe3,0x74,
0xdf,0xe7,0x60,0x68,0xa1,0x68,0xff,0xf7,0x65,0xff,0x00,0x28,0xef,0xd0,0x20,0x61,
0xfe,0xe7,0xff,0xf7,0x9b,0xff,0xf8,0xe7,0x60,0x68,0xa1,0x68,0x2a,0x46,0xff,0xf7,
0x1b,0xff,0xf2,0xe7,0x01,0x20,0xf2,0xe7,0x00,0x00,0x0c,0x20,0x14,0x00,0x0c,0x20,
0xf0,0xb5,0x83,0x07,0x47,0xd0,0x54,0x1e,0x00,0x2a,0x41,0xd0,0x0d,0x06,0x2d,0x0e,
0x02,0x00,0x03,0x26,0x02,0xe0,0x1a,0x00,0x01,0x3c,0x39,0xd3,0x53,0x1c,0x15,0x70,
0x33,0x42,0xf8,0xd1,0x03,0x2c,0x2a,0xd9,0xff,0x22,0x0a,0x40,0x15,0x02,0x15,0x43,
0x2a,0x04,0x15,0x43,0x0f,0x2c,0x14,0xd9,0x27,0x00,0x1a,0x00,0x10,0x3f,0x3e,0x09,
0x01,0x36,0x36,0x01,0x9e,0x19,0x15,0x60,0x55,0x60,0x95,0x60,0xd5,0x60,0x10,0x32,
0x96,0x42,0xf8,0xd1,0x0f,0x22,0x97,0x43,0x10,0x37,0xdb,0x19,0x14,0x40,0x03,0x2c,
0x0d,0xd9,0x1a,0x00,0x27,0x1f,0xbe,0x08,0x01,0x36,0xb6,0x00,0x9e,0x19,0x20,0xc2,
0xb2,0x42,0xfc,0xd1,0x03,0x22,0x97,0x43,0x04,0x37,0xdb,0x19,0x14,0x40,0x00,0x2c,
0x06,0xd0,0x09,0x06,0x1c,0x19,0x09,0x0e,0x19,0x70,0x01,0x33,0x9c,0x42,0xfb,0xd1,
0xf0,0xbc,0x02,0xbc,0x08,0x47,0x14,0x00,0x03,0x00,0xc3,0xe7,
0xc7,0xff,0xff,0xf7,0xcf,0xff,0x28,0xb9,0x03,0x4b,0x1b,0x78,0x13,0xf0,0x02,0x0f,
0x08,0xbf,0x02,0x20,0x08,0xbd,0x00,0xbf,0x1a,0x00,0x02,0x40,0xf8,0xb5,0x12,0x4c,
0x23,0x78,0x03,0xf0,0xfd,0x03,0x23,0x70,0x10,0x4b,0x17,0x46,0xc0,0xf3,0x07,0x42,
0x1a,0x70,0xc0,0xf3,0x07,0x22,0xc0,0xb2,0x03,0xf8,0x01,0x2c,0x0e,0x46,0x03,0xf8,
0x02,0x0c,0xe8,0x21,0x02,0x20,0xff,0xf7,0xa3,0xff,0x00,0x25,0xae,0x42,0x04,0xd8,
0x23,0x78,0x43,0xf0,0x02,0x03,0x23,0x70,0xf8,0xbd,0x78,0x5d,0xe0,0x21,0xff,0xf7,
0x97,0xff,0x01,0x35,0xf2,0xe7,0x00,0xbf,0x1f,0x00,0x02,0x40,0x19,0x00,0x02,0x40,
0x70,0x47,0x2d,0xe9,0xf0,0x41,0x00,0xf1,0xff,0x06,0x26,0xf0,0xff,0x06,0x34,0x1a,
0x8c,0x42,0x28,0xbf,0x0c,0x46,0x80,0x46,0x0d,0x46,0x17,0x46,0x5c,0xb1,0xff,0xf7,
0xb3,0xff,0x58,0xb9,0x3a,0x46,0xa1,0xb2,0x40,0x46,0xff,0xf7,0xbf,0xff,0xff,0xf7,
0x81,0xff,0x18,0xb9,0x27,0x44,0x2c,0x1b,0x14,0xb9,0x20,0x46,0xbd,0xe8,0xf0,0x81,
0xb4,0xf5,0x80,0x7f,0x25,0x46,0x28,0xbf,0x4f,0xf4,0x80,0x75,0xff,0xf7,0x9c,0xff,
0x00,0x28,0xf3,0xd1,0x3a,0x46,0xa9,0xb2,0x30,0x46,0xff,0xf7,0xa7,0xff,0xff,0xf7,
0x69,0xff,0x00,0x28,0xea,0xd1,0x2f,0x44,0x2e,0x44,0x64,0x1b,0xe4,0xe7,0x00,0x00,
0x2d,0xe9,0xf0,0x47,0x14,0x4e,0x15,0x4f,0xdf,0xf8,0x54,0x80,0x05,0x46,0x0c,0x46,
0x8a,0x46,0x05,0xeb,0x04,0x09,0xa9,0xeb,0x0a,0x09,0xba,0xf1,0x00,0x0f,0x02,0xd1,
0x50,0x46,0xbd,0xe8,0xf0,0x87,0xff,0xf7,0x77,0xff,0x00,0x28,0xf9,0xd1,0xc9,0xf3,
0x07,0x43,0x33,0x70,0xc9,0xf3,0x07,0x23,0x5f,0xfa,0x89,0xf9,0x3b,0x70,0xc8,0x21,
0x20,0x20,0x88,0xf8,0x00,0x90,0xff,0xf7,0x33,0xff,0xff,0xf7,0x3b,0xff,0x00,0x28,
0xe7,0xd1,0xaa,0xf5,0x80,0x5a,0xdc,0xe7,0x19,0x00,0x02,0x40,0x18,0x00,0x02,0x40,
0x17,0x00,0x02,0x40,0x08,0xb5,0xff,0xf7,0x57,0xff,0x38,0xb9,0xc0,0x21,0xc7,0x20,
0xff,0xf7,0x1e,0xff,0xbd,0xe8,0x08,0x40,0xff,0xf7,0x24,0xbf,0x08,0xbd,0x00,0x00,
0x38,0xb5,0xff,0xf7,0x49,0xff,0x04,0x46,0xc0,0xb9,0x0d,0x4b,0x0d,0x4d,0xf2,0x21,
0x28,0x70,0x18,0x70,0x01,0x20,0xff,0xf7,0x0b,0xff,0xff,0xf7,0x13,0xff,0x04,0x46,
0x60,0xb9,0xc1,0x21,0x05,0x20,0xff,0xf7,0x03,0xff,0x2b,0x78,0x2b,0xb9,0xc1,0x21,
0x35,0x20,0xff,0xf7,0xfd,0xfe,0x2b,0x78,0x03,0xb1,0x02,0x24,0x20,0x46,0x38,0xbd,
0x1b,0x00,0x02,0x40,0x1a,0x00,0x02,0x40,0x10,0xb5,0xc3,0x21,0x04,0x46,0x9f,0x20,
0xff,0xf7,0xee,0xfe,0x06,0x4b,0x07,0x4a,0x19,0x78,0x01,0x33,0x00,0x20,0x1b,0x78,
0x12,0x78,0x1b,0x02,0x43,0xea,0x01,0x43,0x13,0x43,0x23,0x60,0x10,0xbd,0x00,0xbf,
0x1a,0x00,0x02,0x40,0x1c,0x00,0x02,0x40,0x08,0xb5,0x10,0x22,0x00,0x21,0x00,0xf0,
0x4d,0xf8,0x00,0x20,0x08,0xbd,0x00,0x00,0x73,0xb5,0x21,0x48,0x20,0x4c,0xff,0xf7,
0xf3,0xff,0x20,0x4a,0x13,0x78,0x43,0xf0,0x80,0x03,0x13,0x70,0xff,0xf7,0xb0,0xff,
0x05,0x46,0x58,0xb9,0x1c,0x4e,0xe3,0x68,0x00,0x2b,0xfc,0xd0,0xa3,0x68,0x01,0x3b,
0x03,0x2b,0x2a,0xd8,0xdf,0xe8,0x03,0xf0,0x04,0x18,0x20,0x23,0xe5,0x60,0xfd,0xe7,
0x01,0xa8,0xff,0xf7,0xc1,0xff,0xa8,0xb9,0x01,0x9b,0x33,0x70,0x1a,0x0a,0x1b,0x0c,
0x72,0x70,0xb3,0x70,0xf0,0x70,0x23,0x7b,0x25,0x73,0x63,0x7b,0x65,0x73,0xa3,0x7b,
0xa5,0x73,0xe3,0x7b,0xe5,0x73,0xde,0xe7,0x20,0x68,0x61,0x68,0xff,0xf7,0x48,0xff,
0x00,0x28,0xf0,0xd0,0xe0,0x60,0xfe,0xe7,0xff,0xf7,0x74,0xff,0xf8,0xe7,0x20,0x68,
0x61,0x68,0x32,0x46,0xff,0xf7,0x05,0xff,0xf2,0xe7,0x01,0x20,0xf2,0xe7,0x00,0xbf,
0x00,0x00,0x0c,0x20,0x10,0x30,0x0c,0x40,0x10,0x00,0x0c,0x20,0xf0,0xb5,0x05,0x00,
0x83,0x07,0x4e,0xd0,0x54,0x1e,0x00,0x2a,0x46,0xd0,0x0a,0x06,0x12,0x0e,0x03,0x00,
0x03,0x26,0x02,0xe0,0x01,0x35,0x01,0x3c,0x3e,0xd3,0x01,0x33,0x2a,0x70,0x33,0x42,
0xf8,0xd1,0x03,0x2c,0x2f,0xd9,0xff,0x22,0x0a,0x40,0x15,0x02,0x15,0x43,0x2a,0x04,
0x15,0x43,0x0f,0x2c,0x38,0xd9,0x27,0x00,0x10,0x3f,0x3f,0x09,0x3e,0x01,0xb4,0x46,
0x1e,0x00,0x1a,0x00,0x10,0x36,0x66,0x44,0x15,0x60,0x55,0x60,0x95,0x60,0xd5,0x60,
0x10,0x32,0xb2,0x42,0xf8,0xd1,0x0f,0x26,0x0c,0x22,0x01,0x37,0x3f,0x01,0x26,0x40,
0xdb,0x19,0x37,0x00,0x22,0x42,0x1a,0xd0,0x3e,0x1f,0xb6,0x08,0xb4,0x00,0xa4,0x46,
0x1a,0x00,0x1c,0x1d,0x64,0x44,0x20,0xc2,0xa2,0x42,0xfc,0xd1,0x03,0x24,0x01,0x36,
0xb6,0x00,0x9b,0x19,0x3c,0x40,0x00,0x2c,0x06,0xd0,0x09,0x06,0x1c,0x19,0x09,0x0e,
0x19,0x70,0x01,0x33,0x9c,0x42,0xfb,0xd1,0xf0,0xbc,0x02,0xbc,0x08,0x47,0x34,0x00,
0xf1,0xe7,0x14,0x00,0x03,0x00,0xbc,0xe7,0x27,0x00,0xdd,0xe7,

View File

@ -10,29 +10,9 @@
#include <string.h>
#include "npcx_flash.h"
/* flashloader parameter structure */
__attribute__ ((section(".buffers.g_cfg")))
static volatile struct npcx_flash_params g_cfg;
/* data buffer */
__attribute__ ((section(".buffers.g_buf")))
static uint8_t g_buf[NPCX_FLASH_LOADER_BUFFER_SIZE];
/*----------------------------------------------------------------------------
* NPCX flash driver
*----------------------------------------------------------------------------*/
static void flash_init(void)
{
if (g_cfg.fiu_ver == NPCX_FIU_NPCK) {
/* Set pinmux to SHD flash */
NPCX_DEVCNT = 0x80;
NPCX_DEVALT(0) = 0xC0;
NPCX_DEVALT(4) = 0x00;
} else {
/* Avoid F_CS0 toggles while programming the internal flash. */
NPCX_SET_BIT(NPCX_DEVALT(0), NPCX_DEVALT0_NO_F_SPI);
}
}
static void flash_execute_cmd(uint8_t code, uint8_t cts)
{
/* Set UMA code */
@ -46,26 +26,11 @@ static void flash_execute_cmd(uint8_t code, uint8_t cts)
static void flash_cs_level(uint8_t level)
{
int sw_cs = 0;
if (g_cfg.fiu_ver == NPCX_FIU_NPCX) {
sw_cs = 1;
} else if (g_cfg.fiu_ver == NPCX_FIU_NPCX_V2) {
sw_cs = 0;
} else if (g_cfg.fiu_ver == NPCX_FIU_NPCK) {
sw_cs = 1;
/* Unlock UMA before pulling down CS in NPCK series */
if (level)
NPCX_CLEAR_BIT(NPCX_FIU_MSR_IE_CFG, NPCX_FIU_MSR_IE_CFG_UMA_BLOCK);
else
NPCX_SET_BIT(NPCX_FIU_MSR_IE_CFG, NPCX_FIU_MSR_IE_CFG_UMA_BLOCK);
}
/* Program chip select pin to high/low level */
if (level)
NPCX_SET_BIT(NPCX_UMA_ECTS, sw_cs);
NPCX_SET_BIT(NPCX_UMA_ECTS, NPCX_UMA_ECTS_SW_CS1);
else
NPCX_CLEAR_BIT(NPCX_UMA_ECTS, sw_cs);
NPCX_CLEAR_BIT(NPCX_UMA_ECTS, NPCX_UMA_ECTS_SW_CS1);
}
static void flash_set_address(uint32_t dest_addr)
@ -73,15 +38,15 @@ static void flash_set_address(uint32_t dest_addr)
uint8_t *addr = (uint8_t *)&dest_addr;
/* Set target flash address */
NPCX_UMA_DB0 = addr[2];
NPCX_UMA_DB1 = addr[1];
NPCX_UMA_DB2 = addr[0];
NPCX_UMA_AB2 = addr[2];
NPCX_UMA_AB1 = addr[1];
NPCX_UMA_AB0 = addr[0];
}
static void delay(uint32_t i)
void delay(uint32_t i)
{
while (i--)
__asm__ volatile ("nop");
;
}
static int flash_wait_ready(uint32_t timeout)
@ -139,7 +104,7 @@ static void flash_burst_write(uint32_t dest_addr, uint16_t bytes,
/* Set write address */
flash_set_address(dest_addr);
/* Start programming */
flash_execute_cmd(NPCX_CMD_FLASH_PROGRAM, NPCX_MASK_CMD_WR_3BYTE);
flash_execute_cmd(NPCX_CMD_FLASH_PROGRAM, NPCX_MASK_CMD_WR_ADR);
for (uint32_t i = 0; i < bytes; i++) {
flash_execute_cmd(*data, NPCX_MASK_CMD_WR_ONLY);
data++;
@ -149,15 +114,6 @@ static void flash_burst_write(uint32_t dest_addr, uint16_t bytes,
flash_cs_level(1);
}
static void flash_get_stsreg(uint8_t *reg1, uint8_t *reg2)
{
/* Read status register 1/2 for checking */
flash_execute_cmd(NPCX_CMD_READ_STATUS_REG, NPCX_MASK_CMD_RD_1BYTE);
*reg1 = NPCX_UMA_DB0;
flash_execute_cmd(NPCX_CMD_READ_STATUS_REG2, NPCX_MASK_CMD_RD_1BYTE);
*reg2 = NPCX_UMA_DB0;
}
/* The data to write cannot cross 256 Bytes boundary */
static int flash_program_write(uint32_t addr, uint32_t size,
const uint8_t *data)
@ -170,41 +126,7 @@ static int flash_program_write(uint32_t addr, uint32_t size,
return flash_wait_ready(NPCX_FLASH_ABORT_TIMEOUT);
}
static int flash_physical_clear_stsreg(void)
{
int status;
uint8_t reg1, reg2;
/* Read status register 1/2 for checking */
flash_get_stsreg(&reg1, &reg2);
if (reg1 == 0x00 && reg2 == 0x00)
return NPCX_FLASH_STATUS_OK;
/* Enable write */
status = flash_write_enable();
if (status != NPCX_FLASH_STATUS_OK)
return status;
NPCX_UMA_DB0 = 0x0;
NPCX_UMA_DB1 = 0x0;
/* Write status register 1/2 */
flash_execute_cmd(NPCX_CMD_WRITE_STATUS_REG, NPCX_MASK_CMD_WR_2BYTE);
/* Wait writing completed */
status = flash_wait_ready(NPCX_FLASH_ABORT_TIMEOUT);
if (status != NPCX_FLASH_STATUS_OK)
return status;
/* Read status register 1/2 for checking */
flash_get_stsreg(&reg1, &reg2);
if (reg1 != 0x00 || reg2 != 0x00)
return NPCX_FLASH_STATUS_FAILED;
return NPCX_FLASH_STATUS_OK;
}
static int flash_physical_write(uint32_t offset, uint32_t size, const uint8_t *data)
int flash_physical_write(uint32_t offset, uint32_t size, const uint8_t *data)
{
int status;
uint32_t trunk_start = (offset + 0xff) & ~0xff;
@ -213,13 +135,6 @@ static int flash_physical_write(uint32_t offset, uint32_t size, const uint8_t *d
uint32_t dest_addr = offset;
uint32_t write_len = ((trunk_start - offset) > size) ? size : (trunk_start - offset);
/* Configure fiu and clear status registers if needed */
flash_init();
status = flash_physical_clear_stsreg();
if (status != NPCX_FLASH_STATUS_OK)
return status;
if (write_len) {
status = flash_program_write(dest_addr, write_len, data);
if (status != NPCX_FLASH_STATUS_OK)
@ -247,16 +162,8 @@ static int flash_physical_write(uint32_t offset, uint32_t size, const uint8_t *d
return NPCX_FLASH_STATUS_OK;
}
static int flash_physical_erase(uint32_t offset, uint32_t size)
int flash_physical_erase(uint32_t offset, uint32_t size)
{
/* Configure fiu */
flash_init();
/* clear flash status registers */
int status = flash_physical_clear_stsreg();
if (status != NPCX_FLASH_STATUS_OK)
return status;
/* Alignment has been checked in upper layer */
for (; size > 0; size -= NPCX_FLASH_ERASE_SIZE,
offset += NPCX_FLASH_ERASE_SIZE) {
@ -268,7 +175,7 @@ static int flash_physical_erase(uint32_t offset, uint32_t size)
/* Set erase address */
flash_set_address(offset);
/* Start erase */
flash_execute_cmd(NPCX_CMD_SECTOR_ERASE, NPCX_MASK_CMD_WR_3BYTE);
flash_execute_cmd(NPCX_CMD_SECTOR_ERASE, NPCX_MASK_CMD_ADR);
/* Wait erase completed */
status = flash_wait_ready(NPCX_FLASH_ABORT_TIMEOUT);
if (status != NPCX_FLASH_STATUS_OK)
@ -278,18 +185,10 @@ static int flash_physical_erase(uint32_t offset, uint32_t size)
return NPCX_FLASH_STATUS_OK;
}
static int flash_physical_erase_all(void)
int flash_physical_erase_all(void)
{
int status;
/* Configure fiu and clear status register if needed */
flash_init();
status = flash_physical_clear_stsreg();
if (status != NPCX_FLASH_STATUS_OK)
return status;
/* Enable write */
status = flash_write_enable();
int status = flash_write_enable();
if (status != NPCX_FLASH_STATUS_OK)
return status;
@ -304,10 +203,37 @@ static int flash_physical_erase_all(void)
return NPCX_FLASH_STATUS_OK;
}
static int flash_get_id(uint32_t *id)
int flash_physical_clear_stsreg(void)
{
flash_init();
/* Enable write */
int status = flash_write_enable();
if (status != NPCX_FLASH_STATUS_OK)
return status;
NPCX_UMA_DB0 = 0x0;
NPCX_UMA_DB1 = 0x0;
/* Write status register 1/2 */
flash_execute_cmd(NPCX_CMD_WRITE_STATUS_REG, NPCX_MASK_CMD_WR_2BYTE);
/* Wait writing completed */
status = flash_wait_ready(NPCX_FLASH_ABORT_TIMEOUT);
if (status != NPCX_FLASH_STATUS_OK)
return status;
/* Read status register 1/2 for checking */
flash_execute_cmd(NPCX_CMD_READ_STATUS_REG, NPCX_MASK_CMD_RD_1BYTE);
if (NPCX_UMA_DB0 != 0x00)
return NPCX_FLASH_STATUS_FAILED;
flash_execute_cmd(NPCX_CMD_READ_STATUS_REG2, NPCX_MASK_CMD_RD_1BYTE);
if (NPCX_UMA_DB0 != 0x00)
return NPCX_FLASH_STATUS_FAILED;
return NPCX_FLASH_STATUS_OK;
}
int flash_get_id(uint32_t *id)
{
flash_execute_cmd(NPCX_CMD_READ_ID, NPCX_MASK_CMD_RD_3BYTE);
*id = NPCX_UMA_DB0 << 16 | NPCX_UMA_DB1 << 8 | NPCX_UMA_DB2;
@ -317,7 +243,7 @@ static int flash_get_id(uint32_t *id)
/*----------------------------------------------------------------------------
* flash loader function
*----------------------------------------------------------------------------*/
static uint32_t flashloader_init(struct npcx_flash_params *params)
uint32_t flashloader_init(struct npcx_flash_params *params)
{
/* Initialize params buffers */
memset(params, 0, sizeof(struct npcx_flash_params));
@ -328,13 +254,30 @@ static uint32_t flashloader_init(struct npcx_flash_params *params)
/*----------------------------------------------------------------------------
* Functions
*----------------------------------------------------------------------------*/
static int main(void)
/* flashloader parameter structure */
__attribute__ ((section(".buffers.g_cfg")))
volatile struct npcx_flash_params g_cfg;
/* data buffer */
__attribute__ ((section(".buffers.g_buf")))
uint8_t g_buf[NPCX_FLASH_LOADER_BUFFER_SIZE];
int main(void)
{
uint32_t id, status;
uint32_t id;
/* set buffer */
flashloader_init((struct npcx_flash_params *)&g_cfg);
/* Avoid F_CS0 toggles while programming the internal flash. */
NPCX_SET_BIT(NPCX_DEVALT(0), NPCX_DEVALT0_NO_F_SPI);
/* clear flash status registers */
int status = flash_physical_clear_stsreg();
if (status != NPCX_FLASH_STATUS_OK) {
while (1)
g_cfg.sync = status;
}
while (1) {
/* wait command*/
while (g_cfg.sync == NPCX_FLASH_LOADER_WAIT)

View File

@ -80,7 +80,6 @@
#define NPCX_FIU_DMM_CYC NPCX_HW_BYTE(NPCX_FIU_BASE_ADDR + 0x032)
#define NPCX_FIU_EXT_CFG NPCX_HW_BYTE(NPCX_FIU_BASE_ADDR + 0x033)
#define NPCX_FIU_UMA_AB0_3 NPCX_HW_DWORD(NPCX_FIU_BASE_ADDR + 0x034)
#define NPCX_FIU_MSR_IE_CFG NPCX_HW_BYTE(NPCX_FIU_BASE_ADDR + 0x043)
/* FIU register fields */
#define NPCX_RESP_CFG_IAD_EN 0
@ -94,7 +93,6 @@
#define NPCX_UMA_ECTS_SW_CS1 1
#define NPCX_UMA_ECTS_SEC_CS 2
#define NPCX_UMA_ECTS_UMA_LOCK 3
#define NPCX_FIU_MSR_IE_CFG_UMA_BLOCK 3
/* Flash UMA commands for npcx internal SPI flash */
#define NPCX_CMD_READ_ID 0x9F
@ -132,6 +130,7 @@
#define NPCX_SPI_FLASH_SR1_BUSY (1 << 0)
#define NPCX_MASK_CMD_ONLY (0xC0)
#define NPCX_MASK_CMD_ADR (0xC0 | 0x08)
#define NPCX_MASK_CMD_ADR_WR (0xC0 | 0x20 | 0x08 | 0x01)
#define NPCX_MASK_RD_1BYTE (0xC0 | 0x10 | 0x01)
#define NPCX_MASK_RD_2BYTE (0xC0 | 0x10 | 0x02)
@ -144,12 +143,10 @@
#define NPCX_MASK_CMD_WR_ONLY (0xC0 | 0x20)
#define NPCX_MASK_CMD_WR_1BYTE (0xC0 | 0x20 | 0x10 | 0x01)
#define NPCX_MASK_CMD_WR_2BYTE (0xC0 | 0x20 | 0x10 | 0x02)
#define NPCX_MASK_CMD_WR_3BYTE (0xC0 | 0x20 | 0x10 | 0x03)
#define NPCX_MASK_CMD_WR_4BYTE (0xC0 | 0x20 | 0x10 | 0x04)
#define NPCX_MASK_CMD_WR_ADR (0xC0 | 0x20 | 0x08)
/* Flash loader parameters */
struct __attribute__((__packed__)) npcx_flash_params {
uint32_t fiu_ver; /* Flash controller unit version */
uint32_t addr; /* Address in flash */
uint32_t len; /* Number of bytes */
uint32_t cmd; /* Command */
@ -179,10 +176,4 @@ enum npcx_flash_status {
NPCX_FLASH_STATUS_FAILED_TIMEOUT,
};
enum npcx_fiu_ver {
NPCX_FIU_NPCX = 0,
NPCX_FIU_NPCX_V2,
NPCX_FIU_NPCK,
};
#endif /* OPENOCD_LOADERS_FLASH_NPCX_NPCX_FLASH_H */

View File

@ -18,7 +18,7 @@
/* NPCX flash loader information */
#define NPCX_FLASH_LOADER_WORKING_ADDR 0x200C0000
#define NPCX_FLASH_LOADER_PARAMS_ADDR NPCX_FLASH_LOADER_WORKING_ADDR
#define NPCX_FLASH_LOADER_PARAMS_SIZE 20
#define NPCX_FLASH_LOADER_PARAMS_SIZE 16
#define NPCX_FLASH_LOADER_BUFFER_ADDR (NPCX_FLASH_LOADER_PARAMS_ADDR + NPCX_FLASH_LOADER_PARAMS_SIZE)
#define NPCX_FLASH_LOADER_BUFFER_SIZE NPCX_FLASH_ERASE_SIZE
#define NPCX_FLASH_LOADER_PROGRAM_ADDR (NPCX_FLASH_LOADER_BUFFER_ADDR + NPCX_FLASH_LOADER_BUFFER_SIZE)

View File

@ -1,38 +0,0 @@
# SPDX-License-Identifier: GPL-2.0-or-later
# Espressif Xtensa Makefile to compile flasher stub wrapper
# Copyright (C) 2023 Espressif Systems Ltd.
# Prefix for Espressif xtensa cross compilers (can include a directory path)
CROSS ?= xtensa-esp32-elf-
APP_ARCH := xtensa
APP_CHIP_PATH := $(shell pwd)
SRCS := $(APP_CHIP_PATH)/esp_xtensa_stub_tramp_win.S
BIN2C = ../../../../../src/helper/bin2char.sh
BUILD_DIR = build
APP = esp_xtensa_stub_tramp_win
APP_OBJ = $(BUILD_DIR)/$(APP).o
APP_BIN = $(BUILD_DIR)/$(APP).bin
APP_CODE = $(APP).inc
.PHONY: all clean
all: $(BUILD_DIR) $(APP_OBJ) $(APP_CODE)
$(BUILD_DIR):
$(Q) mkdir $@
$(APP_OBJ): $(SRCS)
@echo " CC $^ -> $@"
$(Q) $(CROSS)gcc -c $(CFLAGS) -o $@ $^
$(APP_CODE): $(APP_OBJ)
@echo " CC $^ -> $@"
$(Q) $(CROSS)objcopy -O binary -j.text $^ $(APP_BIN)
$(Q) $(BIN2C) < $(APP_BIN) > $@
clean:
$(Q) rm -rf $(BUILD_DIR)

View File

@ -1,41 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/***************************************************************************
* Xtensa flasher stub wrapper *
* Copyright (C) 2017 Espressif Systems Ltd. *
***************************************************************************/
/*
* Expects :
* a0 = zero
* a1 = stack_base + stack_size - 16, 16 bytes aligned
* a8 = address of the function to call
* Params :
* a2 = command arg0, result (out)
* a3 = command arg1
* a4 = command arg2
* a5 = command arg3
* a6 = command arg4
* Maximum 5 user args
*/
.text
.align 4
_stub_enter:
/* initialize initial stack frame for callx8 */
addi a9, sp, 32 /* point 16 past extra save area */
s32e a9, sp, -12 /* access to extra save area */
/* prepare args */
mov a10, a2
mov a11, a3
mov a12, a4
mov a13, a5
mov a14, a6
/* call stub */
callx8 a8
/* prepare return value */
mov a2, a10
break 0,0
_idle_loop:
j _idle_loop

View File

@ -1,3 +0,0 @@
/* Autogenerated with ../../../../../src/helper/bin2char.sh */
0x92,0xc1,0x20,0x90,0xd1,0x49,0xad,0x02,0xbd,0x03,0xcd,0x04,0xdd,0x05,0x60,0xe6,
0x20,0xe0,0x08,0x00,0x2d,0x0a,0x00,0x40,0x00,0x06,0xff,0xff,

View File

@ -1,31 +1,30 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/***************************************************************************
* Copyright (C) 2021 by Manuel Wick <manuel@matronix.de> *
* Copyright (C) 2013 Paul Fertser <fercerpav@gmail.com> *
* Copyright (C) 2012 by Creative Product Design, marc @ cpdesign.com.au *
***************************************************************************/
/*
* This is a test application to be used as a remote bitbang server for
* the OpenOCD remote_bitbang interface driver.
*
* To compile run:
* gcc -Wall -ansi -pedantic -std=c99 -o remote_bitbang_sysfsgpio remote_bitbang_sysfsgpio.c
*
*
* Usage example:
*
* On Raspberry Pi run:
* socat TCP6-LISTEN:7777,fork EXEC:"sudo ./remote_bitbang_sysfsgpio tck 11 tms 25 tdo 9 tdi 10"
*
* On host run:
* openocd -c "adapter driver remote_bitbang; remote_bitbang host raspberrypi; remote_bitbang port 7777" \
* -f target/stm32f1x.cfg
*
* Or if you want to test UNIX sockets, run both on Raspberry Pi:
* socat UNIX-LISTEN:/tmp/remotebitbang-socket,fork EXEC:"sudo ./remote_bitbang_sysfsgpio tck 11 tms 25 tdo 9 tdi 10"
* openocd -c "adapter driver remote_bitbang; remote_bitbang host /tmp/remotebitbang-socket" -f target/stm32f1x.cfg
This is a test application to be used as a remote bitbang server for
the OpenOCD remote_bitbang interface driver.
To compile run:
gcc -Wall -ansi -pedantic -std=c99 -o remote_bitbang_sysfsgpio remote_bitbang_sysfsgpio.c
Usage example:
On Raspberry Pi run:
socat TCP6-LISTEN:7777,fork EXEC:"sudo ./remote_bitbang_sysfsgpio tck 11 tms 25 tdo 9 tdi 10"
On host run:
openocd -c "interface remote_bitbang; remote_bitbang host raspberrypi; remote_bitbang port 7777" \
-f target/stm32f1x.cfg
Or if you want to test UNIX sockets, run both on Raspberry Pi:
socat UNIX-LISTEN:/tmp/remotebitbang-socket,fork EXEC:"sudo ./remote_bitbang_sysfsgpio tck 11 tms 25 tdo 9 tdi 10"
openocd -c "interface remote_bitbang; remote_bitbang host /tmp/remotebitbang-socket" -f target/stm32f1x.cfg
*/
#include <sys/types.h>
@ -98,14 +97,11 @@ static void unexport_sysfs_gpio(int gpio)
* If the gpio is an output, it is initialized according to init_high,
* otherwise it is ignored.
*
* When open_rw is set, the file descriptor will be open as read and write,
* e.g. for SWDIO (TMS) that is used as input and output.
*
* If the gpio is already exported we just show a warning and continue; if
* openocd happened to crash (or was killed by user) then the gpios will not
* have been cleaned up.
*/
static int setup_sysfs_gpio(int gpio, int is_output, int init_high, int open_rw)
static int setup_sysfs_gpio(int gpio, int is_output, int init_high)
{
char buf[40];
char gpiostr[4];
@ -136,9 +132,7 @@ static int setup_sysfs_gpio(int gpio, int is_output, int init_high, int open_rw)
}
snprintf(buf, sizeof(buf), "/sys/class/gpio/gpio%d/value", gpio);
if (open_rw)
ret = open(buf, O_RDWR | O_NONBLOCK | O_SYNC);
else if (is_output)
if (is_output)
ret = open(buf, O_WRONLY | O_NONBLOCK | O_SYNC);
else
ret = open(buf, O_RDONLY | O_NONBLOCK | O_SYNC);
@ -149,37 +143,6 @@ static int setup_sysfs_gpio(int gpio, int is_output, int init_high, int open_rw)
return ret;
}
/*
* Change direction for gpio.
*/
static int change_dir_sysfs_gpio(int gpio, int is_output, int init_high)
{
char buf[40];
int ret;
if (!is_gpio_valid(gpio))
return ERROR_OK;
snprintf(buf, sizeof(buf), "/sys/class/gpio/gpio%d/direction", gpio);
ret = open_write_close(buf, is_output ? (init_high ? "high" : "low") : "in");
if (ret < 0) {
LOG_ERROR("Couldn't set direction for gpio %d", gpio);
perror("sysfsgpio: ");
unexport_sysfs_gpio(gpio);
return ERROR_FAIL;
}
return ERROR_OK;
}
/* gpio numbers for each gpio. Negative values are invalid */
static int tck_gpio = -1;
static int tms_gpio = -1;
static int tdi_gpio = -1;
static int tdo_gpio = -1;
static int trst_gpio = -1;
static int srst_gpio = -1;
/*
* file descriptors for /sys/class/gpio/gpioXX/value
* Set up during init.
@ -191,15 +154,6 @@ static int tdo_fd = -1;
static int trst_fd = -1;
static int srst_fd = -1;
/*
* GPIO state of /sys/class/gpio/gpioXX/value
*/
static int last_tck = -1;
static int last_tms = -1;
static int last_tms_drive = -1;
static int last_tdi = -1;
static int last_initialized = -1;
/*
* Bitbang interface read of TDO
*
@ -225,22 +179,26 @@ static int sysfsgpio_read(void)
/*
* Bitbang interface write of TCK, TMS, TDI
*
* Output states are changed here and in sysfsgpio_write_swd,
* which are not used simultaneously, so we can cache the old
* value to avoid needlessly writing it.
* Seeing as this is the only function where the outputs are changed,
* we can cache the old value to avoid needlessly writing it.
*/
static void sysfsgpio_write(int tck, int tms, int tdi)
{
const char one[] = "1";
const char zero[] = "0";
static int last_tck;
static int last_tms;
static int last_tdi;
static int first_time;
size_t bytes_written;
if (!last_initialized) {
if (!first_time) {
last_tck = !tck;
last_tms = !tms;
last_tdi = !tdi;
last_initialized = 1;
first_time = 1;
}
if (tdi != last_tdi) {
@ -293,81 +251,13 @@ static void sysfsgpio_reset(int trst, int srst)
}
}
/*
* Bitbang interface set direction of SWDIO (TMS)
*/
static void sysfsgpio_swdio_drive(int is_output)
{
int ret;
if (is_output != 0 && last_tms == -1)
last_tms = 0;
ret = change_dir_sysfs_gpio(tms_gpio, (is_output != 0) ? 1 : 0, last_tms);
if (ret != ERROR_OK)
LOG_WARNING("Failed to change SWDIO (TMS) direction to output");
else
last_tms_drive = (is_output != 0) ? 1 : 0;
}
/*
* Bitbang interface read of SWDIO (TMS)
*
* The sysfs value will read back either '0' or '1'. The trick here is to call
* lseek to bypass buffering in the sysfs kernel driver.
*/
static int sysfsgpio_swdio_read(void)
{
char buf[1];
/* important to seek to signal sysfs of new read */
lseek(tms_fd, 0, SEEK_SET);
int ret = read(tms_fd, &buf, sizeof(buf));
if (ret < 0) {
LOG_WARNING("reading swdio (tms) failed");
return 0;
}
return buf[0];
}
/*
* Bitbang interface write of SWCLK (TCK) and SWDIO (TMS)
*
* Output states are changed here and in sysfsgpio_write, which
* are not used simultaneously, so we can cache the old value
* to avoid needlessly writing it.
*/
static void sysfsgpio_swd_write(int swclk, int swdio)
{
static const char one[] = "1";
static const char zero[] = "0";
size_t bytes_written;
if (!last_initialized) {
last_tck = !swclk;
last_tms = !swdio;
last_initialized = 1;
}
if (last_tms_drive == 1 && swdio != last_tms) {
bytes_written = write(tms_fd, swdio ? &one : &zero, 1);
if (bytes_written != 1)
LOG_WARNING("writing swdio (tms) failed");
}
/* write clk last */
if (swclk != last_tck) {
bytes_written = write(tck_fd, swclk ? &one : &zero, 1);
if (bytes_written != 1)
LOG_WARNING("writing swclk (tck) failed");
}
last_tms = swdio;
last_tck = swclk;
}
/* gpio numbers for each gpio. Negative values are invalid */
static int tck_gpio = -1;
static int tms_gpio = -1;
static int tdi_gpio = -1;
static int tdo_gpio = -1;
static int trst_gpio = -1;
static int srst_gpio = -1;
/* helper func to close and cleanup files only if they were valid/ used */
static void cleanup_fd(int fd, int gpio)
@ -403,21 +293,13 @@ static void process_remote_protocol(void)
char d = c - 'r';
sysfsgpio_reset(!!(d & 2),
(d & 1));
} else if (c >= '0' && c <= '0' + 7) { /* Write */
} else if (c >= '0' && c <= '0' + 7) {/* Write */
char d = c - '0';
sysfsgpio_write(!!(d & 4),
!!(d & 2),
(d & 1));
} else if (c == 'R')
putchar(sysfsgpio_read());
else if (c == 'c') /* SWDIO read */
putchar(sysfsgpio_swdio_read());
else if (c == 'o' || c == 'O') /* SWDIO drive */
sysfsgpio_swdio_drive(c == 'o' ? 0 : 1);
else if (c >= 'd' && c <= 'g') { /* SWD write */
char d = c - 'd';
sysfsgpio_swd_write((d & 2), (d & 1));
}
else
LOG_ERROR("Unknown command '%c' received", c);
}
@ -425,7 +307,7 @@ static void process_remote_protocol(void)
int main(int argc, char *argv[])
{
LOG_WARNING("SysfsGPIO remote_bitbang JTAG+SWD driver\n");
LOG_WARNING("SysfsGPIO remote_bitbang JTAG driver\n");
for (int i = 1; i < argc; i++) {
if (!strcmp(argv[i], "tck"))
@ -467,39 +349,36 @@ int main(int argc, char *argv[])
* Configure TDO as an input, and TDI, TCK, TMS, TRST, SRST
* as outputs. Drive TDI and TCK low, and TMS/TRST/SRST high.
*/
tck_fd = setup_sysfs_gpio(tck_gpio, 1, 0, 0);
tck_fd = setup_sysfs_gpio(tck_gpio, 1, 0);
if (tck_fd < 0)
goto out_error;
tms_fd = setup_sysfs_gpio(tms_gpio, 1, 1, 1);
tms_fd = setup_sysfs_gpio(tms_gpio, 1, 1);
if (tms_fd < 0)
goto out_error;
last_tms_drive = 0;
tdi_fd = setup_sysfs_gpio(tdi_gpio, 1, 0, 0);
tdi_fd = setup_sysfs_gpio(tdi_gpio, 1, 0);
if (tdi_fd < 0)
goto out_error;
tdo_fd = setup_sysfs_gpio(tdo_gpio, 0, 0, 0);
tdo_fd = setup_sysfs_gpio(tdo_gpio, 0, 0);
if (tdo_fd < 0)
goto out_error;
/* assume active low */
if (trst_gpio > 0) {
trst_fd = setup_sysfs_gpio(trst_gpio, 1, 1, 0);
trst_fd = setup_sysfs_gpio(trst_gpio, 1, 1);
if (trst_fd < 0)
goto out_error;
}
/* assume active low */
if (srst_gpio > 0) {
srst_fd = setup_sysfs_gpio(srst_gpio, 1, 1, 0);
srst_fd = setup_sysfs_gpio(srst_gpio, 1, 1);
if (srst_fd < 0)
goto out_error;
}
last_initialized = 0;
LOG_WARNING("SysfsGPIO nums: tck = %d, tms = %d, tdi = %d, tdo = %d",
tck_gpio, tms_gpio, tdi_gpio, tdo_gpio);
LOG_WARNING("SysfsGPIO num: srst = %d", srst_gpio);

View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: CC0-1.0
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Since at least FreeRTOS V7.5.3 uxTopUsedPriority is no longer

View File

@ -1,13 +1,4 @@
// SPDX-License-Identifier: Apache-2.0
/*
* The original version of this file did not reported any license nor
* copyright, but the author clearly stated that:
* "This file should be linked along with the [uC/OS-III user's] project
* to enable RTOS support for uC/OS-III."
* Such statement implies the willing to have this file's license compatible
* with the license Apache 2.0 of uC/OS-III.
*/
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* uC/OS-III does not provide a fixed layout for OS_TCB, which makes it

View File

@ -1,5 +1,3 @@
# SPDX-License-Identifier: GPL-2.0-or-later
info_TEXINFOS += %D%/openocd.texi
%C%_openocd_TEXINFOS = %D%/fdl.texi

View File

@ -79,8 +79,6 @@ command handlers and helpers:
- @c CMD_NAME - invoked command name
- @c CMD_ARGC - the number of command arguments
- @c CMD_ARGV - array of command argument strings
- @c CMD_JIMTCL_ARGV - array containing the Jim_Obj equivalent of command
argument in @c CMD_ARGV.
@section helpercmdregister Command Registration

View File

@ -1,19 +1,15 @@
/** @remote_bitbangpage OpenOCD Developer's Guide
The remote_bitbang JTAG+SWD driver is used to drive JTAG and/or SWD from a
remote process. The remote_bitbang driver communicates via TCP or UNIX
sockets with some remote process using an ASCII encoding of the bitbang
interface. The remote process presumably then drives the JTAG/SWD however
it pleases. The remote process should act as a server, listening for
connections from the openocd remote_bitbang driver.
The remote_bitbang JTAG driver is used to drive JTAG from a remote process. The
remote_bitbang driver communicates via TCP or UNIX sockets with some remote
process using an ASCII encoding of the bitbang interface. The remote process
presumably then drives the JTAG however it pleases. The remote process should
act as a server, listening for connections from the openocd remote_bitbang
driver.
The remote bitbang driver is useful for debugging software running on
processors which are being simulated.
There also is an implementation of the server-side protocol for the
Glasgow Debug Tool (https://github.com/glasgowEmbedded/Glasgow) through
the jtag-openocd applet.
The bitbang interface consists of the following functions.
blink on
@ -28,25 +24,12 @@ write tck tms tdi
reset trst srst
Set the value of trst, srst.
swdio_drive
Set the output enable of the bidirectional swdio (tms) pin
swdio_read
Sample the value of swdio (tms).
swd_write
Set the value of swclk (tck) and swdio (tms).
(optional) sleep
Instructs the remote host to sleep/idle for some period of time before
executing the next request
An additional function, quit, is added to the remote_bitbang interface to
indicate there will be no more requests and the connection with the remote
driver should be closed.
The eight mandatory functions are encoded in ASCII by assigning a single
character to each possible request. The assignments are:
These five functions are encoded in ASCII by assigning a single character to
each possible request. The assignments are:
B - Blink on
b - Blink off
@ -64,25 +47,7 @@ character to each possible request. The assignments are:
s - Reset 0 1
t - Reset 1 0
u - Reset 1 1
O - SWDIO drive 1
o - SWDIO drive 0
c - SWDIO read request
d - SWD write 0 0
e - SWD write 0 1
f - SWD write 1 0
g - SWD write 1 1
The read responses are encoded in ASCII as either digit 0 or 1.
If the use_remote_sleep option is set to 'yes', two additional requests may
be sent:
Z - Sleep for 1 millisecond
z - Sleep for 1 microsecond
NOTE: Previously these were specified as 'D' and 'd', which conflicts with the
"SWD write 0 0" command defined above. Adapters that implement Dd for remote
sleep must be updated to work with Zz.
The read response is encoded in ASCII as either digit 0 or 1.
*/

View File

@ -97,21 +97,6 @@ OpenOCD project.
x = 0;
}
@endcode
- on <tt> if </tt> statements where the condition is split among multiple
lines, increase the indentation of the condition to prevent it to match
to the indentation of the <tt> then </tt> block due to length of 'if ('
being same of the TAB width of 4 characters. Use:
@code
if (CMD_ARGC < 3
|| CMD_ARGC > 8)
return ERROR_COMMAND_SYNTAX_ERROR;
@endcode
instead of:
@code
if (CMD_ARGC < 3 ||
CMD_ARGC > 8)
return ERROR_COMMAND_SYNTAX_ERROR;
@endcode
Finally, try to avoid lines of code that are longer than 72-80 columns:
@ -126,8 +111,8 @@ Finally, try to avoid lines of code that are longer than 72-80 columns:
@section stylenames Naming Rules
- most identifiers must use lower-case letters (and digits) only.
- macros and enumerators must use upper-case letters (and digits) only.
- OpenOCD identifiers should NEVER use @c MixedCaps, aka @c CamelCase.
- macros must use upper-case letters (and digits) only.
- OpenOCD identifiers should NEVER use @c MixedCaps.
- @c typedef names must end with the '_t' suffix.
- This should be reserved for types that should be passed by value.
- Do @b not mix the typedef keyword with @c struct.
@ -225,21 +210,6 @@ if (!buf) {
}
@endcode
@section stylelogging Logging
Logging is intended to provide human-readable information to users.
Do not confuse logging with the output of commands.
The latter is intended for the result of a command and should be able to be processed by Tcl scripts.
- Use one of the following functions to generate log messages, never use `printf()` or similar functions.
- Use `LOG_ERROR()` to provide information in case an operation failed in an unrecoverable way. For example, if necessary memory cannot be allocated.
- Use `LOG_WARNING()` to inform the user of about an unexpected behavior that can be handled and the intended operation is still be performed. For example, in case a command is deprecated but is nevertheless executed.
- Use `LOG_INFO()` to provide insightful or necessary information to the user. For example, features or capabilities of a discovered target.
- Use `LOG_DEBUG()` to provide information for troubleshooting. For example, detailed information which makes it easier to debug a specific operation. Try to avoid flooding the log with frequently generated messages. For example, do not use LOG_DEBUG() in operations used for polling the target. Use LOG_DEBUG_IO() for such frequent messages.
- Use `LOG_DEBUG_IO()` to provide I/O related information for troubleshooting. For example, details about the communication between OpenOCD and a debug adapter.
- If the log message is related to a target, use the corresponding `LOG_TARGET_xxx()` functions.
- Do not use a period or exclamation mark at the end of a message.
*/
/** @page styledoxygen Doxygen Style Guide

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@ -1,21 +1,24 @@
.TH "OPENOCD" "1" "June 18, 2024"
.TH "OPENOCD" "1" "November 24, 2009"
.SH "NAME"
openocd \- A free and open on\-chip debugging, in\-system programming and
boundary\-scan testing tool for microcontrollers and other embedded devices
boundary\-scan testing tool for ARM and MIPS systems
.SH "SYNOPSIS"
.B openocd \fR[\fB\-fsdlchv\fR] [\fB\-\-file\fR <filename>] [\fB\-\-search\fR <dirname>] [\fB\-\-debug\fR <debuglevel>] [\fB\-\-log_output\fR <filename>] [\fB\-\-command\fR <cmd>] [\fB\-\-help\fR] [\fB\-\-version\fR]
.B openocd \fR[\fB\-fsdlcphv\fR] [\fB\-\-file\fR <filename>] [\fB\-\-search\fR <dirname>] [\fB\-\-debug\fR <debuglevel>] [\fB\-\-log_output\fR <filename>] [\fB\-\-command\fR <cmd>] [\fB\-\-pipe\fR] [\fB\-\-help\fR] [\fB\-\-version\fR]
.SH "DESCRIPTION"
.B OpenOCD
is an on\-chip debugging, in\-system programming and boundary\-scan
testing tool for various microcontrollers and other embedded devices.
testing tool for various ARM and MIPS systems.
.PP
Various different types of debug adapters as well as transport protocols like
JTAG and SWD are supported by OpenOCD, please check the \fIopenocd\fR info page
for the complete list.
The debugger uses an IEEE 1149\-1 compliant JTAG TAP bus master to access
on\-chip debug functionality available on ARM based microcontrollers or
system-on-chip solutions. For MIPS systems the EJTAG interface is supported.
.PP
User interaction is realized through a telnet command line interface,
a gdb (the GNU debugger) remote protocol server, and a simplified RPC
connection that can be used to interface with OpenOCD's Jim Tcl engine.
.PP
OpenOCD supports various different types of JTAG interfaces/programmers,
please check the \fIopenocd\fR info page for the complete list.
.SH "OPTIONS"
.TP
.B "\-f, \-\-file <filename>"
@ -65,6 +68,8 @@ Note that you will need to explicitly invoke
.I init
if the command requires access to a target or flash.
.TP
.B "\-p, \-\-pipe"
Use pipes when talking to gdb.
.TP
.B "\-h, \-\-help"
Show a help text and exit.
@ -77,6 +82,8 @@ Please report any bugs on the mailing list at
.SH "LICENCE"
.B OpenOCD
is covered by the GNU General Public License (GPL), version 2 or later.
.SH "SEE ALSO"
.BR jtag (1)
.PP
The full documentation for
.B openocd

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@ -1,98 +0,0 @@
# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
Bus 002 Device 105: ID 584e:414f NanoXplore, SAS. ANGIE Adapter
Device Descriptor:
bLength 18
bDescriptorType 1
bcdUSB 2.00
bDeviceClass 239 Miscellaneous Device
bDeviceSubClass 2
bDeviceProtocol 1 Interface Association
bMaxPacketSize0 64
idVendor 0x584e
idProduct 0x414f
bcdDevice 0.00
iManufacturer 1 NanoXplore, SAS.
iProduct 2 ANGIE Adapter
iSerial 3 000001
bNumConfigurations 1
Configuration Descriptor:
bLength 9
bDescriptorType 2
wTotalLength 0x0047
bNumInterfaces 2
bConfigurationValue 1
iConfiguration 1 NanoXplore, SAS.
bmAttributes 0x80
(Bus Powered)
MaxPower 100mA
Interface Descriptor:
bLength 9
bDescriptorType 4
bInterfaceNumber 0
bAlternateSetting 0
bNumEndpoints 3
bInterfaceClass 255 Vendor Specific Class
bInterfaceSubClass 0
bInterfaceProtocol 0
iInterface 4 JTAG Adapter
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x01 EP 1 OUT
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0040 1x 64 bytes
bInterval 0
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x81 EP 1 IN
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0040 1x 64 bytes
bInterval 0
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x02 EP 2 OUT
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0200 1x 512 bytes
bInterval 0
Interface Descriptor:
bLength 9
bDescriptorType 4
bInterfaceNumber 1
bAlternateSetting 0
bNumEndpoints 2
bInterfaceClass 10 CDC Data
bInterfaceSubClass 0
bInterfaceProtocol 0
iInterface 0
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x06 EP 6 OUT
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0200 1x 512 bytes
bInterval 0
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x88 EP 8 IN
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0200 1x 512 bytes
bInterval 0

View File

@ -1,211 +0,0 @@
# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
# Optional comment
Bus 001 Device 006: ID 03eb:2111 Atmel Corp. Xplained Pro board debugger and programmer
Device Descriptor:
bLength 18
bDescriptorType 1
bcdUSB 2.00
bDeviceClass 239 Miscellaneous Device
bDeviceSubClass 2
bDeviceProtocol 1 Interface Association
bMaxPacketSize0 64
idVendor 0x03eb Atmel Corp.
idProduct 0x2111 Xplained Pro board debugger and programmer
bcdDevice 1.01
iManufacturer 1 Atmel Corp.
iProduct 2 EDBG CMSIS-DAP
iSerial 3 ATMLxxxxxxxxxxxxxxxx
bNumConfigurations 1
Configuration Descriptor:
bLength 9
bDescriptorType 2
wTotalLength 0x0082
bNumInterfaces 4
bConfigurationValue 1
iConfiguration 0
bmAttributes 0x80
(Bus Powered)
MaxPower 500mA
Interface Descriptor:
bLength 9
bDescriptorType 4
bInterfaceNumber 0
bAlternateSetting 0
bNumEndpoints 2
bInterfaceClass 3 Human Interface Device
bInterfaceSubClass 0
bInterfaceProtocol 0
iInterface 4 EDBG CMSIS-DAP
HID Device Descriptor:
bLength 9
bDescriptorType 33
bcdHID 1.11
bCountryCode 0 Not supported
bNumDescriptors 1
bDescriptorType 34 Report
wDescriptorLength 35
Report Descriptor: (length is 35)
Item(Global): Usage Page, data= [ 0x00 0xff ] 65280
(null)
Item(Local ): Usage, data= [ 0x01 ] 1
(null)
Item(Main ): Collection, data= [ 0x01 ] 1
Application
Item(Global): Logical Minimum, data= [ 0x00 ] 0
Item(Global): Logical Maximum, data= [ 0xff 0x00 ] 255
Item(Global): Report Size, data= [ 0x08 ] 8
Item(Global): Report Count, data= [ 0x00 0x02 ] 512
Item(Local ): Usage, data= [ 0x01 ] 1
(null)
Item(Main ): Input, data= [ 0x02 ] 2
Data Variable Absolute No_Wrap Linear
Preferred_State No_Null_Position Non_Volatile Bitfield
Item(Global): Report Count, data= [ 0x00 0x02 ] 512
Item(Local ): Usage, data= [ 0x01 ] 1
(null)
Item(Main ): Output, data= [ 0x02 ] 2
Data Variable Absolute No_Wrap Linear
Preferred_State No_Null_Position Non_Volatile Bitfield
Item(Global): Report Count, data= [ 0x04 ] 4
Item(Local ): Usage, data= [ 0x01 ] 1
(null)
Item(Main ): Feature, data= [ 0x02 ] 2
Data Variable Absolute No_Wrap Linear
Preferred_State No_Null_Position Non_Volatile Bitfield
Item(Main ): End Collection, data=none
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x01 EP 1 OUT
bmAttributes 3
Transfer Type Interrupt
Synch Type None
Usage Type Data
wMaxPacketSize 0x0200 1x 512 bytes
bInterval 1
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x82 EP 2 IN
bmAttributes 3
Transfer Type Interrupt
Synch Type None
Usage Type Data
wMaxPacketSize 0x0200 1x 512 bytes
bInterval 1
Interface Association:
bLength 8
bDescriptorType 11
bFirstInterface 1
bInterfaceCount 2
bFunctionClass 2 Communications
bFunctionSubClass 2 Abstract (modem)
bFunctionProtocol 1 AT-commands (v.25ter)
iFunction 6 EDBG Virtual COM Port
Interface Descriptor:
bLength 9
bDescriptorType 4
bInterfaceNumber 1
bAlternateSetting 0
bNumEndpoints 1
bInterfaceClass 2 Communications
bInterfaceSubClass 2 Abstract (modem)
bInterfaceProtocol 1 AT-commands (v.25ter)
iInterface 0
CDC Header:
bcdCDC 1.10
CDC ACM:
bmCapabilities 0x06
sends break
line coding and serial state
CDC Union:
bMasterInterface 1
bSlaveInterface 2
CDC Call Management:
bmCapabilities 0x03
call management
use DataInterface
bDataInterface 2
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x83 EP 3 IN
bmAttributes 3
Transfer Type Interrupt
Synch Type None
Usage Type Data
wMaxPacketSize 0x0040 1x 64 bytes
bInterval 8
Interface Descriptor:
bLength 9
bDescriptorType 4
bInterfaceNumber 2
bAlternateSetting 0
bNumEndpoints 2
bInterfaceClass 10 CDC Data
bInterfaceSubClass 0
bInterfaceProtocol 0
iInterface 0
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x84 EP 4 IN
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0040 1x 64 bytes
bInterval 0
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x05 EP 5 OUT
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0040 1x 64 bytes
bInterval 0
Interface Descriptor:
bLength 9
bDescriptorType 4
bInterfaceNumber 3
bAlternateSetting 0
bNumEndpoints 2
bInterfaceClass 255 Vendor Specific Class
bInterfaceSubClass 255 Vendor Specific Subclass
bInterfaceProtocol 255 Vendor Specific Protocol
iInterface 5 EDBG Data Gateway
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x87 EP 7 IN
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0200 1x 512 bytes
bInterval 255
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x06 EP 6 OUT
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0200 1x 512 bytes
bInterval 255
Device Qualifier (for other device speed):
bLength 10
bDescriptorType 6
bcdUSB 2.00
bDeviceClass 239 Miscellaneous Device
bDeviceSubClass 2
bDeviceProtocol 1 Interface Association
bMaxPacketSize0 64
bNumConfigurations 1
Device Status: 0x0000
(Bus Powered)

View File

@ -1,211 +0,0 @@
# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
# Optional comment
Bus 001 Device 005: ID 03eb:2169 Atmel Corp. EDBG CMSIS-DAP
Device Descriptor:
bLength 18
bDescriptorType 1
bcdUSB 2.00
bDeviceClass 239 Miscellaneous Device
bDeviceSubClass 2
bDeviceProtocol 1 Interface Association
bMaxPacketSize0 64
idVendor 0x03eb Atmel Corp.
idProduct 0x2169
bcdDevice 1.01
iManufacturer 1 Atmel Corp.
iProduct 2 EDBG CMSIS-DAP
iSerial 3 ATMLxxxxxxxxxxxxxxxx
bNumConfigurations 1
Configuration Descriptor:
bLength 9
bDescriptorType 2
wTotalLength 0x0082
bNumInterfaces 4
bConfigurationValue 1
iConfiguration 0
bmAttributes 0x80
(Bus Powered)
MaxPower 500mA
Interface Descriptor:
bLength 9
bDescriptorType 4
bInterfaceNumber 0
bAlternateSetting 0
bNumEndpoints 2
bInterfaceClass 3 Human Interface Device
bInterfaceSubClass 0
bInterfaceProtocol 0
iInterface 4 EDBG CMSIS-DAP
HID Device Descriptor:
bLength 9
bDescriptorType 33
bcdHID 1.11
bCountryCode 0 Not supported
bNumDescriptors 1
bDescriptorType 34 Report
wDescriptorLength 35
Report Descriptor: (length is 35)
Item(Global): Usage Page, data= [ 0x00 0xff ] 65280
(null)
Item(Local ): Usage, data= [ 0x01 ] 1
(null)
Item(Main ): Collection, data= [ 0x01 ] 1
Application
Item(Global): Logical Minimum, data= [ 0x00 ] 0
Item(Global): Logical Maximum, data= [ 0xff 0x00 ] 255
Item(Global): Report Size, data= [ 0x08 ] 8
Item(Global): Report Count, data= [ 0x00 0x02 ] 512
Item(Local ): Usage, data= [ 0x01 ] 1
(null)
Item(Main ): Input, data= [ 0x02 ] 2
Data Variable Absolute No_Wrap Linear
Preferred_State No_Null_Position Non_Volatile Bitfield
Item(Global): Report Count, data= [ 0x00 0x02 ] 512
Item(Local ): Usage, data= [ 0x01 ] 1
(null)
Item(Main ): Output, data= [ 0x02 ] 2
Data Variable Absolute No_Wrap Linear
Preferred_State No_Null_Position Non_Volatile Bitfield
Item(Global): Report Count, data= [ 0x04 ] 4
Item(Local ): Usage, data= [ 0x01 ] 1
(null)
Item(Main ): Feature, data= [ 0x02 ] 2
Data Variable Absolute No_Wrap Linear
Preferred_State No_Null_Position Non_Volatile Bitfield
Item(Main ): End Collection, data=none
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x01 EP 1 OUT
bmAttributes 3
Transfer Type Interrupt
Synch Type None
Usage Type Data
wMaxPacketSize 0x0200 1x 512 bytes
bInterval 1
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x82 EP 2 IN
bmAttributes 3
Transfer Type Interrupt
Synch Type None
Usage Type Data
wMaxPacketSize 0x0200 1x 512 bytes
bInterval 1
Interface Association:
bLength 8
bDescriptorType 11
bFirstInterface 1
bInterfaceCount 2
bFunctionClass 2 Communications
bFunctionSubClass 2 Abstract (modem)
bFunctionProtocol 1 AT-commands (v.25ter)
iFunction 6 EDBG Virtual COM Port
Interface Descriptor:
bLength 9
bDescriptorType 4
bInterfaceNumber 1
bAlternateSetting 0
bNumEndpoints 1
bInterfaceClass 2 Communications
bInterfaceSubClass 2 Abstract (modem)
bInterfaceProtocol 1 AT-commands (v.25ter)
iInterface 0
CDC Header:
bcdCDC 1.10
CDC ACM:
bmCapabilities 0x06
sends break
line coding and serial state
CDC Union:
bMasterInterface 1
bSlaveInterface 2
CDC Call Management:
bmCapabilities 0x03
call management
use DataInterface
bDataInterface 2
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x83 EP 3 IN
bmAttributes 3
Transfer Type Interrupt
Synch Type None
Usage Type Data
wMaxPacketSize 0x0040 1x 64 bytes
bInterval 8
Interface Descriptor:
bLength 9
bDescriptorType 4
bInterfaceNumber 2
bAlternateSetting 0
bNumEndpoints 2
bInterfaceClass 10 CDC Data
bInterfaceSubClass 0
bInterfaceProtocol 0
iInterface 0
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x84 EP 4 IN
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0040 1x 64 bytes
bInterval 0
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x05 EP 5 OUT
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0040 1x 64 bytes
bInterval 0
Interface Descriptor:
bLength 9
bDescriptorType 4
bInterfaceNumber 3
bAlternateSetting 0
bNumEndpoints 2
bInterfaceClass 8 Mass Storage
bInterfaceSubClass 6 SCSI
bInterfaceProtocol 80 Bulk-Only
iInterface 0
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x87 EP 7 IN
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0200 1x 512 bytes
bInterval 0
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x06 EP 6 OUT
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0200 1x 512 bytes
bInterval 0
Device Qualifier (for other device speed):
bLength 10
bDescriptorType 6
bcdUSB 2.00
bDeviceClass 239 Miscellaneous Device
bDeviceSubClass 2
bDeviceProtocol 1 Interface Association
bMaxPacketSize0 64
bNumConfigurations 1
Device Status: 0x0000
(Bus Powered)

View File

@ -76,35 +76,8 @@ Device Descriptor:
bNumDescriptors 1
bDescriptorType 34 Report
wDescriptorLength 33
Report Descriptor: (length is 33)
Item(Global): Usage Page, data= [ 0x00 0xff ] 65280
(null)
Item(Local ): Usage, data= [ 0x01 ] 1
(null)
Item(Main ): Collection, data= [ 0x01 ] 1
Application
Item(Global): Logical Minimum, data= [ 0x00 ] 0
Item(Global): Logical Maximum, data= [ 0xff 0x00 ] 255
Item(Global): Report Size, data= [ 0x08 ] 8
Item(Global): Report Count, data= [ 0x40 ] 64
Item(Local ): Usage, data= [ 0x01 ] 1
(null)
Item(Main ): Input, data= [ 0x02 ] 2
Data Variable Absolute No_Wrap Linear
Preferred_State No_Null_Position Non_Volatile Bitfield
Item(Global): Report Count, data= [ 0x40 ] 64
Item(Local ): Usage, data= [ 0x01 ] 1
(null)
Item(Main ): Output, data= [ 0x02 ] 2
Data Variable Absolute No_Wrap Linear
Preferred_State No_Null_Position Non_Volatile Bitfield
Item(Global): Report Count, data= [ 0x01 ] 1
Item(Local ): Usage, data= [ 0x01 ] 1
(null)
Item(Main ): Feature, data= [ 0x02 ] 2
Data Variable Absolute No_Wrap Linear
Preferred_State No_Null_Position Non_Volatile Bitfield
Item(Main ): End Collection, data=none
Report Descriptors:
** UNAVAILABLE **
Endpoint Descriptor:
bLength 7
bDescriptorType 5

View File

@ -46,35 +46,8 @@ Device Descriptor:
bNumDescriptors 1
bDescriptorType 34 Report
wDescriptorLength 33
Report Descriptor: (length is 33)
Item(Global): Usage Page, data= [ 0x00 0xff ] 65280
(null)
Item(Local ): Usage, data= [ 0x01 ] 1
(null)
Item(Main ): Collection, data= [ 0x01 ] 1
Application
Item(Global): Logical Minimum, data= [ 0x00 ] 0
Item(Global): Logical Maximum, data= [ 0xff 0x00 ] 255
Item(Global): Report Size, data= [ 0x08 ] 8
Item(Global): Report Count, data= [ 0x40 ] 64
Item(Local ): Usage, data= [ 0x01 ] 1
(null)
Item(Main ): Input, data= [ 0x02 ] 2
Data Variable Absolute No_Wrap Linear
Preferred_State No_Null_Position Non_Volatile Bitfield
Item(Global): Report Count, data= [ 0x40 ] 64
Item(Local ): Usage, data= [ 0x01 ] 1
(null)
Item(Main ): Output, data= [ 0x02 ] 2
Data Variable Absolute No_Wrap Linear
Preferred_State No_Null_Position Non_Volatile Bitfield
Item(Global): Report Count, data= [ 0x01 ] 1
Item(Local ): Usage, data= [ 0x01 ] 1
(null)
Item(Main ): Feature, data= [ 0x02 ] 2
Data Variable Absolute No_Wrap Linear
Preferred_State No_Null_Position Non_Volatile Bitfield
Item(Main ): End Collection, data=none
Report Descriptors:
** UNAVAILABLE **
Endpoint Descriptor:
bLength 7
bDescriptorType 5

View File

@ -1,22 +1,6 @@
#!/bin/sh
# SPDX-License-Identifier: GPL-2.0-or-later
hid_unavailable_report() {
a=$(echo $1 | tr '[:lower:]' '[:upper:]')
b=$(basename $(dirname $(ls -d /sys/bus/usb/drivers/usbhid/*/*:$a.*)))
echo ""
echo "ATTENTION!"
echo "Unable to read completely the USB descriptors."
echo "Please run the following command(s) and then run this script again"
for i in $b; do
echo " sudo sh -c \"echo -n $i > /sys/bus/usb/drivers/usbhid/unbind\""
done
echo ""
echo "Please notice that the USB device will not function after the above"
echo "operations; you should unplug and replug it to get it working again."
}
devs=$(lsusb -d $1:$2 | wc -l)
case "$devs" in
0 )
@ -38,5 +22,3 @@ echo ''
echo '# Optional comment'
lsusb -v -d $1:$2 | sed 's/ *$//'
lsusb -v -d $1:$2 2>&1 | grep -Fq '** UNAVAILABLE **' && (hid_unavailable_report $1:$2 > /dev/stderr)

View File

@ -47,32 +47,8 @@ Device Descriptor:
bNumDescriptors 1
bDescriptorType 34 Report
wDescriptorLength 28
Report Descriptor: (length is 28)
Item(Global): Usage Page, data= [ 0x01 ] 1
Generic Desktop Controls
Item(Local ): Usage, data= [ 0x00 ] 0
Undefined
Item(Main ): Collection, data= [ 0x01 ] 1
Application
Item(Global): Logical Minimum, data= [ 0x00 ] 0
Item(Global): Logical Maximum, data= [ 0xff 0x00 ] 255
Item(Local ): Usage Minimum, data= [ 0x00 ] 0
Undefined
Item(Local ): Usage Maximum, data= [ 0x00 ] 0
Undefined
Item(Global): Report Size, data= [ 0x08 ] 8
Item(Global): Report Count, data= [ 0x40 ] 64
Item(Main ): Input, data= [ 0x02 ] 2
Data Variable Absolute No_Wrap Linear
Preferred_State No_Null_Position Non_Volatile Bitfield
Item(Local ): Usage Minimum, data= [ 0x00 ] 0
Undefined
Item(Local ): Usage Maximum, data= [ 0x00 ] 0
Undefined
Item(Main ): Output, data= [ 0x02 ] 2
Data Variable Absolute No_Wrap Linear
Preferred_State No_Null_Position Non_Volatile Bitfield
Item(Main ): End Collection, data=none
Report Descriptors:
** UNAVAILABLE **
Endpoint Descriptor:
bLength 7
bDescriptorType 5

View File

@ -16,7 +16,7 @@ Device Descriptor:
idProduct 0x5200 Nuvoton Nu-Link2-ME ICE/MSC/VCOM
bcdDevice 0.00
iManufacturer 1 Nuvoton
iProduct 9 Nu-Link2
iProduct 2 Nu-Link2 Bulk
iSerial 6 13010000AAAAAAAAAAAAAAAAAAAAAAAA
bNumConfigurations 1
Configuration Descriptor:
@ -38,7 +38,7 @@ Device Descriptor:
bInterfaceClass 255 Vendor Specific Class
bInterfaceSubClass 0
bInterfaceProtocol 0
iInterface 2 Nu-Link2 Bulk
iInterface 0
Endpoint Descriptor:
bLength 7
bDescriptorType 5
@ -146,35 +146,8 @@ Device Descriptor:
bNumDescriptors 1
bDescriptorType 34 Report
wDescriptorLength 35
Report Descriptor: (length is 35)
Item(Global): Usage Page, data= [ 0x06 0xff ] 65286
(null)
Item(Local ): Usage, data= [ 0x01 ] 1
(null)
Item(Main ): Collection, data= [ 0x01 ] 1
Application
Item(Global): Logical Minimum, data= [ 0x00 ] 0
Item(Global): Logical Maximum, data= [ 0xff 0x00 ] 255
Item(Global): Report Size, data= [ 0x08 ] 8
Item(Global): Report Count, data= [ 0x00 0x04 ] 1024
Item(Local ): Usage, data= [ 0x01 ] 1
(null)
Item(Main ): Input, data= [ 0x02 ] 2
Data Variable Absolute No_Wrap Linear
Preferred_State No_Null_Position Non_Volatile Bitfield
Item(Global): Report Count, data= [ 0x00 0x04 ] 1024
Item(Local ): Usage, data= [ 0x01 ] 1
(null)
Item(Main ): Output, data= [ 0x02 ] 2
Data Variable Absolute No_Wrap Linear
Preferred_State No_Null_Position Non_Volatile Bitfield
Item(Global): Report Count, data= [ 0x08 ] 8
Item(Local ): Usage, data= [ 0x01 ] 1
(null)
Item(Main ): Feature, data= [ 0x02 ] 2
Data Variable Absolute No_Wrap Linear
Preferred_State No_Null_Position Non_Volatile Bitfield
Item(Main ): End Collection, data=none
Report Descriptors:
** UNAVAILABLE **
Endpoint Descriptor:
bLength 7
bDescriptorType 5

View File

@ -1,71 +0,0 @@
# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
# STLINK-V3PWR standalone in firmware update mode
Bus 003 Device 054: ID 0483:3755 STMicroelectronics USB2.0 Hub
Device Descriptor:
bLength 18
bDescriptorType 1
bcdUSB 2.00
bDeviceClass 0
bDeviceSubClass 0
bDeviceProtocol 0
bMaxPacketSize0 64
idVendor 0x0483 STMicroelectronics
idProduct 0x3755
bcdDevice 1.00
iManufacturer 1 STMicroelectronics
iProduct 2 STLINK-V3PWR
iSerial 3 123456780000
bNumConfigurations 1
Configuration Descriptor:
bLength 9
bDescriptorType 2
wTotalLength 0x0020
bNumInterfaces 1
bConfigurationValue 1
iConfiguration 4 DFU Config
bmAttributes 0x80
(Bus Powered)
MaxPower 100mA
Interface Descriptor:
bLength 9
bDescriptorType 4
bInterfaceNumber 0
bAlternateSetting 0
bNumEndpoints 2
bInterfaceClass 255 Vendor Specific Class
bInterfaceSubClass 255 Vendor Specific Subclass
bInterfaceProtocol 255 Vendor Specific Protocol
iInterface 5 ST-Link Usbloader
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x81 EP 1 IN
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0200 1x 512 bytes
bInterval 0
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x01 EP 1 OUT
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0200 1x 512 bytes
bInterval 0
Device Qualifier (for other device speed):
bLength 10
bDescriptorType 6
bcdUSB 2.00
bDeviceClass 0
bDeviceSubClass 0
bDeviceProtocol 0
bMaxPacketSize0 64
bNumConfigurations 1
Device Status: 0x0000
(Bus Powered)

View File

@ -1,253 +0,0 @@
# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later
# STLINK-V3PWR standalone
Bus 003 Device 053: ID 0483:3757 STMicroelectronics USB2.0 Hub
Device Descriptor:
bLength 18
bDescriptorType 1
bcdUSB 2.00
bDeviceClass 239 Miscellaneous Device
bDeviceSubClass 2
bDeviceProtocol 1 Interface Association
bMaxPacketSize0 64
idVendor 0x0483 STMicroelectronics
idProduct 0x3757
bcdDevice 1.00
iManufacturer 1 STMicroelectronics
iProduct 2 STLINK-V3PWR
iSerial 3 123456780000
bNumConfigurations 1
Configuration Descriptor:
bLength 9
bDescriptorType 2
wTotalLength 0x00c2
bNumInterfaces 6
bConfigurationValue 1
iConfiguration 4 Default Config
bmAttributes 0x80
(Bus Powered)
MaxPower 500mA
Interface Descriptor:
bLength 9
bDescriptorType 4
bInterfaceNumber 0
bAlternateSetting 0
bNumEndpoints 3
bInterfaceClass 255 Vendor Specific Class
bInterfaceSubClass 255 Vendor Specific Subclass
bInterfaceProtocol 255 Vendor Specific Protocol
iInterface 5 ST-Link Debug
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x81 EP 1 IN
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0200 1x 512 bytes
bInterval 0
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x01 EP 1 OUT
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0200 1x 512 bytes
bInterval 0
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x82 EP 2 IN
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0200 1x 512 bytes
bInterval 0
Interface Association:
bLength 8
bDescriptorType 11
bFirstInterface 1
bInterfaceCount 2
bFunctionClass 2 Communications
bFunctionSubClass 2 Abstract (modem)
bFunctionProtocol 1 AT-commands (v.25ter)
iFunction 6 ST-Link VCP Ctrl
Interface Descriptor:
bLength 9
bDescriptorType 4
bInterfaceNumber 1
bAlternateSetting 0
bNumEndpoints 1
bInterfaceClass 2 Communications
bInterfaceSubClass 2 Abstract (modem)
bInterfaceProtocol 1 AT-commands (v.25ter)
iInterface 6 ST-Link VCP Ctrl
CDC Header:
bcdCDC 1.10
CDC Call Management:
bmCapabilities 0x00
bDataInterface 2
CDC ACM:
bmCapabilities 0x06
sends break
line coding and serial state
CDC Union:
bMasterInterface 1
bSlaveInterface 2
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x84 EP 4 IN
bmAttributes 3
Transfer Type Interrupt
Synch Type None
Usage Type Data
wMaxPacketSize 0x000a 1x 10 bytes
bInterval 16
Interface Descriptor:
bLength 9
bDescriptorType 4
bInterfaceNumber 2
bAlternateSetting 0
bNumEndpoints 2
bInterfaceClass 10 CDC Data
bInterfaceSubClass 0
bInterfaceProtocol 0
iInterface 7 ST-Link VCP Data
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x05 EP 5 OUT
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0200 1x 512 bytes
bInterval 0
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x85 EP 5 IN
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0200 1x 512 bytes
bInterval 0
Interface Descriptor:
bLength 9
bDescriptorType 4
bInterfaceNumber 3
bAlternateSetting 0
bNumEndpoints 2
bInterfaceClass 255 Vendor Specific Class
bInterfaceSubClass 255 Vendor Specific Subclass
bInterfaceProtocol 255 Vendor Specific Protocol
iInterface 8 ST-Link Bridge
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x86 EP 6 IN
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0200 1x 512 bytes
bInterval 0
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x06 EP 6 OUT
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0200 1x 512 bytes
bInterval 0
Interface Association:
bLength 8
bDescriptorType 11
bFirstInterface 4
bInterfaceCount 2
bFunctionClass 2 Communications
bFunctionSubClass 2 Abstract (modem)
bFunctionProtocol 1 AT-commands (v.25ter)
iFunction 9 ST-Link VCP-PWR Ctrl
Interface Descriptor:
bLength 9
bDescriptorType 4
bInterfaceNumber 4
bAlternateSetting 0
bNumEndpoints 1
bInterfaceClass 2 Communications
bInterfaceSubClass 2 Abstract (modem)
bInterfaceProtocol 1 AT-commands (v.25ter)
iInterface 9 ST-Link VCP-PWR Ctrl
CDC Header:
bcdCDC 1.10
CDC Call Management:
bmCapabilities 0x00
bDataInterface 5
CDC ACM:
bmCapabilities 0x06
sends break
line coding and serial state
CDC Union:
bMasterInterface 4
bSlaveInterface 5
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x87 EP 7 IN
bmAttributes 3
Transfer Type Interrupt
Synch Type None
Usage Type Data
wMaxPacketSize 0x000a 1x 10 bytes
bInterval 16
Interface Descriptor:
bLength 9
bDescriptorType 4
bInterfaceNumber 5
bAlternateSetting 0
bNumEndpoints 2
bInterfaceClass 10 CDC Data
bInterfaceSubClass 0
bInterfaceProtocol 0
iInterface 10 ST-Link VCP-PWR Data
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x03 EP 3 OUT
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0200 1x 512 bytes
bInterval 0
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x83 EP 3 IN
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0200 1x 512 bytes
bInterval 0
Device Qualifier (for other device speed):
bLength 10
bDescriptorType 6
bcdUSB 2.00
bDeviceClass 0
bDeviceSubClass 0
bDeviceProtocol 0
bMaxPacketSize0 64
bNumConfigurations 1
Device Status: 0x0000
(Bus Powered)

View File

@ -220,28 +220,8 @@ Device Descriptor:
bNumDescriptors 1
bDescriptorType 34 Report
wDescriptorLength 24
Report Descriptor: (length is 24)
Item(Global): Usage Page, data= [ 0x00 0xff ] 65280
(null)
Item(Local ): Usage, data= [ 0x01 ] 1
(null)
Item(Main ): Collection, data= [ 0x01 ] 1
Application
Item(Local ): Usage, data= [ 0x03 ] 3
(null)
Item(Global): Report Size, data= [ 0x08 ] 8
Item(Global): Report Count, data= [ 0x40 ] 64
Item(Main ): Input, data= [ 0x02 ] 2
Data Variable Absolute No_Wrap Linear
Preferred_State No_Null_Position Non_Volatile Bitfield
Item(Local ): Usage, data= [ 0x04 ] 4
(null)
Item(Global): Report Size, data= [ 0x08 ] 8
Item(Global): Report Count, data= [ 0x40 ] 64
Item(Main ): Output, data= [ 0x02 ] 2
Data Variable Absolute No_Wrap Linear
Preferred_State No_Null_Position Non_Volatile Bitfield
Item(Main ): End Collection, data=none
Report Descriptors:
** UNAVAILABLE **
Endpoint Descriptor:
bLength 7
bDescriptorType 5

View File

@ -1,191 +0,0 @@
#!/bin/sh
# From Gerrit Code Review 2.13.5
#
# Part of Gerrit Code Review (https://www.gerritcodereview.com/)
#
# Copyright (C) 2009 The Android Open Source Project
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
unset GREP_OPTIONS
CHANGE_ID_AFTER="Bug|Issue|Test|Feature|Fixes|Fixed"
MSG="$1"
# Check for, and add if missing, a unique Change-Id
#
add_ChangeId() {
clean_message=`sed -e '
/^diff --git .*/{
s///
q
}
/^Signed-off-by:/d
/^#/d
' "$MSG" | git stripspace`
if test -z "$clean_message"
then
return
fi
# Do not add Change-Id to temp commits
if echo "$clean_message" | head -1 | grep -q '^\(fixup\|squash\)!'
then
return
fi
if test "false" = "`git config --bool --get gerrit.createChangeId`"
then
return
fi
# Does Change-Id: already exist? if so, exit (no change).
if grep -i '^Change-Id:' "$MSG" >/dev/null
then
return
fi
id=`_gen_ChangeId`
T="$MSG.tmp.$$"
AWK=awk
if [ -x /usr/xpg4/bin/awk ]; then
# Solaris AWK is just too broken
AWK=/usr/xpg4/bin/awk
fi
# Get core.commentChar from git config or use default symbol
commentChar=`git config --get core.commentChar`
commentChar=${commentChar:-#}
# How this works:
# - parse the commit message as (textLine+ blankLine*)*
# - assume textLine+ to be a footer until proven otherwise
# - exception: the first block is not footer (as it is the title)
# - read textLine+ into a variable
# - then count blankLines
# - once the next textLine appears, print textLine+ blankLine* as these
# aren't footer
# - in END, the last textLine+ block is available for footer parsing
$AWK '
BEGIN {
# while we start with the assumption that textLine+
# is a footer, the first block is not.
isFooter = 0
footerComment = 0
blankLines = 0
}
# Skip lines starting with commentChar without any spaces before it.
/^'"$commentChar"'/ { next }
# Skip the line starting with the diff command and everything after it,
# up to the end of the file, assuming it is only patch data.
# If more than one line before the diff was empty, strip all but one.
/^diff --git / {
blankLines = 0
while (getline) { }
next
}
# Count blank lines outside footer comments
/^$/ && (footerComment == 0) {
blankLines++
next
}
# Catch footer comment
/^\[[a-zA-Z0-9-]+:/ && (isFooter == 1) {
footerComment = 1
}
/]$/ && (footerComment == 1) {
footerComment = 2
}
# We have a non-blank line after blank lines. Handle this.
(blankLines > 0) {
print lines
for (i = 0; i < blankLines; i++) {
print ""
}
lines = ""
blankLines = 0
isFooter = 1
footerComment = 0
}
# Detect that the current block is not the footer
(footerComment == 0) && (!/^\[?[a-zA-Z0-9-]+:/ || /^[a-zA-Z0-9-]+:\/\//) {
isFooter = 0
}
{
# We need this information about the current last comment line
if (footerComment == 2) {
footerComment = 0
}
if (lines != "") {
lines = lines "\n";
}
lines = lines $0
}
# Footer handling:
# If the last block is considered a footer, splice in the Change-Id at the
# right place.
# Look for the right place to inject Change-Id by considering
# CHANGE_ID_AFTER. Keys listed in it (case insensitive) come first,
# then Change-Id, then everything else (eg. Signed-off-by:).
#
# Otherwise just print the last block, a new line and the Change-Id as a
# block of its own.
END {
unprinted = 1
if (isFooter == 0) {
print lines "\n"
lines = ""
}
changeIdAfter = "^(" tolower("'"$CHANGE_ID_AFTER"'") "):"
numlines = split(lines, footer, "\n")
for (line = 1; line <= numlines; line++) {
if (unprinted && match(tolower(footer[line]), changeIdAfter) != 1) {
unprinted = 0
print "Change-Id: I'"$id"'"
}
print footer[line]
}
if (unprinted) {
print "Change-Id: I'"$id"'"
}
}' "$MSG" > "$T" && mv "$T" "$MSG" || rm -f "$T"
}
_gen_ChangeIdInput() {
echo "tree `git write-tree`"
if parent=`git rev-parse "HEAD^0" 2>/dev/null`
then
echo "parent $parent"
fi
echo "author `git var GIT_AUTHOR_IDENT`"
echo "committer `git var GIT_COMMITTER_IDENT`"
echo
printf '%s' "$clean_message"
}
_gen_ChangeId() {
_gen_ChangeIdInput |
git hash-object -t commit --stdin
}
add_ChangeId

View File

@ -1,3 +0,0 @@
#!/bin/sh
./tools/checkpatch.sh

2
jimtcl

@ -1 +1 @@
Subproject commit f160866171457474f7c4d6ccda70f9b77524407e
Subproject commit 1933e5457b9512d39ebbe11ed32578aada149f49

View File

@ -17,12 +17,8 @@ bin_PROGRAMS += %D%/openocd
if INTERNAL_JIMTCL
%C%_openocd_LDADD += $(top_builddir)/jimtcl/libjim.a
else
if HAVE_JIMTCL_PKG_CONFIG
%C%_openocd_LDADD += $(JIMTCL_LIBS)
else
%C%_openocd_LDADD += -ljim
endif
endif
%C%_libopenocd_la_CPPFLAGS =

View File

@ -11,14 +11,14 @@
#include "common.h"
#include <helper/log.h>
unsigned int get_flash_name_index(const char *name)
unsigned get_flash_name_index(const char *name)
{
const char *name_index = strrchr(name, '.');
if (!name_index)
return 0;
if (name_index[1] < '0' || name_index[1] > '9')
return ~0U;
unsigned int requested;
unsigned requested;
int retval = parse_uint(name_index + 1, &requested);
/* detect parsing error by forcing past end of bank list */
return (retval == ERROR_OK) ? requested : ~0U;
@ -26,7 +26,7 @@ unsigned int get_flash_name_index(const char *name)
bool flash_driver_name_matches(const char *name, const char *expected)
{
unsigned int blen = strlen(name);
unsigned blen = strlen(name);
/* only match up to the length of the driver name... */
if (strncmp(name, expected, blen) != 0)
return false;

View File

@ -17,7 +17,7 @@
* name provides a suffix but it does not parse as an unsigned integer,
* the routine returns ~0U. This will prevent further matching.
*/
unsigned int get_flash_name_index(const char *name);
unsigned get_flash_name_index(const char *name);
/**
* Attempt to match the @c expected name with the @c name of a driver.
* @param name The name of the driver (from the bank's device structure).

View File

@ -31,12 +31,12 @@
* @return Success or failure of the operation
*/
static int arm_code_to_working_area(struct target *target,
const uint32_t *code, unsigned int code_size,
unsigned int additional, struct working_area **area)
const uint32_t *code, unsigned code_size,
unsigned additional, struct working_area **area)
{
uint8_t code_buf[code_size];
int retval;
unsigned int size = code_size + additional;
unsigned size = code_size + additional;
/* REVISIT this assumes size doesn't ever change.
* That's usually correct; but there are boards with

View File

@ -27,7 +27,7 @@ struct arm_nand_data {
struct working_area *copy_area;
/** The chunk size is the page size or ECC chunk. */
unsigned int chunk_size;
unsigned chunk_size;
/** Where data is read from or written to. */
uint32_t data;

View File

@ -389,8 +389,9 @@ static int at91sam9_read_page(struct nand_device *nand, uint32_t page,
uint32_t bit = parity & 0x0F;
data[word] ^= (0x1) << bit;
LOG_INFO("Data word %" PRIu32 ", bit %" PRIu32 " corrected.",
word, bit);
LOG_INFO("Data word %d, bit %d corrected.",
(unsigned) word,
(unsigned) bit);
}
}
@ -532,7 +533,7 @@ COMMAND_HANDLER(handle_at91sam9_cle_command)
{
struct nand_device *nand = NULL;
struct at91sam9_nand *info = NULL;
unsigned int num, address_line;
unsigned num, address_line;
if (CMD_ARGC != 2) {
command_print(CMD, "incorrect number of arguments for 'at91sam9 cle' command");
@ -562,7 +563,7 @@ COMMAND_HANDLER(handle_at91sam9_ale_command)
{
struct nand_device *nand = NULL;
struct at91sam9_nand *info = NULL;
unsigned int num, address_line;
unsigned num, address_line;
if (CMD_ARGC != 2)
return ERROR_COMMAND_SYNTAX_ERROR;
@ -590,7 +591,7 @@ COMMAND_HANDLER(handle_at91sam9_rdy_busy_command)
{
struct nand_device *nand = NULL;
struct at91sam9_nand *info = NULL;
unsigned int num, base_pioc, pin_num;
unsigned num, base_pioc, pin_num;
if (CMD_ARGC != 3)
return ERROR_COMMAND_SYNTAX_ERROR;
@ -621,7 +622,7 @@ COMMAND_HANDLER(handle_at91sam9_ce_command)
{
struct nand_device *nand = NULL;
struct at91sam9_nand *info = NULL;
unsigned int num, base_pioc, pin_num;
unsigned num, base_pioc, pin_num;
if (CMD_ARGC != 3)
return ERROR_COMMAND_SYNTAX_ERROR;

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