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Branches Tags
interesting:riscv
interesting:examine_unavailable_harts_rebase
interesting:examine_unavailable_harts_squash
interesting:examine_unavailable_harts
interesting:examine_unavailable_harts_backup
interesting:reset_test
interesting:us_xds110
interesting:hypervisor_translate
interesting:dsp5680_build
interesting:examine_command
interesting:halt_examine
interesting:gd32vf103
interesting:set_group
interesting:macro
interesting:s2_increment
interesting:jlink
interesting:buf_sget
interesting:static
interesting:global
interesting:dmstatus_version
interesting:manual_hwbp
interesting:regcache
interesting:vector2
interesting:busy
interesting:mem64
interesting:bscan_optimization
interesting:debug-log-reg-failure
interesting:reverse-resume-order
interesting:new_bscan_approach
interesting:bscan_tunnel
interesting:log_output
interesting:haltreq
interesting:deinit
interesting:eclipse_memory_read
interesting:old_fixes_and_eclipse_memory_read
interesting:mpsse_flush
interesting:sba_tests
interesting:riscv-compliance
interesting:wip
interesting:riscv-compliance-dev
interesting:compliance_dev
interesting:fence_i_fix_for_release
interesting:rbb_cleanup
interesting:dmi_read
interesting:add_macos_build
interesting:fix_macbuild
interesting:update_defines
interesting:macbuild
interesting:winbuild
interesting:eclipse_multicore_fix
interesting:FE_402_fix
interesting:gdb_next_port
interesting:print_port
interesting:build32
interesting:travis-nop
interesting:old_triggers
interesting:master
interesting:autoconf
interesting:gitignore-build
interesting:multicore
interesting:release
interesting:race
interesting:nohartstatus
interesting:newprogram
interesting:__archive__
interesting:latest
interesting:openocd64-ad4c3e1
interesting:openocd64-8b80fe1
interesting:openocd64-41b9c69e92d9660cb2eff508f3bc8218a3b3e461
interesting:openocd64-d486b21
interesting:v2018.12.0
interesting:v20181030
interesting:v20180928
interesting:v20180629
interesting:v20171231
interesting:v20170818
interesting:v20170621
interesting:v20170612
interesting:v20170608
..
compare: interesting:set_group
Branches Tags
interesting:riscv
interesting:examine_unavailable_harts_rebase
interesting:examine_unavailable_harts_squash
interesting:examine_unavailable_harts
interesting:examine_unavailable_harts_backup
interesting:reset_test
interesting:us_xds110
interesting:hypervisor_translate
interesting:dsp5680_build
interesting:examine_command
interesting:halt_examine
interesting:gd32vf103
interesting:set_group
interesting:macro
interesting:s2_increment
interesting:jlink
interesting:buf_sget
interesting:static
interesting:global
interesting:dmstatus_version
interesting:manual_hwbp
interesting:regcache
interesting:vector2
interesting:busy
interesting:mem64
interesting:bscan_optimization
interesting:debug-log-reg-failure
interesting:reverse-resume-order
interesting:new_bscan_approach
interesting:bscan_tunnel
interesting:log_output
interesting:haltreq
interesting:deinit
interesting:eclipse_memory_read
interesting:old_fixes_and_eclipse_memory_read
interesting:mpsse_flush
interesting:sba_tests
interesting:riscv-compliance
interesting:wip
interesting:riscv-compliance-dev
interesting:compliance_dev
interesting:fence_i_fix_for_release
interesting:rbb_cleanup
interesting:dmi_read
interesting:add_macos_build
interesting:fix_macbuild
interesting:update_defines
interesting:macbuild
interesting:winbuild
interesting:eclipse_multicore_fix
interesting:FE_402_fix
interesting:gdb_next_port
interesting:print_port
interesting:build32
interesting:travis-nop
interesting:old_triggers
interesting:master
interesting:autoconf
interesting:gitignore-build
interesting:multicore
interesting:release
interesting:race
interesting:nohartstatus
interesting:newprogram
interesting:__archive__
interesting:latest
interesting:openocd64-ad4c3e1
interesting:openocd64-8b80fe1
interesting:openocd64-41b9c69e92d9660cb2eff508f3bc8218a3b3e461
interesting:openocd64-d486b21
interesting:v2018.12.0
interesting:v20181030
interesting:v20180928
interesting:v20180629
interesting:v20171231
interesting:v20170818
interesting:v20170621
interesting:v20170612
interesting:v20170608

3 Commits
riscv ... set_group

Author SHA1 Message Date
Tim Newsome 103c1bc922 Style changes suggested in review. 
Change-Id: I29e83d3dbef09cb971ec0355aff733191a6e4679
Signed-off-by: Tim Newsome <tim@sifive.com>
 2022-05-06 09:57:14 -07:00
Tim Newsome ecd736dc53 Properly use enum. 
Change-Id: I0edef6053fac388db38a22fe7557623fa93ec705
Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
 2022-05-06 09:56:47 -07:00
Tim Newsome e191bccc73 Change set_haltgroup() to more general set_group() 
Change-Id: Ib91a252ac63604e54b756f70c549ccd47241fd10
Signed-off-by: Tim Newsome <tim@sifive.com>
 2022-05-04 10:44:09 -07:00
1916 changed files with 57054 additions and 108520 deletions
Show Stats Expand all files Collapse all files

28
.checkpatch.conf
View File

@ -1,28 +0,0 @@
# SPDX-License-Identifier: GPL-2.0-or-later
--max-line-length=120
--tab-size=4
--show-types
--strict
--typedefsfile tools/scripts/typedefs.txt
--ignore AVOID_EXTERNS
--ignore BLOCK_COMMENT_STYLE
--ignore COMPLEX_MACRO
--ignore CONST_STRUCT
--ignore ENOSYS
--ignore FILE_PATH_CHANGES
--ignore GERRIT_CHANGE_ID
--ignore LINE_SPACING
--ignore LOGICAL_CONTINUATIONS
--ignore MACRO_WITH_FLOW_CONTROL
--ignore PARENTHESIS_ALIGNMENT
--ignore PREFER_DEFINED_ATTRIBUTE_MACRO
--ignore PREFER_FALLTHROUGH
--ignore PREFER_KERNEL_TYPES
--ignore SPLIT_STRING
--ignore SSCANF_TO_KSTRTO
--ignore SWITCH_CASE_INDENT_LEVEL
--ignore TRACING_LOGGING
--ignore VOLATILE

17
.github/workflows/checkpatch.yml vendored
View File

@ -10,17 +10,18 @@ jobs:
BUILD_DIR: ../build
steps:
- name: Checkout Code
uses: actions/checkout@v4
uses: actions/checkout@v2
with:
fetch-depth: 0
- name: Checkout Base
run: |
git fetch origin ${{ github.event.pull_request.base.ref }}
echo "The current base for checkpatch is: $(git show FETCH_HEAD --oneline --raw)"
fetch-depth: 50
- name: Install required packages (apt-get)
run: |
sudo apt-get update
sudo apt-get install patchutils python3-ply python3-git
sudo apt-get install patchutils
- name: Run checkpatch
run: |
./tools/scripts/checkpatch.pl --no-signoff --git FETCH_HEAD..HEAD
git diff -U20 HEAD~40 \
| filterdiff \
-x "a/src/jtag/drivers/libjaylink/*" \
-x "a/tools/git2cl/*" \
-x "a/.github/*" \
| ./tools/scripts/checkpatch.pl --no-signoff -

57
.github/workflows/linux-build.yml vendored
View File

@ -5,44 +5,24 @@ name: Linux Build
jobs:
# 32-bit, clang
build32:
runs-on: ubuntu-20.04
runs-on: ubuntu-latest
env:
CFLAGS: -m32
CC: clang
PKG_CONFIG_PATH: /opt/libjim32/lib/pkgconfig
steps:
- name: Checkout Code
uses: actions/checkout@v2
- name: Install required packages (apt-get)
run: |
sudo apt-get update
sudo apt-get install clang gcc-multilib
- name: Get 32-bit JIM TCL from cache
id: cache-libjim32
uses: actions/cache@v4
with:
path: /opt/libjim32
key: libjim32
- if: ${{ steps.cache-libjim32.outputs.cache-hit != 'true' }}
name: Checkout JIM TCL
uses: actions/checkout@v4
with:
repository: msteveb/jimtcl
ref: 0.83
path: jimtcl
- if: ${{ steps.cache-libjim32.outputs.cache-hit != 'true' }}
name: Build 32-bit JIM TCL from source
run: |
cd jimtcl
./configure --prefix=/opt/libjim32 --with-ext=json --minimal --disable-ssl
make -j`nproc`
make install
- name: Checkout Code
uses: actions/checkout@v4
- run: ./bootstrap
- run: ./configure --enable-remote-bitbang --enable-jtag_vpi --disable-target64
- run: make -j`nproc`
- run: file src/openocd | grep 32-bit
- run: src/openocd --version
# 64-bit, gcc
build64:
runs-on: ubuntu-latest
@ -51,32 +31,13 @@ jobs:
CC: gcc
steps:
- name: Checkout Code
uses: actions/checkout@v4
- name: Configure environment
run: |
TAG=$(git rev-parse --short HEAD)
echo "TAG=$TAG" >> $GITHUB_OUTPUT
echo "NAME=openocd64-$TAG" >> $GITHUB_ENV
uses: actions/checkout@v2
- name: Install required packages (apt-get)
run: |
sudo apt-get update
sudo apt-get install libusb-1.0-0 libusb-1.0-0-dev libjim-dev
sudo apt-get install libusb-1.0-0 libusb-1.0-0-dev
- run: ./bootstrap
- run: ./configure --enable-remote-bitbang --enable-jtag_vpi --enable-ftdi-cjtag --prefix /tmp/${{ env.NAME }}
- run: ./configure --enable-remote-bitbang --enable-jtag_vpi --enable-ftdi-oscan1
- run: make -j`nproc`
- name: Check that we built something
run: |
file src/openocd | grep 64-bit
src/openocd --version
- name: Package
# Package into tgz so that github stores a compressed artifact, even
# though it zips that artifact again before it sends it back to be
# downloaded.
run: |
make install
tar zcvf ${{ env.NAME }}.tgz -C /tmp ${{ env.NAME }}
- name: Upload Artifact
uses: actions/upload-artifact@v4
with:
name: ${{ env.NAME }}
path: ${{ env.NAME }}.tgz
- run: file src/openocd | grep 64-bit
- run: src/openocd --version

60
.github/workflows/snapshot.yml vendored
View File

@ -2,13 +2,13 @@
# Copyright (C) 2020 by Tarek BOUCHKATI <tarek.bouchkati@gmail.com>
on: push
on: pull_request
name: OpenOCD Snapshot
jobs:
package:
runs-on: [ubuntu-20.04]
runs-on: [ubuntu-18.04]
env:
DL_DIR: ../downloads
BUILD_DIR: ../build
@ -18,11 +18,11 @@ jobs:
sudo apt-get update
sudo apt-get install autotools-dev autoconf automake libtool pkg-config cmake texinfo texlive g++-mingw-w64-i686
- name: Checkout Code
uses: actions/checkout@v4
uses: actions/checkout@v1
- run: ./bootstrap
- name: Prepare libusb1
env:
LIBUSB1_VER: 1.0.26
LIBUSB1_VER: 1.0.24
run: |
mkdir -p $DL_DIR && cd $DL_DIR
wget "https://github.com/libusb/libusb/releases/download/v${LIBUSB1_VER}/libusb-${LIBUSB1_VER}.tar.bz2"
@ -30,7 +30,7 @@ jobs:
echo "LIBUSB1_SRC=$PWD/libusb-${LIBUSB1_VER}" >> $GITHUB_ENV
- name: Prepare hidapi
env:
HIDAPI_VER: 0.13.1
HIDAPI_VER: 0.10.1
run: |
mkdir -p $DL_DIR && cd $DL_DIR
wget "https://github.com/libusb/hidapi/archive/hidapi-${HIDAPI_VER}.tar.gz"
@ -38,14 +38,6 @@ jobs:
cd hidapi-hidapi-${HIDAPI_VER}
./bootstrap
echo "HIDAPI_SRC=$PWD" >> $GITHUB_ENV
- name: Prepare libftdi
env:
LIBFTDI_VER: 1.5
run: |
mkdir -p $DL_DIR && cd $DL_DIR
wget "http://www.intra2net.com/en/developer/libftdi/download/libftdi1-${LIBFTDI_VER}.tar.bz2"
tar -xjf libftdi1-${LIBFTDI_VER}.tar.bz2
echo "LIBFTDI_SRC=$PWD/libftdi1-${LIBFTDI_VER}" >> $GITHUB_ENV
- name: Prepare capstone
env:
CAPSTONE_VER: 4.0.2
@ -56,34 +48,13 @@ jobs:
wget "https://github.com/aquynh/capstone/archive/${CAPSTONE_VER}.tar.gz"
tar -xzf ${CAPSTONE_VER}.tar.gz
echo "CAPSTONE_SRC=$PWD/capstone-${CAPSTONE_VER}" >> $GITHUB_ENV
- name: Prepare libjaylink
env:
LIBJAYLINK_VER: 0.3.1
run: |
mkdir -p $DL_DIR && cd $DL_DIR
wget https://gitlab.zapb.de/libjaylink/libjaylink/-/archive/${LIBJAYLINK_VER}/libjaylink-${LIBJAYLINK_VER}.tar.gz
tar -xzf libjaylink-${LIBJAYLINK_VER}.tar.gz
cd libjaylink-${LIBJAYLINK_VER}
./autogen.sh
echo "LIBJAYLINK_SRC=$PWD" >> $GITHUB_ENV
- name: Prepare jimtcl
env:
JIMTCL_VER: 0.83
run: |
mkdir -p $DL_DIR && cd $DL_DIR
wget https://github.com/msteveb/jimtcl/archive/refs/tags/${JIMTCL_VER}.tar.gz
tar -xzf ${JIMTCL_VER}.tar.gz
echo "JIMTCL_SRC=$PWD/jimtcl-${JIMTCL_VER}" >> $GITHUB_ENV
- name: Package OpenOCD for windows
env:
MAKE_JOBS: 2
HOST: i686-w64-mingw32
LIBUSB1_CONFIG: --enable-shared --disable-static
HIDAPI_CONFIG: --enable-shared --disable-static --disable-testgui
LIBFTDI_CONFIG: -DSTATICLIBS=OFF -DEXAMPLES=OFF -DFTDI_EEPROM=OFF
CAPSTONE_CONFIG: "CAPSTONE_BUILD_CORE_ONLY=yes CAPSTONE_STATIC=yes CAPSTONE_SHARED=no"
LIBJAYLINK_CONFIG: --enable-shared --disable-static
JIMTCL_CONFIG: --with-ext=json --minimal --disable-ssl
run: |
# check if there is tag pointing at HEAD, otherwise take the HEAD SHA-1 as OPENOCD_TAG
OPENOCD_TAG="`git tag --points-at HEAD`"
@ -102,7 +73,6 @@ jobs:
# add missing dlls
cd $HOST-root/usr
cp `$HOST-gcc --print-file-name=libwinpthread-1.dll` ./bin/
# required by libftdi1.dll. For the gcc-mingw-10.3.x or later "libgcc_s_dw2-1.dll" will need to be copied.
cp `$HOST-gcc --print-file-name=libgcc_s_sjlj-1.dll` ./bin/
# prepare the artifact
ARTIFACT="openocd-${OPENOCD_TAG}-${HOST}.tar.gz"
@ -110,23 +80,3 @@ jobs:
echo "RELEASE_NAME=$RELEASE_NAME" >> $GITHUB_ENV
echo "IS_PRE_RELEASE=$IS_PRE_RELEASE" >> $GITHUB_ENV
echo "ARTIFACT_PATH=$PWD/$ARTIFACT" >> $GITHUB_ENV
- name: Publish OpenOCD packaged for windows
uses: actions/upload-artifact@v4
with:
path: ${{ env.ARTIFACT_PATH }}
- name: Delete 'latest' Release
uses: dev-drprasad/delete-tag-and-release@v1.1
with:
delete_release: true
tag_name: ${{ env.RELEASE_NAME }}
env:
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
- name: Create Release
uses: ncipollo/release-action@v1
with:
tag: ${{ env.RELEASE_NAME }}
commit: ${{ github.sha }}
draft: false
artifacts: ${{ env.ARTIFACT_PATH }}
prerelease: ${{ env.IS_PRE_RELEASE }}
token: ${{ secrets.GITHUB_TOKEN }}

136
.github/workflows/spike-openocd-tests.yml vendored
View File

@ -1,136 +0,0 @@
# Build Spike and run a couple of debug tests.
name: Test OpenOCD against 2 spike configurations
env:
SPIKE_REPO: https://github.com/riscv-software-src/riscv-isa-sim.git
SPIKE_REV: master
RISCV_TESTS_REPO: https://github.com/riscv-software-src/riscv-tests.git
RISCV_TESTS_REV: master
TOOLCHAIN_URL: https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack/releases/download/v12.2.0-1/xpack-riscv-none-elf-gcc-12.2.0-1-linux-x64.tar.gz
on:
# Run on merges to master to populate the cache with entities that are
# accessible by every pull request.
push:
branches:
- riscv
pull_request:
types: [synchronize, opened, reopened]
# There is some commented out code below that would be useful in adding this
# workflow to other repos. Ideally we can come up with something that would
# leave this file almost identical between repos, so they can all easily run
# this test suite.
jobs:
test:
name: Test debug (Ubuntu)
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v4
- name: Install packages
run: |
sudo apt-get update
sudo apt-get install -y device-tree-compiler build-essential libjim-dev
- name: Get revisions of dependencies
run: |
SPIKE_COMMIT=$( git ls-remote "$SPIKE_REPO" master | awk '{ print $1; }' )
RISC_V_TESTS_COMMIT=$( git ls-remote "$RISCV_TESTS_REPO" master | awk '{ print $1; }' )
echo "Revison of Spike: $SPIKE_COMMIT"
echo "Revision of RISC-V tests: $RISC_V_TESTS_COMMIT"
# Save for later use
echo "SPIKE_COMMIT=$SPIKE_COMMIT" >> $GITHUB_ENV
echo "RISC_V_TESTS_COMMIT=$RISC_V_TESTS_COMMIT" >> $GITHUB_ENV
- name: Get the toolchain from cache (if available)
id: cache-toolchain
uses: actions/cache@v4
with:
path: /opt/riscv/toolchain
key: "toolchain-${{env.TOOLCHAIN_URL}}"
- name: Get spike from cache (if available)
id: cache-spike
uses: actions/cache@v4
with:
path: /opt/riscv/spike
key: "spike-${{env.SPIKE_COMMIT}}"
- if: ${{ steps.cache-toolchain.outputs.cache-hit != 'true' }}
name: Download Toolchain (if not cached)
run: |
mkdir -p /opt/riscv/toolchain
wget --progress=dot:giga $TOOLCHAIN_URL -O /tmp/toolchain.tar.gz
- if: ${{ steps.cache-toolchain.outputs.cache-hit != 'true' }}
name: Install Toolchain (if not cached)
run: tar zxf /tmp/toolchain.tar.gz --strip-components=1 -C /opt/riscv/toolchain
- if: ${{ steps.cache-spike.outputs.cache-hit != 'true' }}
name: Download Spike source (if not cached)
run: |
git clone "$SPIKE_REPO"
cd riscv-isa-sim
git checkout "$SPIKE_COMMIT"
git submodule update --init --recursive
- if: ${{ steps.cache-spike.outputs.cache-hit != 'true' }}
name: Build Spike (if not cached)
run: |
cd riscv-isa-sim
mkdir build && cd build
../configure --prefix=/opt/riscv/spike
make -j"$(nproc 2> /dev/null || sysctl -n hw.ncpu)"
make install
- name: Build OpenOCD
run: |
#cd riscv-openocd
./bootstrap
./configure --prefix=/opt/riscv
make -j"$(nproc 2> /dev/null || sysctl -n hw.ncpu)"
ls -l src/openocd
# - name: Download OpenOCD
# run: |
# git clone --recurse-submodules https://github.com/riscv/riscv-openocd.git
# cd riscv-openocd
# git checkout 43ea20dfbb6c815004a51106a3b2009d7f6c4940
- name: Download Tests
run: |
git clone "$RISCV_TESTS_REPO"
cd riscv-tests
git checkout "$RISCV_TESTS_REV"
git submodule update --init --recursive
- name: Run Spike32 Tests
id: spike32-tests
run: |
cd riscv-tests/debug
./gdbserver.py targets/RISC-V/spike32.py --print-failures \
--gcc /opt/riscv/toolchain/bin/riscv-none-elf-gcc \
--gdb /opt/riscv/toolchain/bin/riscv-none-elf-gdb \
--sim_cmd /opt/riscv/spike/bin/spike \
--server_cmd $GITHUB_WORKSPACE/src/openocd
- name: Run Spike64-2 Tests
if: success() || steps.spike32-tests.conclusion == 'failure'
run: |
cd riscv-tests/debug
./gdbserver.py targets/RISC-V/spike64-2.py --print-failures \
--gcc /opt/riscv/toolchain/bin/riscv-none-elf-gcc \
--gdb /opt/riscv/toolchain/bin/riscv-none-elf-gdb \
--sim_cmd /opt/riscv/spike/bin/spike \
--server_cmd $GITHUB_WORKSPACE/src/openocd
- name: Archive test logs
# Proceed even if there was a failed test
if: ${{ success() || failure() }}
uses: actions/upload-artifact@v4
with:
name: test-logs
path: riscv-tests/debug/logs

20
.gitignore vendored
View File

@ -11,9 +11,9 @@
*.la
*.in
# coverage files (gcov)
*.gcda
*.gcno
# generated source files
src/jtag/minidriver_imp.h
src/jtag/jtag_minidriver.h
# OpenULINK driver files generated by SDCC
src/jtag/drivers/OpenULINK/*.rel
@ -84,9 +84,6 @@ patches
.cproject
.settings
# VSCode stuff
.vscode
# Emacs temp files
*~
@ -103,14 +100,3 @@ tags
GPATH
GRTAGS
GTAGS
# checkpatch script files
.checkpatch-camelcase.*
# clangd (e.g. for advanced code completion and linting) generates cache files
# into .cache
.cache
# A compile_commands.json can be generated using bear and will help tools such
# as clangd to locate header files and use correct $CFLAGS
compile_commands.json

3
.gitmodules vendored
View File

@ -1,3 +1,6 @@
[submodule "tools/git2cl"]
path = tools/git2cl
url = https://git.savannah.nongnu.org/git/git2cl.git
[submodule "jimtcl"]
path = jimtcl
url = https://github.com/msteveb/jimtcl.git

155
.travis.yml
View File

@ -1,91 +1,76 @@
# SPDX-License-Identifier: GPL-2.0-or-later
# Copyright Marek Vasut <marex@denx.de>
# OpenOCD on Travis CI - https://travis-ci.org/
sudo: required
dist: bionic
arch:
- amd64
- arm64
- ppc64le
- s390x
addons:
apt:
sources:
- sourceline: 'ppa:ubuntu-toolchain-r/test'
- sourceline: 'deb https://apt.llvm.org/bionic/ llvm-toolchain-bionic-9 main'
key_url: 'https://apt.llvm.org/llvm-snapshot.gpg.key'
packages:
- libftdi-dev
- libhidapi-dev
- libjaylink-dev
env:
- CC=gcc-9
- CC=clang-9
language: c
git:
depth: 1
autocrlf: input
script:
- $mingw64 ${CC} --version
- $mingw64 env
- $mingw64 ./bootstrap
- $mingw64 ./configure
- $mingw64 make
before_install:
- |-
case $TRAVIS_OS_NAME in
linux)
sudo apt install ${CC} libusb-1.0-0-dev
;;
osx)
brew install libtool automake libusb libusb-compat hidapi libftdi
;;
windows)
[[ ! -f C:/tools/msys64/msys2_shell.cmd ]] && rm -rf C:/tools/msys64
choco uninstall -y mingw
choco upgrade --no-progress -y msys2
export msys2='cmd //C RefreshEnv.cmd '
export msys2+='& set MSYS=winsymlinks:nativestrict '
export msys2+='& C:\\tools\\msys64\\msys2_shell.cmd -defterm -no-start'
export mingw64="$msys2 -mingw64 -full-path -here -c \$\* --"
export msys2+=" -msys2 -c \$\* --"
$msys2 pacman --sync --noconfirm --needed mingw-w64-x86_64-toolchain autoconf autoconf-archive automake automake-wrapper binutils gcc gettext git libtool m4 make pkg-config tcl texinfo mingw-w64-x86_64-libusb mingw-w64-x86_64-libusb-compat-git mingw-w64-x86_64-libjaylink-git mingw-w64-x86_64-libftdi mingw-w64-x86_64-hidapi mingw-w64-x86_64-clang
## FIXME: Also build for i686?
## Install more MSYS2 packages from https://packages.msys2.org/base here
taskkill //IM gpg-agent.exe //F # https://travis-ci.community/t/4967
export PATH=/C/tools/msys64/mingw64/bin:$PATH
export MAKE=mingw32-make # so that Autotools can find it
;;
esac
before_cache:
- |-
case $TRAVIS_OS_NAME in
windows)
# https://unix.stackexchange.com/a/137322/107554
$msys2 pacman --sync --clean --noconfirm
;;
esac
cache:
directories:
- $HOME/AppData/Local/Temp/chocolatey
- /C/tools/msys64
dist: trusty
matrix:
include:
- os: osx
- os: linux
env:
- CC=clang
- os: windows
- BUILD=x86_64-linux-gnu
- EXECUTABLE=openocd
addons:
apt:
packages:
- patchutils
compiler: gcc
- os: linux
env:
- CC=gcc
- BUILD=i686-linux-gnu
- CFLAGS=-m32
- EXECUTABLE=openocd
addons:
apt:
packages:
- gcc-multilib patchutils
compiler: gcc
- os: linux
env:
- BUILD=x86_64-linux-gnu
- EXECUTABLE=openocd
addons:
apt:
packages:
- patchutils
compiler: clang
- os: linux
env:
- BUILD=i686-linux-gnu
- CFLAGS=-m32
- CONFIGURE_ARGS="--disable-target64"
- EXECUTABLE=openocd
compiler: clang
addons:
apt:
packages:
- gcc-multilib patchutils
- os: linux
env:
- BUILD=i686-w64-mingw
- CONFIGURE_ARGS="--build=i686-unknown-linux-gnu --host=i686-w64-mingw32"
- EXECUTABLE=openocd.exe
compiler: i686-w64-mingw32-gcc
addons:
apt:
packages:
- binutils-mingw-w64-i686 gcc-mingw-w64-i686 g++-mingw-w64-i686 patchutils
script:
# This is here for the signoff check.
# Disabled because when travis does the integration build the last change
# is an automated change, which won't have the Signed-off-by line.
#- ./tools/checkpatch.sh
# Ideally we'd diff back to where we either branched off OpenOCD or master,
# or riscv. But that's tricky, and the default git clone only gets the last
# 50 changes any case. Most merges won't consist of more than 40 changes,
# so this should work fine most of the time, and be a lot better than not
# checking at all.
- git diff -U20 HEAD~40 |
filterdiff -x "a/src/jtag/drivers/libjaylink/*" -x "a/tools/git2cl/*"
-x "b/src/gnulib/*" |
./tools/scripts/checkpatch.pl --no-signoff -
- ./bootstrap && ./configure --enable-remote-bitbang --enable-jtag_vpi $CONFIGURE_ARGS && make
- file src/$EXECUTABLE

14
AUTHORS
View File

@ -1,2 +1,12 @@
Please check the source code files and/or Git history for a list of all authors
and contributors.
Dominic Rath <Dominic.Rath@gmx.de>
Magnus Lundin <lundin@mlu.mine.nu>
Michael Fischer <fischermi@t-online.de>
Spencer Oliver <spen@spen-soft.co.uk>
Carsten Schlote <schlote@vahanus.net>
Øyvind Harboe <oyvind.harboe@zylin.com>
Duane Ellis <openocd@duaneellis.com>
Michael Schwingen <michael@schwingen.org>
Rick Altherr <kc8apf@users.berlios.de>
David Brownell <dbrownell@users.sourceforge.net>
Vincint Palatin <vpalatin@users.berlios.de>
Zachary T Welch <zw@superlucidity.net>

143
HACKING
View File

@ -103,37 +103,6 @@ patch:
Now every time OpenOCD is run, coverage info in your build directory is
updated. Running `gcov src/path/file.c` will generate a report.
- Sparse Static Analyzer
Using this tool allows identifying some bug in C code.
In the future, OpenOCD would use the sparse attribute 'bitwise' to
detect incorrect endianness assignments.
Example usage:
@code
mkdir build-sparse; cd build-sparse
../configure CC=cgcc CFLAGS="-Wsparse-all -Wno-declaration-after-statement \
-Wno-unknown-attribute -Wno-transparent-union -Wno-tautological-compare \
-Wno-vla -Wno-flexible-array-array -D__FLT_EVAL_METHOD__=0"
make
@endcode
- Code coverage analysis
By inspecting the code coverage, you can identify potential gaps in your testing
and use that information to improve your test scenarios.
Example usage:
@code
mkdir build-gcov; cd build-gcov
../configure --enable-gcov [...]
make
# ... Now execute your test scenarios to collect OpenOCD code coverage ...
lcov --capture --directory ./src --output-file openocd-coverage.info
genhtml openocd-coverage.info --output-directory coverage_report
# ... Open coverage_report/index.html in a web browser ...
@endcode
Please consider performing these additional checks where appropriate
(especially Clang Static Analyzer for big portions of new code) and
mention the results (e.g. "Valgrind-clean, no new Clang analyzer
@ -197,6 +166,10 @@ topics. It is possible because @c for/master is not a traditional Git
branch.
-# You will need to install this hook, we will look into a better solution:
@code
scp -p -P 29418 USERNAME@review.openocd.org:hooks/commit-msg .git/hooks/
@endcode
Or with http only:
@code
wget https://review.openocd.org/tools/hooks/commit-msg
mv commit-msg .git/hooks
chmod +x .git/hooks/commit-msg
@ -224,48 +197,18 @@ while(!done) {
@endcode
\note use "git add ." before commit to add new files.
\note check @ref checkpatch for hint about checkpatch script
Commit message template, notice the short first line.
The field '<c>specify touched area</c>'
should identify the main part or subsystem the patch touches.
@code{.unparsed}
specify touched area: short comment
Comment template, notice the short first line w/topic. The topic field
should identify the main part or subsystem the patch touches. Check
git log for examples.
@code
topic: Short comment
<blank line>
Longer comments over several lines, explaining (where applicable) the
reason for the patch and the general idea the solution is based on,
any major design decisions, etc. Limit each comment line's length to 75
characters; since 75 it's too short for a URL, you can put the URL in a
separate line preceded by 'Link: '.
any major design decisions, etc...
<blank line>
Signed-off-by: ...
@endcode
Examples:
@code{.unparsed}
flash/nor/atsame5: add SAME59 support
Add new device ID
@endcode
@code{.unparsed}
flash/nor: flash driver for XYZ123
Add new flash driver for internal flash of ...
@endcode
@code{.unparsed}
target/cortex_m: fix segmentation fault in cmd 'soft_reset_halt'
soft_reset_halt command failed reproducibly under following conditions: ...
Test for NULL pointer and return error ...
Reported-by: John Reporter <rep9876@gmail.com>
Fixes: 123456789abc ("target: the commit where the problem started")
BugLink: https://sourceforge.net/p/openocd/tickets/999/
@endcode
@code{.unparsed}
doc: fix typos
@endcode
See "git log" for more examples.
-# Next you need to make sure that your patches
are on top of the latest stuff on the server and
that there are no conflicts:
@ -284,72 +227,6 @@ git push review
Further reading: http://www.coreboot.org/Git
@section checkpatch About checkpatch script
OpenOCD source code includes the script checkpatch to let developers to
verify their patches before submitting them for review (see @ref gerrit).
Every patch for OpenOCD project that is submitted for review on Gerrit
is tested by Jenkins. Jenkins will run the checkpatch script to analyze
each patch.
If the script highlights either errors or warnings, Gerrit will add the
score "-1" to the patch and maintainers will probably ignore the patch,
waiting for the developer to send a fixed version.
The script checkpatch verifies the SPDX tag for new files against a very
short list of license tags.
If the license of your contribution is not listed there, but compatible
with OpenOCD license, please alert the maintainers or add the missing
license in the first patch of your patch series.
The script checkpatch has been originally developed for the Linux kernel
source code, thus includes specific tests and checks related to Linux
coding style and to Linux code structure. While the script has been
adapted for OpenOCD specificities, it still includes some Linux related
test. It is then possible that it triggers sometimes some <em>false
positive</em>!
If you think that the error identified by checkpatch is a false
positive, please report it to the openocd-devel mailing list or prepare
a patch for fixing checkpatch and send it to Gerrit for review.
\attention The procedure below is allowed only for <em>exceptional
cases</em>. Do not use it to submit normal patches.
There are <em>exceptional cases</em> in which you need to skip some of
the tests from checkpatch in order to pass the approval from Gerrit.
For example, a patch that modify one line inside a big comment block
will not show the beginning or the end of the comment block. This can
prevent checkpatch to detect the comment block. Checkpatch can wrongly
consider the modified comment line as a code line, triggering a set of
false errors.
Only for <em>exceptional cases</em>, it is allowed to submit patches
to Gerrit with the special field 'Checkpatch-ignore:' in the commit
message. This field will cause checkpatch to ignore the error types
listed in the field, only for the patch itself.
For errors in the commit message, the special field has to be put in
the commit message before the line that produces the error.
The special field must be added <em>before</em> the 'Signed-off-by:'
line, otherwise it is ignored.
To ignore multiple errors, either add multiple lines with the special
field or add multiple error types, separated by space or commas, in a
single line.
The error type is printed by checkpatch on failure.
For example the names of Windows APIs mix lower and upper case chars,
in violation of OpenOCD coding style, triggering a 'CAMELCASE' error:
@code
CHECK:CAMELCASE: Avoid CamelCase: <WSAGetLastError>
#96105: FILE: src/helper/log.c:505:
+ error_code = WSAGetLastError();
@endcode
Adding in the commit message of the patch the line:
@code
Checkpatch-ignore: CAMELCASE
@endcode
will force checkpatch to ignore the CAMELCASE error.
@section timeline When can I expect my contribution to be committed?
The code review is intended to take as long as a week or two to allow

20
LICENSES/exceptions/eCos-exception-2.0
View File

@ -1,20 +0,0 @@
SPDX-Exception-Identifier: eCos-exception-2.0
SPDX-URL: https://spdx.org/licenses/eCos-exception-2.0.html
SPDX-Licenses: GPL-2.0-only, GPL-2.0-or-later
Usage-Guide:
This exception is used together with one of the above SPDX-Licenses.
To use this exception add it with the keyword WITH to one of the
identifiers in the SPDX-Licenses tag:
SPDX-License-Identifier: <SPDX-License> WITH eCos-exception-2.0
License-Text:
As a special exception, if other files instantiate templates or use
macros or inline functions from this file, or you compile this
file and link it with other works to produce a work based on this
file, this file does not by itself cause the resulting work to be
covered by the GNU General Public License. However the source code for
this file must still be made available in accordance with section (3)
of the GNU General Public License.
This exception does not invalidate any other reasons why a work based on
this file might be covered by the GNU General Public License.

62
LICENSES/license-rules.txt
View File

@ -173,6 +173,7 @@ OpenOCD, can be broken down into:
File format examples::
Valid-License-Identifier: GPL-2.0
Valid-License-Identifier: GPL-2.0-only
Valid-License-Identifier: GPL-2.0-or-later
SPDX-URL: https://spdx.org/licenses/GPL-2.0.html
@ -181,70 +182,15 @@ OpenOCD, can be broken down into:
tag/value pairs into a comment according to the placement
guidelines in the licensing rules documentation.
For 'GNU General Public License (GPL) version 2 only' use:
SPDX-License-Identifier: GPL-2.0
or
SPDX-License-Identifier: GPL-2.0-only
For 'GNU General Public License (GPL) version 2 or any later version' use:
SPDX-License-Identifier: GPL-2.0-or-later
License-Text:
Full license text
2. Exceptions:
Some licenses can be amended with exceptions which grant certain rights
which the original license does not. These exceptions are available
from the directory::
LICENSES/exceptions/
in the OpenOCD source tree. The files in this directory contain the full
exception text and the required `Exception Metatags`_.
Examples::
LICENSES/exceptions/eCos-exception-2.0
Exception Metatags:
The following meta tags must be available in an exception file:
- SPDX-Exception-Identifier:
One exception identifier which can be used with SPDX license
identifiers.
- SPDX-URL:
The URL of the SPDX page which contains additional information related
to the exception.
- SPDX-Licenses:
A comma separated list of SPDX license identifiers for which the
exception can be used.
- Usage-Guidance:
Freeform text for usage advice. The text must be followed by correct
examples for the SPDX license identifiers as they should be put into
source files according to the `License identifier syntax`_ guidelines.
- Exception-Text:
All text after this tag is treated as the original exception text
File format examples::
SPDX-Exception-Identifier: eCos-exception-2.0
SPDX-URL: https://spdx.org/licenses/eCos-exception-2.0.html
SPDX-Licenses: GPL-2.0-only, GPL-2.0-or-later
Usage-Guide:
This exception is used together with one of the above SPDX-Licenses.
To use this exception add it with the keyword WITH to one of the
identifiers in the SPDX-Licenses tag:
SPDX-License-Identifier: <SPDX-License> WITH eCos-exception-2.0
License-Text:
Full license text
3. Stand-alone licenses:
2. Stand-alone licenses:
These licenses should only be used for stand-alone applications that are
distributed with OpenOCD but are not included in the OpenOCD binary.

37
LICENSES/preferred/BSD-2-Clause-Views
View File

@ -1,37 +0,0 @@
Valid-License-Identifier: BSD-2-Clause-Views
SPDX-URL: https://spdx.org/licenses/BSD-2-Clause-Views.html
Usage-Guide:
To use the BSD 2-clause with views sentence License put the following SPDX
tag/value pair into a comment according to the placement guidelines in
the licensing rules documentation:
SPDX-License-Identifier: BSD-2-Clause-Views
License-Text:
Copyright (c) <year> <owner> . All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
The views and conclusions contained in the software and documentation
are those of the authors and should not be interpreted as representing
official policies, either expressed or implied, of the copyright holders
or contributors.

32
LICENSES/preferred/BSD-Source-Code
View File

@ -1,32 +0,0 @@
Valid-License-Identifier: BSD-Source-Code
SPDX-URL: https://spdx.org/licenses/BSD-Source-Code.html
Usage-Guide:
To use the BSD Source Code Attribution License put the following SPDX
tag/value pair into a comment according to the placement guidelines in
the licensing rules documentation:
SPDX-License-Identifier: BSD-Source-Code
License-Text:
Copyright (c) <year> <owner> . All rights reserved.
Redistribution and use of this software in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
* Neither the name of the copyright holder nor the names of its
contributors may be used to endorse or promote products derived from this
software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.

130
LICENSES/preferred/CC0-1.0
View File

@ -1,130 +0,0 @@
Valid-License-Identifier: CC0-1.0
SPDX-URL: https://spdx.org/licenses/CC0-1.0.html
Usage-Guide:
To use the Creative Commons Zero v1.0 Universal License put the following
SPDX tag/value pair into a comment according to the placement guidelines in
the licensing rules documentation:
SPDX-License-Identifier: CC0-1.0
License-Text:
Creative Commons Legal Code
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3
LICENSES/preferred/GPL-2.0
View File

@ -1,3 +1,4 @@
Valid-License-Identifier: GPL-2.0
Valid-License-Identifier: GPL-2.0-only
Valid-License-Identifier: GPL-2.0-or-later
SPDX-URL: https://spdx.org/licenses/GPL-2.0.html
@ -6,6 +7,8 @@ Usage-Guide:
tag/value pairs into a comment according to the placement
guidelines in the licensing rules documentation.
For 'GNU General Public License (GPL) version 2 only' use:
SPDX-License-Identifier: GPL-2.0
or
SPDX-License-Identifier: GPL-2.0-only
For 'GNU General Public License (GPL) version 2 or any later version' use:
SPDX-License-Identifier: GPL-2.0-or-later

503
LICENSES/preferred/LGPL-2.1
View File

@ -1,503 +0,0 @@
Valid-License-Identifier: LGPL-2.1-only
Valid-License-Identifier: LGPL-2.1-or-later
SPDX-URL: https://spdx.org/licenses/LGPL-2.1.html
Usage-Guide:
To use this license in source code, put one of the following SPDX
tag/value pairs into a comment according to the placement
guidelines in the licensing rules documentation.
For 'GNU Lesser General Public License (LGPL) version 2.1 only' use:
SPDX-License-Identifier: LGPL-2.1-only
For 'GNU Lesser General Public License (LGPL) version 2.1 or any later
version' use:
SPDX-License-Identifier: LGPL-2.1-or-later
License-Text:
GNU LESSER GENERAL PUBLIC LICENSE
Version 2.1, February 1999
Copyright (C) 1991, 1999 Free Software Foundation, Inc.
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
Everyone is permitted to copy and distribute verbatim copies of this
license document, but changing it is not allowed.
[This is the first released version of the Lesser GPL. It also counts as
the successor of the GNU Library Public License, version 2, hence the
version number 2.1.]
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The licenses for most software are designed to take away your freedom to
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That's all there is to it!

189
LICENSES/stand-alone/Apache-2.0
View File

@ -1,189 +0,0 @@
Valid-License-Identifier: Apache-2.0
SPDX-URL: https://spdx.org/licenses/Apache-2.0.html
Usage-Guide:
Do NOT use on OpenOCD code. The Apache-2.0 is not GPL2 compatible. It may only
be used for dual-licensed files where the other license is GPL2 compatible.
If you end up using this it MUST be used together with a GPL2 compatible
license using "OR".
It may also be used for stand-alone code NOT linked within the OpenOCD binary
but distributed with OpenOCD.
To use the Apache License version 2.0 put the following SPDX tag/value
pair into a comment according to the placement guidelines in the
licensing rules documentation:
SPDX-License-Identifier: Apache-2.0
License-Text:
Apache License
Version 2.0, January 2004
http://www.apache.org/licenses/
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48
Makefile.am
View File

@ -1,5 +1,3 @@
# SPDX-License-Identifier: GPL-2.0-or-later
# not a GNU package. You can remove this line, if
# have all needed files, that a GNU package needs
AUTOMAKE_OPTIONS = gnu 1.6
@ -7,7 +5,7 @@ AUTOMAKE_OPTIONS = gnu 1.6
.DELETE_ON_ERROR:
# make sure we pass the correct jimtcl flags to distcheck
AM_DISTCHECK_CONFIGURE_FLAGS = --disable-install-jim
DISTCHECK_CONFIGURE_FLAGS = --disable-install-jim
# do not run Jim Tcl tests (esp. during distcheck)
check-recursive: SUBDIRS :=
@ -26,38 +24,27 @@ noinst_LTLIBRARIES =
info_TEXINFOS =
dist_man_MANS =
EXTRA_DIST =
DISTCLEANFILES =
if INTERNAL_JIMTCL
SUBDIRS += jimtcl
DIST_SUBDIRS += jimtcl
EXTRA_DIST += jimtcl/configure.gnu
# jimtcl from 0.79 to 0.82 miss cleaning jsmn.o
DISTCLEANFILES += jimtcl/jsmn/jsmn.o
endif
# common flags used in openocd build
AM_CFLAGS = $(GCC_WARNINGS)
AM_LDFLAGS =
AM_CFLAGS = $(GCC_WARNINGS)\
-DFD_SETSIZE=128
AM_CPPFLAGS = $(HOST_CPPFLAGS)\
-I$(top_srcdir)/src \
-I$(top_builddir)/src \
-DPKGDATADIR=\"$(pkgdatadir)\" \
-DBINDIR=\"$(bindir)\"
-DBINDIR=\"$(bindir)\"\
-DFD_SETSIZE=128
if INTERNAL_JIMTCL
AM_CPPFLAGS += -I$(top_srcdir)/jimtcl \
-I$(top_builddir)/jimtcl
else
AM_CPPFLAGS += $(JIMTCL_CFLAGS)
endif
if USE_GCOV
AM_CFLAGS += --coverage
AM_LDFLAGS += --coverage
endif
EXTRA_DIST += \
BUGS \
HACKING \
@ -67,19 +54,13 @@ EXTRA_DIST += \
$(EXTRA_DIST_NEWS) \
Doxyfile.in \
LICENSES/license-rules.txt \
LICENSES/exceptions/eCos-exception-2.0 \
LICENSES/preferred/BSD-1-Clause \
LICENSES/preferred/BSD-2-Clause \
LICENSES/preferred/BSD-2-Clause-Views \
LICENSES/preferred/BSD-3-Clause \
LICENSES/preferred/BSD-Source-Code \
LICENSES/preferred/CC0-1.0 \
LICENSES/preferred/GFDL-1.2 \
LICENSES/preferred/gfdl-1.2.texi.readme \
LICENSES/preferred/GPL-2.0 \
LICENSES/preferred/LGPL-2.1 \
LICENSES/preferred/MIT \
LICENSES/stand-alone/Apache-2.0 \
LICENSES/stand-alone/GPL-3.0 \
tools/logger.pl \
tools/rlink_make_speed_table \
@ -123,13 +104,9 @@ TCL_PATH = tcl
TCL_FILES = find $(srcdir)/$(TCL_PATH) -name '*.cfg' -o -name '*.tcl' -o -name '*.txt' | \
sed -e 's,^$(srcdir)/$(TCL_PATH),,'
# The git log command below generates many empty text lines with only some space characters
# for indentation purposes, so use sed to trim all trailing whitespace.
dist-hook:
if test -d $(srcdir)/.git -a \( ! -e $(distdir)/ChangeLog -o -w $(distdir)/ChangeLog \) ; then \
git --git-dir $(srcdir)/.git log --date=short --pretty="format:%ad %aN <%aE>%n%n%w(0,4,6)* %B" \
| sed 's/[[:space:]]*$$//' > $(distdir)/ChangeLog.tmp && \
mv $(distdir)/ChangeLog.tmp $(distdir)/ChangeLog; \
git --git-dir $(srcdir)/.git log | $(srcdir)/tools/git2cl/git2cl > $(distdir)/ChangeLog ; \
fi
for i in $$($(TCL_FILES)); do \
j="$(distdir)/$(TCL_PATH)/$$i" && \
@ -149,9 +126,18 @@ uninstall-hook:
distclean-local:
rm -rf Doxyfile doxygen
-rm -f $(srcdir)/jimtcl/configure.gnu
rm -f $(srcdir)/jimtcl/configure.gnu
DISTCLEANFILES += doxygen.log
# We want every change to have Signed-off-by. This is tricky to enforce in
# Travis, because it automatically makes temporary commits when merging. So
# instead we have a hook that enforces this in each workspace. To make sure
# that users actually use those hooks, we point git at them here.
# If git fails for some reason, that's OK. It's probably because somebody is
# building the source completely outside a git repo.
all-local:
cd $(srcdir) && git config core.hooksPath ./git-hooks || true
DISTCLEANFILES = doxygen.log
METASOURCES = AUTO

132
NEWS-0.12.0
View File

@ -1,132 +0,0 @@
This file includes highlights of the changes made in the OpenOCD
source archive release.
JTAG Layer:
* add default to adapter speed when unspecified (100 kHz)
* AM335X gpio (BeagleBones) adapter driver
* BCM2835 support for SWD
* Cadence Virtual Debug (vdebug) adapter driver
* CMSIS-DAP support for SWO and SWD multidrop
* Espressif USB JTAG Programmer adapter driver
* Remote bitbang support for Windows host
* ST-LINK add TCP server support to adapter driver
* SWD multidrop support
Boundary Scan:
Target Layer:
* aarch64: support watchpoints
* arm: support independent TPIU and SWO for trace
* arm adi v5: support Large Physical Address Extension
* arm adi v6: support added, for jtag and swd transport
* cortex_a: support watchpoints
* elf 64bit load support
* Espressif: support ESP32, ESP32-S2 and ESP32-S3 cores
* semihosting: support user defined operations
* Xtensa: support Xtensa LX architecture via JTAG and ADIv5 DAP
Flash Layer:
* Atmel/Microchip SAM E51G18A, E51G19A, R35J18B, LAN9255 support
* GigaDevice GD32E23x, GD32F1x0/3x0, GD32VF103 support
* Nuvoton NPCX series support
* onsemi RSL10 support
* Raspberry Pi Pico RP2040 support
* ST BlueNRG-LPS support
* ST STM32 G05x, G06x, G0Bx, G0Cx, U57x, U58x, WB1x, WL5x support
* ST STM32 G0, G4, L4, L4+, L5, WB, WL OTP support
Board, Target, and Interface Configuration Scripts:
* Ampere Computing eMAG8180, Altra ("Quicksilver") and Altra Max ("Mystique") board config
* Cadence KC705 FPGA (Xtensa Development Platform) via JTAG and ADIv5 DAP board config
* Digilent Nexys Video board config
* Espressif ESP32 ETHERNET-KIT and WROVER-KIT board config
* Espressif ESP32 via ESP USB Bridge generic board config
* Espressif ESP32-S2 Kaluga 1 board config
* Espressif ESP32-S2 with ESP USB Bridge board config
* Espressif ESP32-S3 example board config
* Kontron SMARC-sAL28 board config
* LambdaConcept ECPIX-5 board config
* Microchip ATSAMA5D27-SOM1-EK1 board config
* Microchip EVB-LAN9255 board config
* Microchip SAME51 Curiosity Nano board config
* NXP FRDM-K64F, LS1046ARDB and LS1088ARDB board config
* NXP RT6XX board config
* Olimex H405 board config
* Radiona ULX3S board config
* Raspberry Pi 3 and Raspberry Pi 4 model B board config
* Raspberry Pi Pico-Debug board config
* Renesas R-Car V3U Falcon board config
* ST BlueNRG-LPS steval-idb012v1 board config
* ST NUCLEO-8S208RB board config
* ST NUCLEO-G031K8, NUCLEO-G070RB, NUCLEO-G071RB board config
* ST NUCLEO-G431KB, NUCLEO-G431RB, NUCLEO-G474RE board config
* ST STM32MP13x-DK board config
* TI AM625 EVM, AM642 EVM and AM654 EVM board config
* TI J721E EVM, J721S2 EVM and J7200 EVM board config
* Ampere Computing eMAG, Altra ("Quicksilver") and Altra Max ("Mystique") target config
* Cadence Xtensa generic and Xtensa VDebug target config
* Broadcom BCM2711, BCM2835, BCM2836 and BCM2837 target config
* Espressif ESP32, ESP32-S2 and ESP32-S3 target config
* Microchip ATSAMA5D2 series target config
* NanoXplore NG-Ultra SoC target config
* NXP IMX8QM target config
* NXP LS1028A, LS1046A and LS1088A target config
* NXP RT600 (Xtensa HiFi DSP) target config
* onsemi RSL10 target config
* Raspberry Pi Pico RP2040 target config
* Renesas R8A779A0 V3U target config
* Renesas RZ/Five target config
* Renesas RZ/G2 MPU family target config
* Rockchip RK3399 target config
* ST BlueNRG-LPS target config
* ST STM32MP13x target config
* TI AM625, AM654, J721E and J721S2 target config
* Ashling Opella-LD interface config
* Aspeed AST2600 linuxgpiod based interface config
* Blinkinlabs JTAG_Hat interface config
* Cadence Virtual Debug (vdebug) interface config
* Espressif ESP32-S2 Kaluga 1 board's interface config
* Espressif USB Bridge jtag interface config
* Infineon DAP miniWiggler V3 interface config
* PLS SPC5 interface config
* Tigard interface config
* Lattice MachXO3 family FPGA config
Server Layer:
* GDB: add per-target remote protocol extensions
* GDB: more 'Z' packets support
* IPDBG JtagHost server functionality
* semihosting: I/O redirection to TCP server
* telnet: support for command's autocomplete
RTOS:
* 'none' rtos support
* Zephyr rtos support
Documentation:
Build and Release:
* Add json extension to jimtcl build
* Drop dependency from libusb0
* Drop repository repo.or.cz for submodules
* Move gerrit to https://review.openocd.org/
* Require autoconf 2.69 or newer
* Update jep106 to revision JEP106BF.01
* Update jimtcl to version 0.81
* Update libjaylink to version 0.3.1
* New configure flag '--enable-jimtcl-maintainer' for jimtcl build
This release also contains a number of other important functional and
cosmetic bugfixes. For more details about what has changed since the
last release, see the git repository history:
http://sourceforge.net/p/openocd/code/ci/v0.12.0/log/?path=
For older NEWS, see the NEWS files associated with each release
(i.e. NEWS-<version>).
For more information about contributing test reports, bug fixes, or new
features and device support, please read the new Developer Manual (or
the BUGS and PATCHES.txt files in the source archive).

141
README
View File

@ -1,4 +1,5 @@
# Welcome to OpenOCD!
Welcome to OpenOCD!
===================
OpenOCD provides on-chip programming and debugging support with a
layered architecture of JTAG interface and TAP support including:
@ -25,7 +26,9 @@ This README file contains an overview of the following topics:
- packaging tips.
# Quickstart for the impatient
============================
Quickstart for the impatient
============================
If you have a popular board then just start OpenOCD with its config,
e.g.:
@ -36,22 +39,20 @@ If you are connecting a particular adapter with some specific target,
you need to source both the jtag interface and the target configs,
e.g.:
```
openocd -f interface/ftdi/jtagkey2.cfg -c "transport select jtag" \
-f target/ti_calypso.cfg
```
```
openocd -f interface/stlink.cfg -c "transport select hla_swd" \
-f target/stm32l0.cfg
```
After OpenOCD startup, connect GDB with
(gdb) target extended-remote localhost:3333
# OpenOCD Documentation
=====================
OpenOCD Documentation
=====================
In addition to the in-tree documentation, the latest manuals may be
viewed online at the following URLs:
@ -70,75 +71,78 @@ by subscribing to the OpenOCD developer mailing list:
openocd-devel@lists.sourceforge.net
## Building the OpenOCD Documentation
Building the OpenOCD Documentation
----------------------------------
By default the OpenOCD build process prepares documentation in the
"Info format" and installs it the standard way, so that `info openocd`
"Info format" and installs it the standard way, so that "info openocd"
can access it.
Additionally, the OpenOCD User's Guide can be produced in the
following different formats:
If `PDFVIEWER` is set, this creates and views the PDF User Guide.
# If PDFVIEWER is set, this creates and views the PDF User Guide.
make pdf && ${PDFVIEWER} doc/openocd.pdf
If `HTMLVIEWER` is set, this creates and views the HTML User Guide.
# If HTMLVIEWER is set, this creates and views the HTML User Guide.
make html && ${HTMLVIEWER} doc/openocd.html/index.html
The OpenOCD Developer Manual contains information about the internal
architecture and other details about the code:
Note: make sure doxygen is installed, type doxygen --version
# NB! make sure doxygen is installed, type doxygen --version
make doxygen && ${HTMLVIEWER} doxygen/index.html
# Supported hardware
==================
Supported hardware
==================
## JTAG adapters
JTAG adapters
-------------
AM335x, ARM-JTAG-EW, ARM-USB-OCD, ARM-USB-TINY, AT91RM9200, axm0432, BCM2835,
Bus Blaster, Buspirate, Cadence DPI, Cadence vdebug, Chameleon, CMSIS-DAP,
Cortino, Cypress KitProg, DENX, Digilent JTAG-SMT2, DLC 5, DLP-USB1232H,
embedded projects, Espressif USB JTAG Programmer,
eStick, FlashLINK, FlossJTAG, Flyswatter, Flyswatter2,
AICE, ARM-JTAG-EW, ARM-USB-OCD, ARM-USB-TINY, AT91RM9200, axm0432, BCM2835,
Bus Blaster, Buspirate, Cadence DPI, Chameleon, CMSIS-DAP, Cortino,
Cypress KitProg, DENX, Digilent JTAG-SMT2, DLC 5, DLP-USB1232H,
embedded projects, eStick, FlashLINK, FlossJTAG, Flyswatter, Flyswatter2,
FTDI FT232R, Gateworks, Hoegl, ICDI, ICEBear, J-Link, JTAG VPI, JTAGkey,
JTAGkey2, JTAG-lock-pick, KT-Link, Linux GPIOD, Lisa/L, LPC1768-Stick,
Mellanox rshim, MiniModule, NGX, Nuvoton Nu-Link, Nu-Link2, NXHX, NXP IMX GPIO,
OOCDLink, Opendous, OpenJTAG, Openmoko, OpenRD, OSBDM, Presto, Redbee,
Remote Bitbang, RLink, SheevaPlug devkit, Stellaris evkits,
ST-LINK (SWO tracing supported), STM32-PerformanceStick, STR9-comStick,
sysfsgpio, Tigard, TI XDS110, TUMPA, Turtelizer, ULINK, USB-A9260, USB-Blaster,
sysfsgpio, TI XDS110, TUMPA, Turtelizer, ULINK, USB-A9260, USB-Blaster,
USB-JTAG, USBprog, VPACLink, VSLLink, Wiggler, XDS100v2, Xilinx XVC/PCIe,
Xverve.
## Debug targets
Debug targets
-------------
ARM: AArch64, ARM11, ARM7, ARM9, Cortex-A/R (v7-A/R), Cortex-M (ARMv{6/7/8}-M),
FA526, Feroceon/Dragonite, XScale.
ARCv2, AVR32, DSP563xx, DSP5680xx, EnSilica eSi-RISC, EJTAG (MIPS32, MIPS64),
ESP32, ESP32-S2, ESP32-S3, Intel Quark, LS102x-SAP, RISC-V, ST STM8,
Xtensa.
Intel Quark, LS102x-SAP, NDS32, RISC-V, ST STM8.
## Flash drivers
Flash drivers
-------------
ADUC702x, AT91SAM, AT91SAM9 (NAND), ATH79, ATmega128RFA1, Atmel SAM, AVR, CFI,
DSP5680xx, EFM32, EM357, eSi-RISC, eSi-TSMC, EZR32HG, FM3, FM4, Freedom E SPI,
GD32, i.MX31, Kinetis, LPC8xx/LPC1xxx/LPC2xxx/LPC541xx, LPC2900, LPC3180, LPC32xx,
i.MX31, Kinetis, LPC8xx/LPC1xxx/LPC2xxx/LPC541xx, LPC2900, LPC3180, LPC32xx,
LPCSPIFI, Marvell QSPI, MAX32, Milandr, MXC, NIIET, nRF51, nRF52 , NuMicro,
NUC910, Nuvoton NPCX, onsemi RSL10, Orion/Kirkwood, PIC32mx, PSoC4/5LP/6,
Raspberry RP2040, Renesas RPC HF and SH QSPI,
NUC910, Orion/Kirkwood, PIC32mx, PSoC4/5LP/6, Renesas RPC HF and SH QSPI,
S3C24xx, S3C6400, SiM3x, SiFive Freedom E, Stellaris, ST BlueNRG, STM32,
STM32 QUAD/OCTO-SPI for Flash/FRAM/EEPROM, STMSMI, STR7x, STR9x, SWM050,
TI CC13xx, TI CC26xx, TI CC32xx, TI MSP432, Winner Micro w600, Xilinx XCF,
XMC1xxx, XMC4xxx.
# Installing OpenOCD
==================
Installing OpenOCD
==================
## A Note to OpenOCD Users
A Note to OpenOCD Users
-----------------------
If you would rather be working "with" OpenOCD rather than "on" it, your
operating system or JTAG interface supplier may provide binaries for
@ -157,7 +161,8 @@ Users of these binary versions of OpenOCD must contact their Packager to
ask for support or newer versions of the binaries; the OpenOCD
developers do not support packages directly.
## A Note to OpenOCD Packagers
A Note to OpenOCD Packagers
---------------------------
You are a PACKAGER of OpenOCD if you:
@ -184,9 +189,11 @@ suggestions:
- Use "ftdi" interface adapter driver for the FTDI-based devices.
# Building OpenOCD
================
Building OpenOCD
================
The INSTALL file contains generic instructions for running `configure`
The INSTALL file contains generic instructions for running 'configure'
and compiling the OpenOCD source code. That file is provided by
default for all GNU autotools packages. If you are not familiar with
the GNU autotools, then you should read those instructions first.
@ -194,7 +201,8 @@ the GNU autotools, then you should read those instructions first.
The remainder of this document tries to provide some instructions for
those looking for a quick-install.
## OpenOCD Dependencies
OpenOCD Dependencies
--------------------
GCC or Clang is currently required to build OpenOCD. The developers
have begun to enforce strict code warnings (-Wall, -Werror, -Wextra,
@ -208,8 +216,7 @@ You'll also need:
- make
- libtool
- pkg-config >= 0.23 or pkgconf
- libjim >= 0.79
- pkg-config >= 0.23 (or compatible)
Additionally, for building from git:
@ -217,27 +224,17 @@ Additionally, for building from git:
- automake >= 1.14
- texinfo >= 5.0
Optional USB-based adapter drivers need libusb-1.0.
USB-based adapters depend on libusb-1.0. A compatible implementation, such as
FreeBSD's, additionally needs the corresponding .pc files.
Optional USB-Blaster, ASIX Presto and OpenJTAG interface adapter
USB-Blaster, ASIX Presto and OpenJTAG interface adapter
drivers need:
- libftdi: http://www.intra2net.com/en/developer/libftdi/index.php
Optional CMSIS-DAP adapter driver needs HIDAPI library.
CMSIS-DAP support needs HIDAPI library.
Optional linuxgpiod adapter driver needs libgpiod library.
Optional J-Link adapter driver needs libjaylink library.
Optional ARM disassembly needs capstone library.
Optional development script checkpatch needs:
- perl
- python
- python-ply
## Permissions delegation
Permissions delegation
----------------------
Running OpenOCD with root/administrative permissions is strongly
discouraged for security reasons.
@ -254,24 +251,27 @@ For parport adapters on Windows you need to run install_giveio.bat
(it's also possible to use "ioperm" with Cygwin instead) to give
ordinary users permissions for accessing the "LPT" registers directly.
## Compiling OpenOCD
Compiling OpenOCD
-----------------
To build OpenOCD, use the following sequence of commands:
./bootstrap
./bootstrap (when building from the git repository)
./configure [options]
make
sudo make install
The `bootstrap` command is only necessary when building from the Git repository. The `configure` step generates the Makefiles required to build
The 'configure' step generates the Makefiles required to build
OpenOCD, usually with one or more options provided to it. The first
'make' step will build OpenOCD and place the final executable in
'./src/'. The final (optional) step, `make install`, places all of
'./src/'. The final (optional) step, ``make install'', places all of
the files in the required location.
To see the list of all the supported options, run `./configure --help`
To see the list of all the supported options, run
./configure --help
## Cross-compiling Options
Cross-compiling Options
-----------------------
Cross-compiling is supported the standard autotools way, you just need
to specify the cross-compiling target triplet in the --host option,
@ -286,26 +286,29 @@ additional wrapper script as described at
This is needed to tell pkg-config where to look for the target
libraries that OpenOCD depends on. Alternatively, you can specify
`*_CFLAGS` and `*_LIBS` environment variables directly, see `./configure
--help` for the details.
*_CFLAGS and *_LIBS environment variables directly, see "./configure
--help" for the details.
For a more or less complete script that does all this for you, see
contrib/cross-build.sh
## Parallel Port Dongles
Parallel Port Dongles
---------------------
If you want to access the parallel port using the PPDEV interface you
have to specify both `--enable-parport` and `--enable-parport-ppdev`, since
have to specify both --enable-parport AND --enable-parport-ppdev, since
the later option is an option to the parport driver.
The same is true for the `--enable-parport-giveio` option, you have to
use both the `--enable-parport` and the `--enable-parport-giveio` option
The same is true for the --enable-parport-giveio option, you have to
use both the --enable-parport AND the --enable-parport-giveio option
if you want to use giveio instead of ioperm parallel port access
method.
# Obtaining OpenOCD From GIT
==========================
Obtaining OpenOCD From GIT
==========================
You can download the current GIT version with a GIT client of your
choice from the main repository:
@ -323,7 +326,9 @@ directory called "openocd" in the current directory):
git clone git://git.code.sf.net/p/openocd/code openocd
Then you can update that at your convenience using `git pull`.
Then you can update that at your convenience using
git pull
There is also a gitweb interface, which you can use either to browse
the repository or to download arbitrary snapshots using HTTP:

2
README.Windows
View File

@ -52,5 +52,5 @@ port depending on which application to use.
For more information, see:
https://learn.microsoft.com/en-us/windows-hardware/drivers/usbcon/usb-device-specific-registry-settings
http://msdn.microsoft.com/en-us/library/windows/hardware/jj649944(v=vs.85).aspx
http://www.ftdichip.com/Support/Knowledgebase/index.html?ignorehardwareserialnumber.htm

2
TODO
View File

@ -202,6 +202,8 @@ https://lists.berlios.de/pipermail/openocd-development/2009-October/011506.html
- MC1322x support (JW/DE?)
- integrate and test support from JW (and DE?)
- get working with a known good interface (i.e. not today's jlink)
- AT91SAM92xx:
- improvements for unknown-board-atmel-at91sam9260.cfg (RD)
- STR9x: (ZW)
- improvements to str912.cfg to be more general purpose
- AVR: (SQ)

36
bootstrap
View File

@ -1,10 +1,8 @@
#!/bin/sh
# SPDX-License-Identifier: GPL-2.0-or-later
# Run the autotools bootstrap sequence to create the configure script
set -e # Abort execution on error.
set -u # Abort if you reference an undefined variable.
# Abort execution on error
set -e
if which libtoolize > /dev/null; then
libtoolize="libtoolize"
@ -15,23 +13,13 @@ else
exit 1
fi
WITH_SUBMODULES=0
case "$#" in
0) ;;
1) if [ "$1" = "with-submodules" ]; then
WITH_SUBMODULES=1
elif [ "$1" = "nosubmodule" ]; then
WITH_SUBMODULES=0
if [ "$1" = "nosubmodule" ]; then
SKIP_SUBMODULE=1
elif [ -n "$1" ]; then
echo "$0: Illegal argument $1" >&2
echo "USAGE: $0 [with-submodules]" >&2
echo "$0: Illegal argument $1"
echo "USAGE: $0 [nosubmodule]"
exit 1
fi;;
*) echo "$0: Wrong number of command-line arguments." >&2
echo "USAGE: $0 [with-submodules]" >&2
exit 1;;
esac
fi
# bootstrap the autotools
(
@ -44,12 +32,12 @@ autoheader --warnings=all
automake --warnings=all --gnu --add-missing --copy
)
if [ "$WITH_SUBMODULES" -ne 0 ]; then
echo "Setting up submodules"
git submodule sync
git submodule update --init
else
if [ -n "$SKIP_SUBMODULE" ]; then
echo "Skipping submodule setup"
else
echo "Setting up submodules"
git submodule init
git submodule update
fi
if [ -x src/jtag/drivers/libjaylink/autogen.sh ]; then

2
config_subdir.m4
View File

@ -7,6 +7,6 @@ AC_DEFUN([AX_CONFIG_SUBDIR_OPTION],
AC_CONFIG_SUBDIRS([$1])
m4_ifblank([$2], [rm -f $srcdir/$1/configure.gnu],
[printf '#!/bin/sh\nexec "`dirname "'\$'0"`/configure" '"$2"' "'\$'@"\n' > "$srcdir/$1/configure.gnu"
[echo -e '#!/bin/sh\nexec "`dirname "'\$'0"`/configure" '"$2"' "'\$'@"' > "$srcdir/$1/configure.gnu"
])
])

277
configure.ac
View File

@ -1,7 +1,5 @@
# SPDX-License-Identifier: GPL-2.0-or-later
AC_PREREQ([2.69])
AC_INIT([openocd], [0.12.0+dev],
AC_INIT([openocd], [0.11.0+dev],
[OpenOCD Mailing List <openocd-devel@lists.sourceforge.net>])
AC_CONFIG_SRCDIR([src/openocd.c])
AC_CONFIG_AUX_DIR([build-aux])
@ -26,12 +24,6 @@ AC_PROG_CC
m4_version_prereq([2.70],[],[AC_PROG_CC_C99])
AM_PROG_CC_C_O
AC_PROG_RANLIB
# If macro PKG_PROG_PKG_CONFIG is not available, Autoconf generates a misleading error message,
# so check for existence first, and otherwise provide helpful advice.
m4_ifndef([PKG_PROG_PKG_CONFIG], [m4_fatal(m4_normalize([
Macro PKG_PROG_PKG_CONFIG is not available.
It is usually defined in file pkg.m4 provided by package pkg-config.]))])
PKG_PROG_PKG_CONFIG([0.23])
dnl disable checks for C++, Fortran and GNU Java Compiler
@ -52,20 +44,15 @@ AC_SEARCH_LIBS([openpty], [util])
AC_CHECK_HEADERS([sys/socket.h])
AC_CHECK_HEADERS([elf.h])
AC_CHECK_TYPE([Elf64_Ehdr],
AC_DEFINE([HAVE_ELF64], [1], [Define to 1 if the system has the type 'Elf64_Ehdr'.]),
[], [[#include <elf.h>]])
AC_MSG_CHECKING([for glibc])
AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[#include <features.h>]], [[int v = __GLIBC__;return 0;]])],
[have_glibc=yes], [have_glibc=no])
AC_MSG_RESULT($have_glibc)
AC_EGREP_HEADER(Elf64_Ehdr, [elf.h], [
AC_DEFINE([HAVE_ELF64], [1], [Define to 1 if the system has the type `Elf64_Ehdr'.])
])
AC_CHECK_HEADERS([dirent.h])
AC_CHECK_HEADERS([fcntl.h])
AC_CHECK_HEADERS([malloc.h])
AC_CHECK_HEADERS([netdb.h])
AC_CHECK_HEADERS([poll.h])
AC_CHECK_HEADERS([pthread.h])
AC_CHECK_HEADERS([strings.h])
AC_CHECK_HEADERS([sys/ioctl.h])
AC_CHECK_HEADERS([sys/param.h])
@ -75,7 +62,7 @@ AC_CHECK_HEADERS([sys/sysctl.h])
AC_CHECK_HEADERS([sys/time.h])
AC_CHECK_HEADERS([sys/types.h])
AC_CHECK_HEADERS([unistd.h])
AC_CHECK_HEADERS([arpa/inet.h netinet/in.h netinet/tcp.h], [], [], [dnl
AC_CHECK_HEADERS([arpa/inet.h ifaddrs.h netinet/in.h netinet/tcp.h net/if.h], [], [], [dnl
#include <stdio.h>
#ifdef STDC_HEADERS
# include <stdlib.h>
@ -99,6 +86,7 @@ AC_CHECK_FUNCS([strndup])
AC_CHECK_FUNCS([strnlen])
AC_CHECK_FUNCS([gettimeofday])
AC_CHECK_FUNCS([usleep])
AC_CHECK_FUNCS([vasprintf])
AC_CHECK_FUNCS([realpath])
# guess-rev.sh only exists in the repository, not in the released archives
@ -111,28 +99,21 @@ AS_IF([test -x "$srcdir/guess-rev.sh"], [
AC_MSG_RESULT([$build_release])
# Adapter drivers
# 1st column -- Basename for the configure option generated with AC_ARG_ENABLE.
# For example, "buspirate" generates options "--enable-buspirate[=yes/no]"
# and "--disable-buspirate".
# 2nd column -- Description for the configure option. For example, "Bus Pirate"
# generates "Enable building support for the Bus Pirate (default is auto)".
# 3rd column -- Basename for the config.h and Automake symbols.
# For example, basename "BUS_PIRATE" generates "BUILD_BUS_PIRATE" with AC_DEFINE
# for config.h and "BUS_PIRATE" with AM_CONDITIONAL for Automake.
# 1st column -- configure option
# 2nd column -- description
# 3rd column -- symbol used for both config.h and automake
m4_define([ADAPTER_ARG], [m4_argn([1], $1)])
m4_define([ADAPTER_DESC], [m4_argn([2], $1)])
m4_define([ADAPTER_SYM], [m4_argn([3], $1)])
# AC_ARG_ENABLE uses prefix "enable_" to name the corresponding option variable.
m4_define([ADAPTER_VAR], [enable_[]ADAPTER_ARG($1)])
m4_define([ADAPTER_OPT], [m4_translit(ADAPTER_ARG($1), [_], [-])])
m4_define([USB1_ADAPTERS],
[[[ftdi], [MPSSE mode of FTDI based devices], [FTDI]],
[[ftdi_cjtag], [cJTAG (OScan1, JScan3) tunneled thru MPSSE], [FTDI_CJTAG]],
[[ftdi_oscan1], [cJTAG OSCAN1 tunneled thru MPSSE], [FTDI_OSCAN1]],
[[stlink], [ST-Link Programmer], [HLADAPTER_STLINK]],
[[ti_icdi], [TI ICDI JTAG Programmer], [HLADAPTER_ICDI]],
[[ulink], [Keil ULINK JTAG Programmer], [ULINK]],
[[angie], [ANGIE Adapter], [ANGIE]],
[[usb_blaster_2], [Altera USB-Blaster II Compatible], [USB_BLASTER_2]],
[[ft232r], [Bitbang mode of FT232R based devices], [FT232R]],
[[vsllink], [Versaloon-Link JTAG Programmer], [VSLLINK]],
@ -143,7 +124,7 @@ m4_define([USB1_ADAPTERS],
[[armjtagew], [Olimex ARM-JTAG-EW Programmer], [ARMJTAGEW]],
[[rlink], [Raisonance RLink JTAG Programmer], [RLINK]],
[[usbprog], [USBProg JTAG Programmer], [USBPROG]],
[[esp_usb_jtag], [Espressif JTAG Programmer], [ESP_USB_JTAG]]])
[[aice], [Andes JTAG Programmer], [AICE]]])
m4_define([HIDAPI_ADAPTERS],
[[[cmsis_dap], [CMSIS-DAP Compliant Debugger], [CMSIS_DAP_HID]],
@ -171,22 +152,9 @@ m4_define([PCIE_ADAPTERS],
m4_define([SERIAL_PORT_ADAPTERS],
[[[buspirate], [Bus Pirate], [BUS_PIRATE]]])
m4_define([LINUXSPIDEV_ADAPTER],
[[[linuxspidev], [Linux spidev driver], [LINUXSPIDEV]]])
m4_define([VDEBUG_ADAPTER],
[[[vdebug], [Cadence Virtual Debug Interface], [VDEBUG]]])
# The word 'Adapter' in "Dummy Adapter" below must begin with a capital letter
# because there is an M4 macro called 'adapter'.
m4_define([DUMMY_ADAPTER],
[[[dummy], [Dummy Adapter], [DUMMY]]])
m4_define([OPTIONAL_LIBRARIES],
[[[capstone], [Use Capstone disassembly framework], []]])
m4_define([COVERAGE],
[[[gcov], [Collect coverage using gcov], []]])
AC_ARG_ENABLE([doxygen-html],
AS_HELP_STRING([--disable-doxygen-html],
[Disable building Doxygen manual as HTML.]),
@ -215,19 +183,6 @@ AC_ARG_ENABLE([werror],
AS_HELP_STRING([--disable-werror], [Do not treat warnings as errors]),
[gcc_werror=$enableval], [gcc_werror=$gcc_warnings])
AC_ARG_ENABLE([gcov],
AS_HELP_STRING([--enable-gcov], [Enable runtime coverage collection via gcov]),
[enable_gcov=$enableval], [enable_gcov=no])
AS_IF([test "x$enable_gcov" = "xyes"], [
AC_DEFINE([USE_GCOV], [1], [1 to enable coverage collection using gcov.])
dnl When collecting coverage, disable optimizations.
dnl This overrides the "-O2" that autoconf uses by default:
CFLAGS+=" -O0"
], [
AC_DEFINE([USE_GCOV], [0], [0 to leave coverage collection disabled.])
])
# set default verbose options, overridden by following options
debug_usb_io=no
debug_usb_comms=no
@ -270,28 +225,24 @@ AC_ARG_ENABLE([malloc_logging],
AC_MSG_CHECKING([whether to enable malloc free space logging]);
AC_MSG_RESULT([$debug_malloc])
AS_IF([test "x$debug_malloc" = "xyes" -a "x$have_glibc" = "xyes"], [
AS_IF([test "x$debug_malloc" = "xyes"], [
AC_DEFINE([_DEBUG_FREE_SPACE_],[1], [Include malloc free space in logging])
])
AC_ARG_ENABLE([dummy],
AS_HELP_STRING([--enable-dummy], [Enable building the dummy port driver]),
[build_dummy=$enableval], [build_dummy=no])
AC_ARG_ENABLE([rshim],
AS_HELP_STRING([--enable-rshim], [Enable building the rshim driver]),
[build_rshim=$enableval], [build_rshim=no])
AC_ARG_ENABLE([dmem],
AS_HELP_STRING([--enable-dmem], [Enable building the dmem driver]),
[build_dmem=$enableval], [build_dmem=no])
m4_define([AC_ARG_ADAPTERS], [
m4_foreach([adapter], [$1],
[AC_ARG_ENABLE(ADAPTER_OPT([adapter]),
AS_HELP_STRING([--enable-ADAPTER_OPT([adapter])[[[=yes/no/auto]]]],
AS_HELP_STRING([--enable-ADAPTER_OPT([adapter])],
[Enable building support for the ]ADAPTER_DESC([adapter])[ (default is $2)]),
[case "${enableval}" in
yes|no|auto) ;;
*) AC_MSG_ERROR([Option --enable-ADAPTER_OPT([adapter]) has invalid value "${enableval}".]) ;;
esac],
[ADAPTER_VAR([adapter])=$2])
[], [ADAPTER_VAR([adapter])=$2])
])
])
@ -300,13 +251,9 @@ AC_ARG_ADAPTERS([
HIDAPI_ADAPTERS,
HIDAPI_USB1_ADAPTERS,
LIBFTDI_ADAPTERS,
LIBFTDI_USB1_ADAPTERS,
LIBFTDI_USB1_ADAPTERS
LIBGPIOD_ADAPTERS,
LINUXSPIDEV_ADAPTER,
SERIAL_PORT_ADAPTERS,
DUMMY_ADAPTER,
VDEBUG_ADAPTER,
PCIE_ADAPTERS,
LIBJAYLINK_ADAPTERS
],[auto])
@ -328,6 +275,10 @@ AC_ARG_ENABLE([jtag_vpi],
AS_HELP_STRING([--enable-jtag_vpi], [Enable building support for JTAG VPI]),
[build_jtag_vpi=$enableval], [build_jtag_vpi=no])
AC_ARG_ENABLE([vdebug],
AS_HELP_STRING([--enable-vdebug], [Enable building support for Cadence Virtual Debug Interface]),
[build_vdebug=$enableval], [build_vdebug=no])
AC_ARG_ENABLE([jtag_dpi],
AS_HELP_STRING([--enable-jtag_dpi], [Enable building support for JTAG DPI]),
[build_jtag_dpi=$enableval], [build_jtag_dpi=no])
@ -344,14 +295,10 @@ AS_CASE(["${host_cpu}"],
AC_ARG_ENABLE([imx_gpio],
AS_HELP_STRING([--enable-imx_gpio], [Enable building support for bitbanging on NXP IMX processors]),
[build_imx_gpio=$enableval], [build_imx_gpio=no])
AC_ARG_ENABLE([am335xgpio],
AS_HELP_STRING([--enable-am335xgpio], [Enable building support for bitbanging on AM335x (as found in Beaglebones)]),
[build_am335xgpio=$enableval], [build_am335xgpio=no])
],
[
build_bcm2835gpio=no
build_imx_gpio=no
build_am335xgpio=no
])
AS_CASE(["${host_cpu}"],
@ -377,42 +324,48 @@ AC_ARG_ENABLE([sysfsgpio],
AS_HELP_STRING([--enable-sysfsgpio], [Enable building support for programming driven via sysfs gpios.]),
[build_sysfsgpio=$enableval], [build_sysfsgpio=no])
AC_ARG_ENABLE([xlnx_pcie_xvc],
AS_HELP_STRING([--enable-xlnx-pcie-xvc], [Enable building support for Xilinx XVC/PCIe.]),
[build_xlnx_pcie_xvc=$enableval], [build_xlnx_pcie_xvc=no])
AS_CASE([$host_os],
[linux*], [
is_linux=yes
],
[linux*], [],
[
AS_IF([test "x$build_sysfsgpio" = "xyes"], [
AC_MSG_ERROR([sysfsgpio is only available on linux])
])
AS_IF([test "x$enable_linuxgpiod" = "xyes"], [
AC_MSG_ERROR([linuxgpiod is only available on linux])
])
AS_IF([test "x$build_xlnx_pcie_xvc" = "xyes"], [
AC_MSG_ERROR([xlnx_pcie_xvc is only available on linux])
])
AS_CASE([$host_os], [freebsd*], [],
[
AS_IF([test "x$build_rshim" = "xyes"], [
AC_MSG_ERROR([build_rshim is only available on linux or freebsd])
])
])
AS_IF([test "x$build_dmem" = "xyes"], [
AC_MSG_ERROR([dmem is only available on linux])
])
])
AC_ARG_ENABLE([internal-jimtcl],
AS_HELP_STRING([--enable-internal-jimtcl], [Enable building internal jimtcl (deprecated)]),
[use_internal_jimtcl=$enableval], [use_internal_jimtcl=no])
AS_HELP_STRING([--disable-internal-jimtcl], [Disable building internal jimtcl]),
[use_internal_jimtcl=$enableval], [use_internal_jimtcl=yes])
AC_ARG_ENABLE([jimtcl-maintainer],
AS_HELP_STRING([--enable-jimtcl-maintainer], [Enable maintainer mode when building internal jimtcl]),
[use_internal_jimtcl_maintainer=$enableval], [use_internal_jimtcl_maintainer=no])
AC_ARG_ENABLE([internal-libjaylink],
AS_HELP_STRING([--enable-internal-libjaylink],
[Enable building internal libjaylink]),
[use_internal_libjaylink=$enableval], [use_internal_libjaylink=no])
AS_HELP_STRING([--disable-internal-libjaylink],
[Disable building internal libjaylink]),
[use_internal_libjaylink=$enableval], [use_internal_libjaylink=yes])
AC_ARG_ENABLE([remote-bitbang],
AS_HELP_STRING([--enable-remote-bitbang], [Enable building support for the Remote Bitbang driver]),
AS_HELP_STRING([--enable-remote-bitbang], [Enable building support for the Remote Bitbang jtag driver]),
[build_remote_bitbang=$enableval], [build_remote_bitbang=yes])
AS_CASE(["${host_cpu}"],
@ -424,10 +377,8 @@ AS_CASE(["${host_cpu}"],
parport_use_ppdev=yes
])
can_build_buspirate=yes
AS_CASE([$host_os],
[cygwin*], [
AS_CASE([$host],
[*-cygwin*], [
is_win32=yes
parport_use_ppdev=no
@ -447,7 +398,7 @@ AS_CASE([$host_os],
])
])
],
[mingw* | msys*], [
[*-mingw* | *-msys*], [
is_mingw=yes
is_win32=yes
parport_use_ppdev=no
@ -457,16 +408,16 @@ AS_CASE([$host_os],
])
parport_use_giveio=yes
AS_IF([test "x$ADAPTER_VAR([buspirate])" = "xyes"], [
AC_MSG_ERROR([The Bus Pirate adapter is currently not supported by MinGW32 hosts.])
AS_IF([test "x$enable_buspirate" = "xyes"], [
AC_MSG_ERROR([buspirate currently not supported by MinGW32 hosts])
])
# In case enable_buspirate=auto, make sure it will not be built.
can_build_buspirate=no
enable_buspirate=no
AC_SUBST([HOST_CPPFLAGS], ["-D__USE_MINGW_ANSI_STDIO -DFD_SETSIZE=128"])
AC_SUBST([HOST_CPPFLAGS], [-D__USE_MINGW_ANSI_STDIO])
],
[darwin*], [
[*darwin*], [
is_darwin=yes
AS_IF([test "x$parport_use_giveio" = "xyes"], [
@ -518,14 +469,11 @@ AS_IF([test "x$build_rshim" = "xyes"], [
AC_DEFINE([BUILD_RSHIM], [0], [0 if you don't want to debug BlueField SoC via rshim.])
])
AS_IF([test "x$build_dmem" = "xyes"], [
AC_DEFINE([BUILD_DMEM], [1], [1 if you want to debug via Direct Mem.])
], [
AC_DEFINE([BUILD_DMEM], [0], [0 if you don't want to debug via Direct Mem.])
])
AS_IF([test "x$ADAPTER_VAR([dummy])" != "xno"], [
AS_IF([test "x$build_dummy" = "xyes"], [
build_bitbang=yes
AC_DEFINE([BUILD_DUMMY], [1], [1 if you want dummy driver.])
], [
AC_DEFINE([BUILD_DUMMY], [0], [0 if you don't want dummy driver.])
])
AS_IF([test "x$build_ep93xx" = "xyes"], [
@ -556,13 +504,6 @@ AS_IF([test "x$build_imx_gpio" = "xyes"], [
AC_DEFINE([BUILD_IMX_GPIO], [0], [0 if you don't want imx_gpio.])
])
AS_IF([test "x$build_am335xgpio" = "xyes"], [
build_bitbang=yes
AC_DEFINE([BUILD_AM335XGPIO], [1], [1 if you want am335xgpio.])
], [
AC_DEFINE([BUILD_AM335XGPIO], [0], [0 if you don't want am335xgpio.])
])
AS_IF([test "x$parport_use_ppdev" = "xyes"], [
AC_DEFINE([PARPORT_USE_PPDEV], [1], [1 if you want parport to use ppdev.])
], [
@ -581,6 +522,12 @@ AS_IF([test "x$build_jtag_vpi" = "xyes"], [
AC_DEFINE([BUILD_JTAG_VPI], [0], [0 if you don't want JTAG VPI.])
])
AS_IF([test "x$build_vdebug" = "xyes"], [
AC_DEFINE([BUILD_VDEBUG], [1], [1 if you want Cadence vdebug interface.])
], [
AC_DEFINE([BUILD_VDEBUG], [0], [0 if you don't want Cadence vdebug interface.])
])
AS_IF([test "x$build_jtag_dpi" = "xyes"], [
AC_DEFINE([BUILD_JTAG_DPI], [1], [1 if you want JTAG DPI.])
], [
@ -600,33 +547,30 @@ AS_IF([test "x$build_gw16012" = "xyes"], [
AC_DEFINE([BUILD_GW16012], [0], [0 if you don't want the Gateworks GW16012 driver.])
])
AS_IF([test "x$use_internal_jimtcl" = "xyes"], [
AS_IF([test -f "$srcdir/jimtcl/configure"], [
AS_IF([test "x$use_internal_jimtcl_maintainer" = "xyes"], [
jimtcl_config_options="--disable-install-jim --with-ext=json --minimal --disable-ssl --maintainer"
AS_IF([test "x$enable_buspirate" != "xno"], [
AC_DEFINE([BUILD_BUSPIRATE], [1], [1 if you want the Buspirate JTAG driver.])
], [
jimtcl_config_options="--disable-install-jim --with-ext=json --minimal --disable-ssl"
AC_DEFINE([BUILD_BUSPIRATE], [0], [0 if you don't want the Buspirate JTAG driver.])
])
AS_IF([test "x$use_internal_jimtcl" = "xyes"], [
AS_IF([test -f "$srcdir/jimtcl/configure.ac"], [
AS_IF([test "x$use_internal_jimtcl_maintainer" = "xyes"], [
jimtcl_config_options="--disable-install-jim --maintainer"
], [
jimtcl_config_options="--disable-install-jim"
])
AX_CONFIG_SUBDIR_OPTION([jimtcl], [$jimtcl_config_options])
], [
AC_MSG_ERROR([jimtcl not found, run git submodule init and git submodule update.])
])
], [
PKG_CHECK_MODULES([JIMTCL], [jimtcl >= 0.79], [
have_jimtcl_pkg_config=yes
], [
have_jimtcl_pkg_config=no
AC_CHECK_HEADER([jim.h], [], [
AC_MSG_ERROR([jimtcl is required but not found via pkg-config and system includes])
])
])
])
AS_IF([test "x$build_remote_bitbang" = "xyes"], [
build_bitbang=yes
AC_DEFINE([BUILD_REMOTE_BITBANG], [1], [1 if you want the Remote Bitbang driver.])
AC_DEFINE([BUILD_REMOTE_BITBANG], [1], [1 if you want the Remote Bitbang JTAG driver.])
], [
AC_DEFINE([BUILD_REMOTE_BITBANG], [0], [0 if you don't want the Remote Bitbang driver.])
AC_DEFINE([BUILD_REMOTE_BITBANG], [0], [0 if you don't want the Remote Bitbang JTAG driver.])
])
AS_IF([test "x$build_sysfsgpio" = "xyes"], [
@ -636,6 +580,13 @@ AS_IF([test "x$build_sysfsgpio" = "xyes"], [
AC_DEFINE([BUILD_SYSFSGPIO], [0], [0 if you don't want SysfsGPIO driver.])
])
AS_IF([test "x$build_xlnx_pcie_xvc" = "xyes"], [
build_xlnx_pcie_xvc=yes
AC_DEFINE([BUILD_XLNX_PCIE_XVC], [1], [1 if you want the Xilinx XVC/PCIe driver.])
], [
AC_DEFINE([BUILD_XLNX_PCIE_XVC], [0], [0 if you don't want Xilinx XVC/PCIe driver.])
])
PKG_CHECK_MODULES([LIBUSB1], [libusb-1.0], [
use_libusb1=yes
AC_DEFINE([HAVE_LIBUSB1], [1], [Define if you have libusb-1.x])
@ -660,6 +611,7 @@ AS_IF([test "x$enable_capstone" != xno], [
PKG_CHECK_MODULES([CAPSTONE], [capstone], [
AC_DEFINE([HAVE_CAPSTONE], [1], [1 if you have Capstone disassembly framework.])
], [
AC_DEFINE([HAVE_CAPSTONE], [0], [0 if you don't have Capstone disassembly framework.])
if test "x$enable_capstone" != xauto; then
AC_MSG_ERROR([--with-capstone was given, but test for Capstone failed])
fi
@ -667,10 +619,6 @@ AS_IF([test "x$enable_capstone" != xno], [
])
])
AS_IF([test "x$enable_capstone" == xno], [
AC_DEFINE([HAVE_CAPSTONE], [0], [0 if you don't have Capstone disassembly framework.])
])
for hidapi_lib in hidapi hidapi-hidraw hidapi-libusb; do
PKG_CHECK_MODULES([HIDAPI],[$hidapi_lib],[
use_hidapi=yes
@ -688,20 +636,11 @@ PKG_CHECK_MODULES([LIBFTDI], [libftdi1], [
PKG_CHECK_MODULES([LIBFTDI], [libftdi], [use_libftdi=yes], [use_libftdi=no])
])
PKG_CHECK_MODULES([LIBGPIOD], [libgpiod < 2.0], [
use_libgpiod=yes
PKG_CHECK_EXISTS([libgpiod >= 1.5],
[AC_DEFINE([HAVE_LIBGPIOD1_FLAGS_BIAS], [1], [define if libgpiod v1 has line request flags bias])])
], [use_libgpiod=no])
PKG_CHECK_MODULES([LIBGPIOD], [libgpiod], [use_libgpiod=yes], [use_libgpiod=no])
PKG_CHECK_MODULES([LIBJAYLINK], [libjaylink >= 0.2],
[use_libjaylink=yes], [use_libjaylink=no])
# Arg $1: An array of adapter triplets, used to derive option and variable names for each adapter.
# Arg $2: Whether the adapters can be enabled, for example, because
# their prerequisites are installed in the system.
# Arg $3: What prerequisites are missing, to be shown in an error message
# if an adapter was requested but cannot be enabled.
m4_define([PROCESS_ADAPTERS], [
m4_foreach([adapter], [$1], [
AS_IF([test $2], [
@ -712,7 +651,7 @@ m4_define([PROCESS_ADAPTERS], [
])
], [
AS_IF([test "x$ADAPTER_VAR([adapter])" = "xyes"], [
AC_MSG_ERROR([$3 is required for [adapter] "ADAPTER_DESC([adapter])".])
AC_MSG_ERROR([$3 is required for the ADAPTER_DESC([adapter])])
])
ADAPTER_VAR([adapter])=no
AC_DEFINE([BUILD_]ADAPTER_SYM([adapter]), [0], [0 if you do not want the ]ADAPTER_DESC([adapter]).)
@ -726,14 +665,8 @@ PROCESS_ADAPTERS([HIDAPI_ADAPTERS], ["x$use_hidapi" = "xyes"], [hidapi])
PROCESS_ADAPTERS([HIDAPI_USB1_ADAPTERS], ["x$use_hidapi" = "xyes" -a "x$use_libusb1" = "xyes"], [hidapi and libusb-1.x])
PROCESS_ADAPTERS([LIBFTDI_ADAPTERS], ["x$use_libftdi" = "xyes"], [libftdi])
PROCESS_ADAPTERS([LIBFTDI_USB1_ADAPTERS], ["x$use_libftdi" = "xyes" -a "x$use_libusb1" = "xyes"], [libftdi and libusb-1.x])
PROCESS_ADAPTERS([LIBGPIOD_ADAPTERS], ["x$use_libgpiod" = "xyes"], [Linux libgpiod])
PROCESS_ADAPTERS([LIBGPIOD_ADAPTERS], ["x$use_libgpiod" = "xyes"], [libgpiod])
PROCESS_ADAPTERS([LIBJAYLINK_ADAPTERS], ["x$use_internal_libjaylink" = "xyes" -o "x$use_libjaylink" = "xyes"], [libjaylink-0.2])
PROCESS_ADAPTERS([PCIE_ADAPTERS], ["x$is_linux" = "xyes"], [Linux build])
PROCESS_ADAPTERS([SERIAL_PORT_ADAPTERS], ["x$can_build_buspirate" = "xyes"],
[internal error: validation should happen beforehand])
PROCESS_ADAPTERS([LINUXSPIDEV_ADAPTER], ["x$is_linux" = "xyes"], [Linux spidev])
PROCESS_ADAPTERS([VDEBUG_ADAPTER], [true], [unused])
PROCESS_ADAPTERS([DUMMY_ADAPTER], [true], [unused])
AS_IF([test "x$enable_linuxgpiod" != "xno"], [
build_bitbang=yes
@ -756,7 +689,7 @@ AS_IF([test "x$enable_jlink" != "xno"], [
AX_CONFIG_SUBDIR_OPTION([src/jtag/drivers/libjaylink],
[--enable-subproject-build])
], [
AC_MSG_ERROR([Internal libjaylink not found, run 'git submodule init' and 'git submodule update'.])
AC_MSG_ERROR([Internal libjaylink not found, run either 'git submodule init' and 'git submodule update' or disable internal libjaylink with --disable-internal-libjaylink.])
])
])
])
@ -766,27 +699,25 @@ AS_IF([test "x$enable_presto" != "xno"], [
build_bitq=yes
])
# esp-usb-jtag also needs the bitq module
AS_IF([test "x$enable_esp_usb_jtag" != "xno"], [
build_bitq=yes
])
AM_CONDITIONAL([RELEASE], [test "x$build_release" = "xyes"])
AM_CONDITIONAL([PARPORT], [test "x$build_parport" = "xyes"])
AM_CONDITIONAL([DUMMY], [test "x$build_dummy" = "xyes"])
AM_CONDITIONAL([GIVEIO], [test "x$parport_use_giveio" = "xyes"])
AM_CONDITIONAL([EP93XX], [test "x$build_ep93xx" = "xyes"])
AM_CONDITIONAL([AT91RM9200], [test "x$build_at91rm9200" = "xyes"])
AM_CONDITIONAL([BCM2835GPIO], [test "x$build_bcm2835gpio" = "xyes"])
AM_CONDITIONAL([IMX_GPIO], [test "x$build_imx_gpio" = "xyes"])
AM_CONDITIONAL([AM335XGPIO], [test "x$build_am335xgpio" = "xyes"])
AM_CONDITIONAL([BITBANG], [test "x$build_bitbang" = "xyes"])
AM_CONDITIONAL([JTAG_VPI], [test "x$build_jtag_vpi" = "xyes"])
AM_CONDITIONAL([VDEBUG], [test "x$build_vdebug" = "xyes"])
AM_CONDITIONAL([JTAG_DPI], [test "x$build_jtag_dpi" = "xyes"])
AM_CONDITIONAL([USB_BLASTER_DRIVER], [test "x$enable_usb_blaster" != "xno" -o "x$enable_usb_blaster_2" != "xno"])
AM_CONDITIONAL([AMTJTAGACCEL], [test "x$build_amtjtagaccel" = "xyes"])
AM_CONDITIONAL([GW16012], [test "x$build_gw16012" = "xyes"])
AM_CONDITIONAL([REMOTE_BITBANG], [test "x$build_remote_bitbang" = "xyes"])
AM_CONDITIONAL([BUSPIRATE], [test "x$enable_buspirate" != "xno"])
AM_CONDITIONAL([SYSFSGPIO], [test "x$build_sysfsgpio" = "xyes"])
AM_CONDITIONAL([XLNX_PCIE_XVC], [test "x$build_xlnx_pcie_xvc" = "xyes"])
AM_CONDITIONAL([USE_LIBUSB1], [test "x$use_libusb1" = "xyes"])
AM_CONDITIONAL([IS_CYGWIN], [test "x$is_cygwin" = "xyes"])
AM_CONDITIONAL([IS_MINGW], [test "x$is_mingw" = "xyes"])
@ -798,15 +729,11 @@ AM_CONDITIONAL([USE_LIBGPIOD], [test "x$use_libgpiod" = "xyes"])
AM_CONDITIONAL([USE_HIDAPI], [test "x$use_hidapi" = "xyes"])
AM_CONDITIONAL([USE_LIBJAYLINK], [test "x$use_libjaylink" = "xyes"])
AM_CONDITIONAL([RSHIM], [test "x$build_rshim" = "xyes"])
AM_CONDITIONAL([DMEM], [test "x$build_dmem" = "xyes"])
AM_CONDITIONAL([HAVE_CAPSTONE], [test "x$enable_capstone" != "xno"])
AM_CONDITIONAL([INTERNAL_JIMTCL], [test "x$use_internal_jimtcl" = "xyes"])
AM_CONDITIONAL([HAVE_JIMTCL_PKG_CONFIG], [test "x$have_jimtcl_pkg_config" = "xyes"])
AM_CONDITIONAL([INTERNAL_LIBJAYLINK], [test "x$use_internal_libjaylink" = "xyes"])
AM_CONDITIONAL([USE_GCOV], [test "x$enable_gcov" = "xyes"])
# Look for environ alternatives. Possibility #1: is environ in unistd.h or stdlib.h?
AC_MSG_CHECKING([for environ in unistd.h and stdlib.h])
AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
@ -849,6 +776,7 @@ AS_IF([test "x${gcc_wextra}" = "xyes"], [
GCC_WARNINGS="${GCC_WARNINGS} -Wredundant-decls"
GCC_WARNINGS="${GCC_WARNINGS} -Wpointer-arith"
GCC_WARNINGS="${GCC_WARNINGS} -Wundef"
GCC_WARNINGS="${GCC_WARNINGS} -Wno-error=deprecated-declarations"
])
AS_IF([test "x${gcc_werror}" = "xyes"], [
GCC_WARNINGS="${GCC_WARNINGS} -Werror"
@ -866,16 +794,6 @@ AC_CONFIG_FILES([
])
AC_OUTPUT
AS_IF([test "x$enable_jlink" != "xno"], [
AS_IF([test "x$use_internal_libjaylink" = "xyes"], [
AC_MSG_WARN([Using the internal libjaylink is deprecated and will not be possible in the future.])
]])
)
AS_IF([test "x$use_internal_jimtcl" = "xyes"], [
AC_MSG_WARN([Using the internal jimtcl is deprecated and will not be possible in the future.])
])
echo
echo
echo OpenOCD configuration summary
@ -885,11 +803,7 @@ m4_foreach([adapter], [USB1_ADAPTERS,
LIBFTDI_USB1_ADAPTERS,
LIBGPIOD_ADAPTERS,
LIBJAYLINK_ADAPTERS, PCIE_ADAPTERS, SERIAL_PORT_ADAPTERS,
LINUXSPIDEV_ADAPTER,
VDEBUG_ADAPTER,
DUMMY_ADAPTER,
OPTIONAL_LIBRARIES,
COVERAGE],
OPTIONAL_LIBRARIES],
[s=m4_format(["%-40s"], ADAPTER_DESC([adapter]))
AS_CASE([$ADAPTER_VAR([adapter])],
[auto], [
@ -900,11 +814,6 @@ m4_foreach([adapter], [USB1_ADAPTERS,
],
[no], [
echo "$s"no
],
[
AC_MSG_ERROR(m4_normalize([
Error in [adapter] "ADAPTER_ARG([adapter])": Variable "ADAPTER_VAR([adapter])"
has invalid value "$ADAPTER_VAR([adapter])".]))
])
])
echo

36
contrib/60-openocd.rules
View File

@ -1,5 +1,3 @@
# SPDX-License-Identifier: GPL-2.0-or-later
# Copy this file to /etc/udev/rules.d/
# If rules fail to reload automatically, you can refresh udev rules
# with the command "udevadm control --reload"
@ -29,27 +27,6 @@ ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6014", MODE="660", GROUP="plugdev",
# Original FT231XQ VID:PID
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6015", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Original FT2233HP VID:PID
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6040", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Original FT4233HP VID:PID
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6041", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Original FT2232HP VID:PID
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6042", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Original FT4232HP VID:PID
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6043", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Original FT233HP VID:PID
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6044", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Original FT232HP VID:PID
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6045", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Original FT4232HA VID:PID
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6048", MODE="660", GROUP="plugdev", TAG+="uaccess"
# DISTORTEC JTAG-lock-pick Tiny 2
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="8220", MODE="660", GROUP="plugdev", TAG+="uaccess"
@ -120,8 +97,6 @@ ATTRS{idVendor}=="0483", ATTRS{idProduct}=="374e", MODE="660", GROUP="plugdev",
ATTRS{idVendor}=="0483", ATTRS{idProduct}=="374f", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3753", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3754", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3755", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3757", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Cypress SuperSpeed Explorer Kit
ATTRS{idVendor}=="04b4", ATTRS{idProduct}=="0007", MODE="660", GROUP="plugdev", TAG+="uaccess"
@ -241,17 +216,6 @@ ATTRS{idVendor}=="2aec", ATTRS{idProduct}=="6010", MODE="660", GROUP="plugdev",
ATTRS{idVendor}=="2aec", ATTRS{idProduct}=="6011", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="2aec", ATTRS{idProduct}=="1106", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Espressif USB JTAG/serial debug units
ATTRS{idVendor}=="303a", ATTRS{idProduct}=="1001", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="303a", ATTRS{idProduct}=="1002", MODE="660", GROUP="plugdev", TAG+="uaccess"
# ANGIE USB-JTAG Adapter
ATTRS{idVendor}=="584e", ATTRS{idProduct}=="414f", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="584e", ATTRS{idProduct}=="424e", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="584e", ATTRS{idProduct}=="4255", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="584e", ATTRS{idProduct}=="4355", MODE="660", GROUP="plugdev", TAG+="uaccess"
ATTRS{idVendor}=="584e", ATTRS{idProduct}=="4a55", MODE="660", GROUP="plugdev", TAG+="uaccess"
# Marvell Sheevaplug
ATTRS{idVendor}=="9e88", ATTRS{idProduct}=="9e8f", MODE="660", GROUP="plugdev", TAG+="uaccess"

28
contrib/buildroot/openocd_be_defconfig
View File

@ -1,28 +0,0 @@
# SPDX-License-Identifier: GPL-2.0-or-later
BR2_armeb=y
BR2_cortex_a7=y
BR2_TOOLCHAIN_EXTERNAL=y
BR2_PACKAGE_OPENOCD=y
BR2_PACKAGE_OPENOCD_FTDI=y
BR2_PACKAGE_OPENOCD_STLINK=y
BR2_PACKAGE_OPENOCD_TI_ICDI=y
BR2_PACKAGE_OPENOCD_ULINK=y
BR2_PACKAGE_OPENOCD_UBLASTER2=y
BR2_PACKAGE_OPENOCD_JLINK=y
BR2_PACKAGE_OPENOCD_OSDBM=y
BR2_PACKAGE_OPENOCD_OPENDOUS=y
BR2_PACKAGE_OPENOCD_VSLLINK=y
BR2_PACKAGE_OPENOCD_USBPROG=y
BR2_PACKAGE_OPENOCD_RLINK=y
BR2_PACKAGE_OPENOCD_ARMEW=y
BR2_PACKAGE_OPENOCD_XDS110=y
BR2_PACKAGE_OPENOCD_PARPORT=y
BR2_PACKAGE_OPENOCD_VPI=y
BR2_PACKAGE_OPENOCD_UBLASTER=y
BR2_PACKAGE_OPENOCD_AMTJT=y
BR2_PACKAGE_OPENOCD_GW16012=y
BR2_PACKAGE_OPENOCD_PRESTO=y
BR2_PACKAGE_OPENOCD_OPENJTAG=y
BR2_PACKAGE_OPENOCD_BUSPIRATE=y
BR2_PACKAGE_OPENOCD_SYSFS=y

68
contrib/coresight-trace.txt Normal file
View File

@ -0,0 +1,68 @@
+OpenOCD and CoreSight Tracing
+
Many recent ARM chips (Using e..g. Cortex-M3 and
Cortex-M4 cores) support CoreSight debug/trace.
This note sketches an approach currently planned for those cores
with OpenOCD.
This tracing data can help debug and tune ARM software, but not
all cores support tracing. Some support more extensive tracing
other cores with trace support +should be able to use the same
approach and maybe some of the same analysis code.
+the Cortex-M3 is assumed here to be the
+core in use, for simplicity and to reflect current OpenOCD users.
This note summarizes a software model to generate, collect, and
analyze such trace data . That is not fully implemented as of early
January 2011, +and thus is not *yet* usable.
+
+
+Some microcontroller cores support a low pin-count Single-wire trace,
with a mode where +trace data is emitted (usually to a UART. To use
this mode, +SWD must be in use.
+At this writing, OpenOCD SWD support is not yet complete either.
(There are also multi-wire trace ports requiring more complex debug
adapters than OpenOCD currently supports, and offering richer data.
+
+
+* ENABLING involves activating SWD and (single wire) trace.
+
+current expectations are that OpenOCD itself will handle enabling;
activating single wire trace involves a debug adapter interaction, and
collecting that trace data requires particular (re)wiring.
+
+* CONFIGURATION involves setting up ITM and/or ETM modules to emit the
+desired data from the Cortex core. (This might include dumping
+event counters printf-style messages; code profiling; and more. Not all
+cores offer the same trace capabilities.
+
+current expectations are that Tcl scripts will be used to configure these
+modules for the desired tracing, by direct writes to registers. In some
+cases (as with RTOS event tracking and similar messaging, this might
+be augmented or replaced by user code running on the ARM core.
+
+COLLECTION involves reading that trace data, probably through UART, and
+saving it in a useful format to analyse For now, deferred analysis modes
are assumed, not than real-time or interactive ones.
+
+
+current expectations are to to dump data in text using contrib/itmdump.c
+or derived tools, and to post-process it into reports. Such reports might
+include program messaging (such as application data streams via ITM, maybe
+using printf type messaging; code coverage analysis or so forth. Recent
+versions of CMSIS software reserve some ITM codespace for RTOS event
tracing and include ITM messaging support.
Clearly some of that data would be valuable for interactive debugging.
+
+Should someone get ambitious, GUI reports should be possible. GNU tools
+for simpler reports like gprof may be simpler to support at first.
+In any case, OpenOCD is not currently GUI-oriented. Accordingly, we now
+expect any such graphics to come from postprocessing.
measurements for RTOS event timings should also be easy to collect.
+Examples include context and message switch times, as well as times
for application interactions.
+

47
contrib/cross-build.sh
View File

@ -1,5 +1,4 @@
#!/bin/sh
# SPDX-License-Identifier: GPL-2.0-or-later
# This is an example of how to do a cross-build of OpenOCD using pkg-config.
# Cross-building with pkg-config is deceptively hard and most guides and
@ -24,7 +23,7 @@
# export HIDAPI_SRC=/path/to/hidapi
# export OPENOCD_CONFIG="--enable-..."
# cd /work/dir
# /path/to/openocd/contrib/cross-build.sh <host-triplet>
# .../path/to/openocd/contrib/cross-build.sh <host-triplet>
#
# For static linking, a workaround is to
# export LIBUSB1_CONFIG="--enable-static --disable-shared"
@ -41,16 +40,12 @@ WORK_DIR=$PWD
: ${HIDAPI_SRC:=/path/to/hidapi}
: ${LIBFTDI_SRC:=/path/to/libftdi}
: ${CAPSTONE_SRC:=/path/to/capstone}
: ${LIBJAYLINK_SRC:=/path/to/libjaylink}
: ${JIMTCL_SRC:=/path/to/jimtcl}
OPENOCD_SRC=`readlink -m $OPENOCD_SRC`
LIBUSB1_SRC=`readlink -m $LIBUSB1_SRC`
HIDAPI_SRC=`readlink -m $HIDAPI_SRC`
LIBFTDI_SRC=`readlink -m $LIBFTDI_SRC`
CAPSTONE_SRC=`readlink -m $CAPSTONE_SRC`
LIBJAYLINK_SRC=`readlink -m $LIBJAYLINK_SRC`
JIMTCL_SRC=`readlink -m $JIMTCL_SRC`
HOST_TRIPLET=$1
BUILD_DIR=$WORK_DIR/$HOST_TRIPLET-build
@ -58,8 +53,6 @@ LIBUSB1_BUILD_DIR=$BUILD_DIR/libusb1
HIDAPI_BUILD_DIR=$BUILD_DIR/hidapi
LIBFTDI_BUILD_DIR=$BUILD_DIR/libftdi
CAPSTONE_BUILD_DIR=$BUILD_DIR/capstone
LIBJAYLINK_BUILD_DIR=$BUILD_DIR/libjaylink
JIMTCL_BUILD_DIR=$BUILD_DIR/jimtcl
OPENOCD_BUILD_DIR=$BUILD_DIR/openocd
## Root of host file tree
@ -128,17 +121,11 @@ fi
if [ -d $LIBFTDI_SRC ] ; then
mkdir -p $LIBFTDI_BUILD_DIR
cd $LIBFTDI_BUILD_DIR
# note : libftdi versions < 1.5 requires libusb1 static
# hint use : # export LIBUSB1_CONFIG="--enable-static ..."
# not needed since libftdi-1.5 when LIBFTDI_CONFIG="-DSTATICLIBS=OFF ..."
# fix <toolchain>.cmake file
ESCAPED_SYSROOT=$(printf '%s\n' "$SYSROOT" | sed -e 's/[\/&]/\\&/g')
sed -i -E "s/(SET\(CMAKE_FIND_ROOT_PATH\s+).+\)/\1${ESCAPED_SYSROOT})/" \
${LIBFTDI_SRC}/cmake/Toolchain-${HOST_TRIPLET}.cmake
# libftdi requires libusb1 static libraries, granted by:
# export LIBUSB1_CONFIG="--enable-static ..."
cmake $LIBFTDI_CONFIG \
-DCMAKE_TOOLCHAIN_FILE=${LIBFTDI_SRC}/cmake/Toolchain-${HOST_TRIPLET}.cmake \
-DLIBUSB_INCLUDE_DIR=${SYSROOT}${PREFIX}/include/libusb-1.0 \
-DLIBUSB_LIBRARIES=${SYSROOT}${PREFIX}/lib/libusb-1.0.a \
-DCMAKE_INSTALL_PREFIX=${PREFIX} \
-DPKG_CONFIG_EXECUTABLE=`which pkg-config` \
$LIBFTDI_SRC
@ -161,31 +148,9 @@ if [ -d $CAPSTONE_SRC ] ; then
sed -i '1s;^;prefix=/usr \
exec_prefix=${prefix} \
libdir=${exec_prefix}/lib \
includedir=${prefix}/include/capstone\n\n;' $CAPSTONE_PC_FILE
includedir=${prefix}/include\n\n;' $CAPSTONE_PC_FILE
fi
# libjaylink build & install into sysroot
if [ -d $LIBJAYLINK_SRC ] ; then
mkdir -p $LIBJAYLINK_BUILD_DIR
cd $LIBJAYLINK_BUILD_DIR
$LIBJAYLINK_SRC/configure --build=`$LIBJAYLINK_SRC/config.guess` --host=$HOST_TRIPLET \
--with-sysroot=$SYSROOT --prefix=$PREFIX \
$LIBJAYLINK_CONFIG
make -j $MAKE_JOBS
make install DESTDIR=$SYSROOT
fi
# jimtcl build & install into sysroot
if [ -d $JIMTCL_SRC ] ; then
mkdir -p $JIMTCL_BUILD_DIR
cd $JIMTCL_BUILD_DIR
$JIMTCL_SRC/configure --host=$HOST_TRIPLET --prefix=$PREFIX \
$JIMTCL_CONFIG
make -j $MAKE_JOBS
# Running "make" does not create this file for static builds on Windows but "make install" still expects it
touch $JIMTCL_BUILD_DIR/build-jim-ext
make install DESTDIR=$SYSROOT
fi
# OpenOCD build & install into sysroot
mkdir -p $OPENOCD_BUILD_DIR

79
contrib/firmware/angie/c/Makefile
View File

@ -1,79 +0,0 @@
# SPDX-License-Identifier: GPL-2.0-or-later
#****************************************************************************
# File : Makefile *
# Contents : Code for NanoXplore USB-JTAG ANGIE adapter hardware. *
# Based on openULINK project by: Martin Schmoelzer. *
# Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
# <aboudjelida@nanoxplore.com> *
# <ahmederrachedbjld@gmail.com> *
# ***************************************************************************/
# Define the name of tools.
PREFIX =
# Small Device C Compiler: http://sdcc.sourceforge.net/
CC = $(PREFIX)sdcc
# 8051 assembler, part of the SDCC software package.
AS = $(PREFIX)sdas8051
# SDCC produces quite messy Intel HEX files. This tool is be used to re-format
# those files. It is not required for the firmware download functionality in
# the OpenOCD driver, but the resulting file is smaller.
PACKIHX = $(PREFIX)packihx
# GNU binutils size. Used to print the size of the IHX file generated by SDCC.
SIZE = size
# Source and header directories.
SRC_DIR = src
INCLUDE_DIR = include
CODE_SIZE = 0x3C00
XRAM_LOC = 0x3C00
XRAM_SIZE = 0x0400
CFLAGS = --std-sdcc99 --opt-code-size --model-small
LDFLAGS = --code-loc 0x0000 --code-size $(CODE_SIZE) --xram-loc $(XRAM_LOC) \
--xram-size $(XRAM_SIZE) --iram-size 256 --model-small
# list of base object files
OBJECTS = main.rel usb.rel protocol.rel jtag.rel delay.rel USBJmpTb.rel serial.rel gpif.rel i2c.rel
HEADERS = $(INCLUDE_DIR)/usb.h \
$(INCLUDE_DIR)/protocol.h \
$(INCLUDE_DIR)/jtag.h \
$(INCLUDE_DIR)/delay.h \
$(INCLUDE_DIR)/reg_ezusb.h \
$(INCLUDE_DIR)/io.h \
$(INCLUDE_DIR)/serial.h \
$(INCLUDE_DIR)/fx2macros.h \
$(INCLUDE_DIR)/msgtypes.h \
$(INCLUDE_DIR)/i2c.h
# Disable all built-in rules.
.SUFFIXES:
# Targets which are executed even when identically named file is present.
.PHONY: all, clean
all: angie_firmware.ihx
$(SIZE) angie_firmware.ihx
angie_firmware.ihx: $(OBJECTS)
$(CC) -mmcs51 $(LDFLAGS) -o $@ $^
# Rebuild every C module (there are only 8 of them) if any header changes.
%.rel: $(SRC_DIR)/%.c $(HEADERS)
$(CC) -c $(CFLAGS) -mmcs51 -I$(INCLUDE_DIR) -o $@ $<
%.rel: $(SRC_DIR)/%.a51
$(AS) -lsgo $@ $<
clean:
rm -f *.asm *.lst *.rel *.rst *.sym *.ihx *.lk *.map *.mem
bin: angie_firmware.ihx
makebin -p angie_firmware.ihx angie_firmware.bin
hex: angie_firmware.ihx
$(PACKIHX) angie_firmware.ihx > fx2.hex

37
contrib/firmware/angie/c/README
View File

@ -1,37 +0,0 @@
#SPDX-License-Identifier: GPL-2.0-or-later
This is the ANGIE firmware for ANGIE USB-JTAG adapter.
The main components of ANGIE adapter are:
- Cypress EZ-USB FX2 microcontroller
- Spartan-6 FPGA
- SRAM memory chip
- Pin headers for various JTAG pin assignments
To compile the firmware, the SDCC compiler package is required. Most Linux
distributions include SDCC in their official package repositories. The SDCC
source code can be found at http://sdcc.sourceforge.net/
Simply type "make bin" in the ANGIE directory to compile the firmware.
"make clean" will remove all generated files except the BIN file
required for downloading the firmware to ANGIE.
Note that the EZ-USB FX2 microcontroller does not have on-chip flash,
ANGIE include on-board EEPROM memory to store the firmware program of
the FX2, but we are not going to use this method.
Instead, upon initial connection of the ANGIE adapter to the host PC
via USB, the EZ-USB FX2 core has enough intelligence to act as a
stand-alone USB device, responding to USB control requests and allowing
firmware download via a special VENDOR-type control request. Then, the
EZ-USB microcontroller simulates a disconnect and re-connect to the USB bus.
It may take up to two seconds for the host to recognize the newly connected
device before OpenOCD can proceed to execute JTAG commands. This delay is
only visible when OpenOCD first uses a blank (unconfigured) ANGIE device.
Once the firmware downloaded, the FX2 microcontroller activate its GPIF mode,
download the Spartan-6 FPGA's bitstream, program the FPGA rapidly, and switch
back to default io mode.
Once the user disconnects the ANGIE adapter, all its memory contents are lost
and the firmware & bitstream download process has to be executed again.

50
contrib/firmware/angie/c/include/delay.h
View File

@ -1,50 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/****************************************************************
File : delay.h *
Contents : Delays handling header file for NanoXplore *
USB-JTAG ANGIE adapter hardware. *
Based on openULINK project code by: Martin Schmoelzer. *
Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
<aboudjelida@nanoxplore.com> *
<ahmederrachedbjld@gmail.com> *
*****************************************************************/
#ifndef __DELAY_H
#define __DELAY_H
#include <stdint.h>
void syncdelay(uint8_t count);
void delay_5us(void);
void delay_1ms(void);
void delay_us(uint16_t delay);
void delay_ms(uint16_t delay);
#ifndef _IFREQ
#define _IFREQ 48000 /* IFCLK frequency in kHz */
#endif
/* CFREQ can be any one of: 48000, 24000, or 12000 */
#ifndef _CFREQ
#define _CFREQ 48000 /* CLKOUT frequency in kHz */
#endif
#if (_IFREQ < 5000)
#error "_IFREQ too small! Valid Range: 5000 to 48000..."
#endif
#if (_IFREQ > 48000)
#error "_IFREQ too large! Valid Range: 5000 to 48000..."
#endif
#if (_CFREQ != 48000)
#if (_CFREQ != 24000)
#if (_CFREQ != 12000)
#error "_CFREQ invalid! Valid values: 48000, 24000, 12000..."
#endif
#endif
#endif
/* Synchronization Delay formula: see TRM section 15-14 */
#define _SCYCL (3 * (_CFREQ) + 5 * (_IFREQ) - 1) / (2 * (_IFREQ))
#endif

31
contrib/firmware/angie/c/include/fx2macros.h
View File

@ -1,31 +0,0 @@
/* SPDX-License-Identifier: LGPL-2.1-or-later */
/*
* This code was taken from the fx2lib project from this link:
* https://github.com/djmuhlestein/fx2lib
*
* Copyright (C) 2009 Ubixum, Inc.
*/
/*! \file
* Macros for simple common tasks in fx2 firmware.
* */
#ifndef FX2MACROS_H
#define FX2MACROS_H
#include "reg_ezusb.h"
typedef enum {FALSE = 0, TRUE} BOOL_VALS;
/**
* \brief Used for getting and setting the CPU clock speed.
**/
typedef enum {CLK_12M = 0, CLK_24M, CLK_48M} CLK_SPD;
/**
* \brief Evaluates to a CLK_SPD enum.
**/
#define CPUFREQ (CLK_SPD)((CPUCS & bmclkspd) >> 3)
#endif

29
contrib/firmware/angie/c/include/i2c.h
View File

@ -1,29 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/****************************************************************************
File : i2c.h *
Contents : i2c bit-bang library *
Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
<aboudjelida@nanoxplore.com> *
<ahmederrachedbjld@gmail.com> *
*****************************************************************************/
#ifndef __I2C_H
#define __I2C_H
#include <stdbool.h>
#include <stdint.h>
#include <stdio.h>
void start_cd(void);
void repeated_start(void);
void stop_cd(void);
void clock_cd(void);
void send_ack(void);
void send_nack(void);
bool get_ack(void);
uint8_t get_address(uint8_t adr, uint8_t rdwr);
void send_byte(uint8_t input);
uint8_t receive_byte(void);
#endif

75
contrib/firmware/angie/c/include/io.h
View File

@ -1,75 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/****************************************************************************
File : io.h *
Contents : input/output declaration header file for NanoXplore *
USB-JTAG ANGIE adapter hardware. *
Based on openULINK project code by: Martin Schmoelzer. *
Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
<aboudjelida@nanoxplore.com> *
<ahmederrachedbjld@gmail.com> *
*****************************************************************************/
#ifndef __IO_H
#define __IO_H
#include "reg_ezusb.h"
/***************************************************************************
* JTAG Signals: *
***************************************************************************
* TMS ....... Test Mode Select *
* TCK ....... Test Clock *
* TDI ....... Test Data Input (from device point of view, not JTAG *
* adapter point of view!) *
* TDO ....... Test Data Output (from device point of view, not JTAG *
* adapter point of view!) *
* TRST ...... Test Reset: Used to reset the TAP Finite State Machine *
* into the Test Logic Reset state *
* SRST ..... Chip Reset *
***************************************************************************/
/* PORT A */
/* PA0 Not Connected */
/* PA1 Not Connected */
#define PIN_RDWR_B IOA2
#define PIN_CSI_B IOA3
#define PIN_INIT_B IOA4
#define PIN_PROGRAM_B IOA5
/* PA6 Not Connected */
/* PA7 Not Connected */
/* PORT B */
#define PIN_TRST IOB0
#define PIN_TMS IOB1
#define PIN_TCK IOB2
#define PIN_TDI IOB3
#define PIN_TDO IOB4
#define PIN_SRST IOB5
/* PB6 Not Connected */
/* PB7 Not Connected */
/* JTAG Signals with direction 'OUT' on port B */
/* PIN_TDI - PIN_TCK - PIN_TMS - PIN_TRST - PIN_SRST */
#define MASK_PORTB_DIRECTION_OUT (bmbit0 | bmbit1 | bmbit2 | bmbit3 | bmbit5)
/* PORT C */
#define PIN_T0 IOC0
#define PIN_T1 IOC1
#define PIN_T2 IOC2
#define PIN_T3 IOC3
#define PIN_T4 IOC4
/* PC5 Not Connected */
/* PC6 Not Connected */
/* PC7 Not Connected */
/* PORT D */
#define PIN_SDA IOD0
#define PIN_SCL IOD1
#define PIN_SDA_DIR IOD2
#define PIN_SCL_DIR IOD3
/* PD4 Not Connected */
/* PD5 Not Connected */
/* PD6 Not Connected */
/* PD7 Not Connected */
#endif

31
contrib/firmware/angie/c/include/jtag.h
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/* SPDX-License-Identifier: GPL-2.0-or-later */
/****************************************************************************
File : jtag.h *
Contents : Jtag handling functions header file for NanoXplore *
USB-JTAG ANGIE adapter hardware. *
Based on openULINK project code by: Martin Schmoelzer. *
Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
<aboudjelida@nanoxplore.com> *
<ahmederrachedbjld@gmail.com> *
*****************************************************************************/
#ifndef __JTAG_H
#define __JTAG_H
#include <stdint.h>
uint16_t jtag_get_signals(void);
void jtag_configure_tck_delay(uint8_t scan_in, uint8_t scan_out,
uint8_t scan_io, uint8_t tck, uint8_t tms);
void jtag_clock_tms(uint8_t count, uint8_t sequence);
void jtag_slow_clock_tms(uint8_t count, uint8_t sequence);
void jtag_set_signals(uint8_t low, uint8_t high);
void jtag_clock_tck(uint16_t count);
void jtag_slow_clock_tck(uint16_t count);
void jtag_scan_in(uint8_t out_offset, uint8_t in_offset);
void jtag_scan_out(uint8_t out_offset);
void jtag_scan_io(uint8_t out_offset, uint8_t in_offset);
void jtag_slow_scan_in(uint8_t out_offset, uint8_t in_offset);
void jtag_slow_scan_out(uint8_t out_offset);
void jtag_slow_scan_io(uint8_t out_offset, uint8_t in_offset);
#endif

171
contrib/firmware/angie/c/include/msgtypes.h
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/* SPDX-License-Identifier: GPL-2.0-or-later */
/****************************************************************************
File : msgtypes.h *
Contents : Definition of the commands supported by NanoXplore *
USB-JTAG ANGIE adapter hardware. *
Based on openULINK project code by: Martin Schmoelzer. *
Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
<aboudjelida@nanoxplore.com> *
<ahmederrachedbjld@gmail.com> *
*****************************************************************************/
/**
* @file
* Definition of the commands supported by the ANGIE firmware.
*
* Basically, two types of commands can be distinguished:
* - Commands with fixed payload size
* - Commands with variable payload size
*
* SCAN commands (in all variations) carry payloads of variable size, all
* other commands carry payloads of fixed size.
*
* In the case of SCAN commands, the payload size (n) is calculated by
* dividing the scan_size_bits variable by 8, rounding up the result.
*
* Offset zero always contains the command ID.
*
****************************************************************************
* CMD_SCAN_IN, CMD_SLOW_SCAN_IN: *
* *
* OUT: *
* offset 1: scan_size_bytes *
* offset 2: bits_last_byte *
* offset 3: tms_count_start + tms_count_end *
* offset 4: tms_sequence_start *
* offset 5: tms_sequence_end *
* *
* IN: *
* offset 0..n: TDO data *
****************************************************************************
* CMD_SCAN_OUT, CMD_SLOW_SCAN_OUT: *
* *
* OUT: *
* offset 1: scan_size_bytes *
* offset 2: bits_last_byte *
* offset 3: tms_count_start + tms_count_end *
* offset 4: tms_sequence_start *
* offset 5: tms_sequence_end *
* offset 6..x: TDI data *
****************************************************************************
* CMD_SCAN_IO, CMD_SLOW_SCAN_IO: *
* *
* OUT: *
* offset 1: scan_size_bytes *
* offset 2: bits_last_byte *
* offset 3: tms_count_start + tms_count_end *
* offset 4: tms_sequence_start *
* offset 5: tms_sequence_end *
* offset 6..x: TDI data *
* *
* IN: *
* offset 0..n: TDO data *
****************************************************************************
* CMD_CLOCK_TMS, CMD_SLOW_CLOCK_TMS: *
* *
* OUT: *
* offset 1: tms_count *
* offset 2: tms_sequence *
****************************************************************************
* CMD_CLOCK_TCK, CMD_SLOW_CLOCK_TCK: *
* *
* OUT: *
* offset 1: low byte of tck_count *
* offset 2: high byte of tck_count *
****************************************************************************
* CMD_CLOCK_SLEEP_US: *
* *
* OUT: *
* offset 1: low byte of sleep_us *
* offset 2: high byte of sleep_us *
****************************************************************************
* CMD_CLOCK_SLEEP_MS: *
* *
* OUT: *
* offset 1: low byte of sleep_ms *
* offset 2: high byte of sleep_ms *
****************************************************************************
* CMD_GET_SIGNALS: *
* *
* IN: *
* offset 0: current state of input signals *
* offset 1: current state of output signals *
****************************************************************************
* CMD_SET_SIGNALS: *
* *
* OUT: *
* offset 1: signals that should be de-asserted *
* offset 2: signals that should be asserted *
****************************************************************************
* CMD_CONFIGURE_TCK_FREQ: *
* *
* OUT: *
* offset 1: delay value for scan_in function *
* offset 2: delay value for scan_out function *
* offset 3: delay value for scan_io function *
* offset 4: delay value for clock_tck function *
* offset 5: delay value for clock_tms function *
****************************************************************************
* CMD_SET_LEDS: *
* *
* OUT: *
* offset 1: LED states: *
* Bit 0: turn COM LED on *
* Bit 1: turn RUN LED on *
* Bit 2: turn COM LED off *
* Bit 3: turn RUN LED off *
* Bits 7..4: Reserved *
****************************************************************************
* CMD_TEST: *
* *
* OUT: *
* offset 1: unused dummy value *
****************************************************************************
*/
#ifndef __MSGTYPES_H
#define __MSGTYPES_H
/*
* Command IDs:
*
* Bits 7..6: Reserved, should always be zero
* Bits 5..0: Command ID. There are 62 usable IDs. Of this 63 available IDs,
* the IDs 0x00..0x1F are commands with variable payload size,
* the IDs 0x20..0x3F are commands with fixed payload size.
*/
#define CMD_ID_MASK 0x3F
/* Commands with variable payload size */
#define CMD_SCAN_IN 0x00
#define CMD_SLOW_SCAN_IN 0x01
#define CMD_SCAN_OUT 0x02
#define CMD_SLOW_SCAN_OUT 0x03
#define CMD_SCAN_IO 0x04
#define CMD_SLOW_SCAN_IO 0x05
/* Commands with fixed payload size */
#define CMD_CLOCK_TMS 0x20
#define CMD_SLOW_CLOCK_TMS 0x21
#define CMD_CLOCK_TCK 0x22
#define CMD_SLOW_CLOCK_TCK 0x23
#define CMD_SLEEP_US 0x24
#define CMD_SLEEP_MS 0x25
#define CMD_GET_SIGNALS 0x26
#define CMD_SET_SIGNALS 0x27
#define CMD_CONFIGURE_TCK_FREQ 0x28
#define CMD_SET_LEDS 0x29
#define CMD_TEST 0x2A
/* JTAG signal definition for jtag_get_signals() -- Input signals! */
#define SIGNAL_TDO 1
/* JTAG signal definition for jtag_get_signals() -- Output signals! */
#define SIGNAL_TDI 8
#define SIGNAL_TMS 2
#define SIGNAL_TCK 4
#define SIGNAL_TRST 1
#define SIGNAL_SRST 32
#endif

20
contrib/firmware/angie/c/include/protocol.h
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/* SPDX-License-Identifier: GPL-2.0-or-later */
/****************************************************************************
File : protocol.h *
Contents : Jtag commands handling protocol header file for NanoXplore *
USB-JTAG ANGIE adapter hardware. *
Based on openULINK project code by: Martin Schmoelzer. *
Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
<aboudjelida@nanoxplore.com> *
<ahmederrachedbjld@gmail.com> *
*****************************************************************************/
#ifndef __PROTOCOL_H
#define __PROTOCOL_H
#include <stdbool.h>
bool execute_command(void);
void command_loop(void);
#endif

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contrib/firmware/angie/c/include/reg_ezusb.h
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/* SPDX-License-Identifier: GPL-2.0-or-later */
/****************************************************************************
File : reg_ezusb.h *
Contents : FX2 microcontroller registers file for NanoXplore *
USB-JTAG ANGIE adapter hardware. *
Based on openULINK project code by: Martin Schmoelzer. *
Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
<aboudjelida@nanoxplore.com> *
<ahmederrachedbjld@gmail.com> *
*****************************************************************************/
#ifndef REG_EZUSB_H
#define REG_EZUSB_H
/**
* @file
* All information in this file was taken from the EZ-USB FX2 Technical
* Reference Manual, Cypress Semiconductor, 3901 North First Street
* San Jose, CA 95134 (www.cypress.com).
*
* The EZ-USB Technical Reference Manual is called "EZ-USB FX2 TRM" hereafter.
*/
/* Compiler-specific definitions of SBIT, SFR, SFRX, ... macros */
#include <mcs51/compiler.h>
/* Bit vectors */
#define bmbit0 0x01
#define bmbit1 0x02
#define bmbit2 0x04
#define bmbit3 0x08
#define bmbit4 0x10
#define bmbit5 0x20
#define bmbit6 0x40
#define bmbit7 0x80
/**************************************************************************
************************ Special Function Registers **********************
***************************************************************************/
SFR(IOA, 0x80);
SBIT(IOA0, 0x80, 0);
SBIT(IOA1, 0x80, 1);
SBIT(IOA2, 0x80, 2);
SBIT(IOA3, 0x80, 3);
SBIT(IOA4, 0x80, 4);
SBIT(IOA5, 0x80, 5);
SBIT(IOA6, 0x80, 6);
SBIT(IOA7, 0x80, 7);
SFR(SP, 0x81);
SFR(DPL0, 0x82);
SFR(DPH0, 0x83);
SFR(DPL1, 0x84);
SFR(DPL2, 0x85);
SFR(DPS, 0x86);
#define SEL bmbit0
/* Bit 1 read-only, always reads '0' */
/* Bit 2 read-only, always reads '0' */
/* Bit 3 read-only, always reads '0' */
/* Bit 4 read-only, always reads '0' */
/* Bit 5 read-only, always reads '0' */
/* Bit 6 read-only, always reads '0' */
/* Bit 7 read-only, always reads '0' */
SFR(PCON, 0x87);
#define IDLE bmbit0
#define STOP bmbit1
#define GF0 bmbit2
#define GF1 bmbit3
/* Bit 4 read-only, always reads '1' */
/* Bit 5 read-only, always reads '1' */
/* Bit 6 unused */
#define SMOD0 bmbit7
SFR(TCON, 0x88);
SBIT(IT0, 0x88, 0);
SBIT(IE0, 0x88, 1);
SBIT(IT1, 0x88, 2);
SBIT(IE1, 0x88, 3);
SBIT(TR0, 0x88, 4);
SBIT(TF0, 0x88, 5);
SBIT(TR1, 0x88, 6);
SBIT(TF1, 0x88, 7);
SFR(TMOD, 0x89);
SFR(TL0, 0x8A);
SFR(TL1, 0x8B);
SFR(TH0, 0x8C);
SFR(TH1, 0x8D);
SFR(CKCON, 0x8E);
#define MD0 bmbit0
#define MD1 bmbit1
#define MD2 bmbit2
#define T0M bmbit3
#define T1M bmbit4
#define T2M bmbit5
/* Bit 6 unused */
/* Bit 7 unused */
SFR(SPC_FNC, 0x8F);
#define BMWRS bmbit0
/* Bit 1 read-only, always reads '0' */
/* Bit 2 read-only, always reads '0' */
/* Bit 3 read-only, always reads '0' */
/* Bit 4 read-only, always reads '0' */
/* Bit 5 read-only, always reads '0' */
/* Bit 6 read-only, always reads '0' */
/* Bit 7 read-only, always reads '0' */
SFR(IOB, 0x90);
SBIT(IOB0, 0x90, 0);
SBIT(IOB1, 0x90, 1);
SBIT(IOB2, 0x90, 2);
SBIT(IOB3, 0x90, 3);
SBIT(IOB4, 0x90, 4);
SBIT(IOB5, 0x90, 5);
SBIT(IOB6, 0x90, 6);
SBIT(IOB7, 0x90, 7);
SFR(EXIF, 0x91);
SBIT(USBINT, 0x91, 4);
SBIT(I2CINT, 0x91, 5);
SBIT(IE4, 0x91, 6);
SBIT(IE5, 0x91, 7);
SFR(MPAGE, 0x92);
SFR(SCON0, 0x98);
SBIT(RI, 0x98, 0);
SBIT(TI, 0x98, 1);
SBIT(RB8, 0x98, 2);
SBIT(TB8, 0x98, 3);
SBIT(REN, 0x98, 4);
SBIT(SM2, 0x98, 5);
SBIT(SM1, 0x98, 6);
SBIT(SM0, 0x98, 7);
SFR(SBUF0, 0x99);
SFR(AUTOPTRH1, 0x9A);
SFR(AUTOPTRL1, 0x9B);
SFR(AUTOPTRH2, 0x9D);
SFR(AUTOPTRL2, 0x9E);
#define AUTOPTR1H AUTOPTRH1 /* for backwards compatibility with examples */
#define AUTOPTR1L AUTOPTRL1 /* for backwards compatibility with examples */
#define APTR1H AUTOPTRH1 /* for backwards compatibility with examples */
#define APTR1L AUTOPTRL1 /* for backwards compatibility with examples */
SFR(IOC, 0xA0);
SBIT(IOC0, 0xA0, 0);
SBIT(IOC1, 0xA0, 1);
SBIT(IOC2, 0xA0, 2);
SBIT(IOC3, 0xA0, 3);
SBIT(IOC4, 0xA0, 4);
SBIT(IOC5, 0xA0, 5);
SBIT(IOC6, 0xA0, 6);
SBIT(IOC7, 0xA0, 7);
SFR(INT2CLR, 0xA1);
SFR(INT4CLR, 0xA2);
SFR(IE, 0xA8);
SBIT(EX0, 0xA8, 0);
SBIT(ET0, 0xA8, 1);
SBIT(EX1, 0xA8, 2);
SBIT(ET1, 0xA8, 3);
SBIT(ES0, 0xA8, 4);
SBIT(ET2, 0xA8, 5);
SBIT(ES1, 0xA8, 6);
SBIT(EA, 0xA8, 7);
SFR(EP2468STAT, 0xAA);
#define EP8F bmbit7
#define EP8E bmbit6
#define EP6F bmbit5
#define EP6E bmbit4
#define EP4F bmbit3
#define EP4E bmbit2
#define EP2F bmbit1
#define EP2E bmbit0
SFR(EP24FIFOFLGS, 0xAB);
SFR(EP68FIFOFLGS, 0xAC);
SFR(AUTOPTRSETUP, 0xAF);
SFR(IOD, 0xB0);
SBIT(IOD0, 0xB0, 0);
SBIT(IOD1, 0xB0, 1);
SBIT(IOD2, 0xB0, 2);
SBIT(IOD3, 0xB0, 3);
SBIT(IOD4, 0xB0, 4);
SBIT(IOD5, 0xB0, 5);
SBIT(IOD6, 0xB0, 6);
SBIT(IOD7, 0xB0, 7);
SFR(IOE, 0xB1);
SFR(OEA, 0xB2);
SFR(OEB, 0xB3);
SFR(OEC, 0xB4);
SFR(OED, 0xB5);
SFR(OEE, 0xB6);
SFR(IP, 0xB8);
SBIT(PX0, 0xB8, 0);
SBIT(PT0, 0xB8, 1);
SBIT(PX1, 0xB8, 2);
SBIT(PT1, 0xB8, 3);
SBIT(PS0, 0xB8, 4);
SBIT(PT2, 0xB8, 5);
SBIT(PS1, 0xB8, 6);
/* Bit 7 read-only, always reads '1' */
SFR(EP01STAT, 0xBA);
SFR(GPIFTRIG, 0xBB);
#define BMGPIFDONE bmbit7
#define BMGPIFREAD bmbit2
#define GPIF_EP2 0
#define GPIF_EP4 1
#define GPIF_EP6 2
#define GPIF_EP8 3
SFR(GPIFSGLDATH, 0xBD);
SFR(GPIFSGLDATLX, 0xBE);
SFR(GPIFSGLDATLNOX, 0xBF);
SFR(SCON1, 0xC0);
SBIT(RI_1, 0xC0, 0);
SBIT(TI_1, 0xC0, 1);
SBIT(RB8_1, 0xC0, 2);
SBIT(TB8_1, 0xC0, 3);
SBIT(REN_1, 0xC0, 4);
SBIT(SM2_1, 0xC0, 5);
SBIT(SM1_1, 0xC0, 6);
SBIT(SM0_1, 0xC0, 7);
SFR(SBUF1, 0xC1);
SFR(T2CON, 0xC8);
SBIT(CPRL2, 0xC8, 0);
SBIT(C_T2, 0xC8, 1);
SBIT(TR2, 0xC8, 2);
SBIT(EXEN2, 0xC8, 3);
SBIT(TCLK, 0xC8, 4);
SBIT(RCLK, 0xC8, 5);
SBIT(EXF2, 0xC8, 6);
SBIT(TF2, 0xC8, 7);
SFR(RCAP2L, 0xCA);
SFR(RCAP2H, 0xCB);
SFR(TL2, 0xCC);
SFR(TH2, 0xCD);
SFR(PSW, 0xD0);
SBIT(P, 0xD0, 0);
SBIT(F1, 0xD0, 1);
SBIT(OV, 0xD0, 2);
SBIT(RS0, 0xD0, 3);
SBIT(RS1, 0xD0, 4);
SBIT(F0, 0xD0, 5);
SBIT(AC, 0xD0, 6);
SBIT(CY, 0xD0, 7);
SFR(EICON, 0xD8);
/* Bit 0 read-only, always reads '0' */
/* Bit 1 read-only, always reads '0' */
/* Bit 2 read-only, always reads '0' */
SBIT(INT6, 0xD8, 3);
SBIT(RESI, 0xD8, 4);
SBIT(ERESI, 0xD8, 5);
/* Bit 6 read-only, always reads '1' */
SBIT(SMOD1, 0xD8, 7);
SFR(ACC, 0xE0);
SFR(EIE, 0xE8);
SBIT(EUSB, 0xE8, 0);
SBIT(EI2C, 0xE8, 1);
SBIT(EX4, 0xE8, 2);
SBIT(EX5, 0xE8, 3);
SBIT(EWDI, 0xE8, 4);
/* Bit 5 read-only, always reads '1' */
/* Bit 6 read-only, always reads '1' */
/* Bit 7 read-only, always reads '1' */
SFR(B, 0xF0);
SFR(EIP, 0xF8);
SBIT(PUSB, 0xF8, 0);
SBIT(PI2C, 0xF8, 1);
SBIT(PX4, 0xF8, 2);
SBIT(PX5, 0xF8, 3);
SBIT(PX6, 0xF8, 4);
/* Bit 5 read-only, always reads '1' */
/* Bit 6 read-only, always reads '1' */
/* Bit 7 read-only, always reads '1' */
/**************************************************************************
***************************** XDATA Registers ****************************
***************************************************************************/
SFRX(GPIF_WAVE_DATA, 0xE400);
SFRX(RES_WAVEDATA_END, 0xE480);
/* General Configuration */
SFRX(CPUCS, 0xE600);
#define RES8051 bmbit0
#define CLKOE bmbit1
#define BMCLKINV bmbit2
#define bmclkspd0 bmbit3
#define bmclkspd1 bmbit4
#define bmclkspd (bmbit4 | bmbit3)
#define BMPRTCSTB bmbit5
/* PCON register */
#define BMSMOD0 bmbit7
SFRX(IFCONFIG, 0xE601);
#define BMIFCLKSRC bmbit7
#define BM3048MHZ bmbit6
#define BMIFCLKOE bmbit5
#define BMIFCLKPOL bmbit4
#define BMASYNC bmbit3
#define BMGSTATE bmbit2
#define BMIFCFG1 bmbit1
#define BMIFCFG0 bmbit0
#define BMIFCFGMASK (BMIFCFG0 | BMIFCFG1)
#define BMIFGPIF BMIFCFG1
SFRX(PINFLAGSAB, 0xE602);
SFRX(PINFLAGSCD, 0xE603);
SFRX(FIFORESET, 0xE604);
#define BMNAKALL bmbit7
SFRX(BREAKPT, 0xE605);
#define BMBREAK bmbit3
#define BMBPPULSE bmbit2
#define BMBPEN bmbit1
SFRX(BPADDRH, 0xE606);
SFRX(BPADDRL, 0xE607);
SFRX(UART230, 0xE608);
SFRX(FIFOPINPOLAR, 0xE609);
SFRX(REVID, 0xE60A);
SFRX(REVCTL, 0xE60B);
#define BMNOAUTOARM bmbit1
#define BMSKIPCOMMIT bmbit0
/* Endpoint Configuration */
SFRX(EP1OUTCFG, 0xE610);
SFRX(EP1INCFG, 0xE611);
SFRX(EP2CFG, 0xE612);
SFRX(EP4CFG, 0xE613);
SFRX(EP6CFG, 0xE614);
SFRX(EP8CFG, 0xE615);
SFRX(EP2FIFOCFG, 0xE618);
SFRX(EP4FIFOCFG, 0xE619);
SFRX(EP6FIFOCFG, 0xE61A);
SFRX(EP8FIFOCFG, 0xE61B);
#define BMINFM bmbit6
#define BMOEP bmbit5
#define BMAUTOOUT bmbit4
#define BMAUTOIN bmbit3
#define BMZEROLENIN bmbit2
#define BMWORDWIDE bmbit0
SFRX(EP2AUTOINLENH, 0xE620);
SFRX(EP2AUTOINLENL, 0xE621);
SFRX(EP4AUTOINLENH, 0xE622);
SFRX(EP4AUTOINLENL, 0xE623);
SFRX(EP6AUTOINLENH, 0xE612);
SFRX(EP6AUTOINLENL, 0xE613);
SFRX(EP8AUTOINLENH, 0xE614);
SFRX(EP8AUTOINLENL, 0xE615);
SFRX(EP2FIFOPFH, 0xE630);
SFRX(EP2FIFOPFL, 0xE631);
SFRX(EP4FIFOPFH, 0xE632);
SFRX(EP4FIFOPFL, 0xE633);
SFRX(EP6FIFOPFH, 0xE634);
SFRX(EP6FIFOPFL, 0xE635);
SFRX(EP8FIFOPFH, 0xE636);
SFRX(EP8FIFOPFL, 0xE637);
SFRX(EP2ISOINPKTS, 0xE640);
SFRX(EP4ISOINPKTS, 0xE641);
SFRX(EP6ISOINPKTS, 0xE642);
SFRX(EP8ISOINPKTS, 0xE643);
SFRX(INPKTEND, 0xE648);
SFRX(OUTPKTEND, 0xE649);
/* Interrupts */
SFRX(EP2FIFOIE, 0xE650);
SFRX(EP2FIFOIRQ, 0xE651);
SFRX(EP4FIFOIE, 0xE652);
SFRX(EP4FIFOIRQ, 0xE653);
SFRX(EP6FIFOIE, 0xE654);
SFRX(EP6FIFOIRQ, 0xE655);
SFRX(EP8FIFOIE, 0xE656);
SFRX(EP8FIFOIRQ, 0xE657);
SFRX(IBNIE, 0xE658);
SFRX(IBNIRQ, 0xE659);
#define EP0IBN bmbit0
#define EP1IBN bmbit1
#define EP2IBN bmbit2
#define EP4IBN bmbit3
#define EP6IBN bmbit4
#define EP8IBN bmbit5
SFRX(NAKIE, 0xE65A);
SFRX(NAKIRQ, 0xE65B);
#define EP8PING bmbit7
#define EP6PING bmbit6
#define EP4PING bmbit5
#define EP2PING bmbit4
#define EP1PING bmbit3
#define EP0PING bmbit2
#define IBN bmbit0
SFRX(USBIEN, 0xE65C);
SFRX(USBIRQ, 0xE65D);
#define SUDAVI bmbit0
#define SOFI bmbit1
#define SUTOKI bmbit2
#define SUSPI bmbit3
#define URESI bmbit4
#define HSGRANT bmbit5
#define EP0ACK bmbit6
SFRX(EPIE, 0xE65E);
SFRX(EPIRQ, 0xE65F);
SFRX(GPIFIE, 0xE660);
SFRX(GPIFIRQ, 0xE661);
SFRX(USBERRIE, 0xE662);
SFRX(USBERRIRQ, 0xE663);
SFRX(ERRCNTLIM, 0xE664);
SFRX(CLRERRCNT, 0xE665);
SFRX(INT2IVEC, 0xE666);
#define I2V0 bmbit2
#define I2V1 bmbit3
#define I2V2 bmbit4
#define I2V3 bmbit5
#define I2V4 bmbit6
SFRX(INT4IVEC, 0xE667);
SFRX(INTSETUP, 0xE668);
#define AV4EN bmbit0
#define INT4IN bmbit1
#define AV2EN bmbit3
/* Input/Output */
SFRX(PORTACFG, 0xE670);
#define BMINT0 bmbit0
#define BMINT1 bmbit1
#define BMFLAGD bmbit7
SFRX(PORTCCFG, 0xE671);
#define BMGPIFA0 bmbit0
#define BMGPIFA1 bmbit1
#define BMGPIFA2 bmbit2
#define BMGPIFA3 bmbit3
#define BMGPIFA4 bmbit4
#define BMGPIFA5 bmbit5
#define BMGPIFA6 bmbit6
#define BMGPIFA7 bmbit7
SFRX(PORTECFG, 0xE672);
#define BMT0OUT bmbit0
#define BMT1OUT bmbit1
#define BMT2OUT bmbit2
#define BMRXD0OUT bmbit3
#define BMRXD1OUT bmbit4
#define BMINT6 bmbit5
#define BMT2EX bmbit6
#define BMGPIFA8 bmbit7
SFRX(I2CS, 0xE678);
#define BMDONE bmbit0
#define BMACK bmbit1
#define BMBERR bmbit2
#define BMID (bmbit4 | bmbit3)
#define BMLASTRD bmbit5
#define BMSTOP bmbit6
#define BMSTART bmbit7
SFRX(I2DAT, 0xE679);
SFRX(I2CTL, 0xE67A);
#define BMSTOPIE bmbit1
#define BM400KHZ bmbit0
SFRX(XAUTODAT1, 0xE67B);
SFRX(XAUTODAT2, 0xE67C);
#define EXTAUTODAT1 XAUTODAT1
#define EXTAUTODAT2 XAUTODAT2
/* USB Control */
SFRX(USBCS, 0xE680);
#define SIGRSUME bmbit0
#define RENUM bmbit1
#define NOSYNSOF bmbit2
#define DISCON bmbit3
#define HSM bmbit7
SFRX(SUSPEND, 0xE681);
SFRX(WAKEUPCS, 0xE682);
#define BMWU2 bmbit7
#define BMWU bmbit6
#define BMWU2POL bmbit5
#define BMWUPOL bmbit4
#define BMDPEN bmbit2
#define BMWU2EN bmbit1
#define BMWUEN bmbit0
SFRX(TOGCTL, 0xE683);
#define BMTOGCTLEPMASK bmbit3 | bmbit2 | bmbit1 | bmbit0
#define BMRESETTOGGLE bmbit5
#define BMSETTOGGLE bmbit6
#define BMQUERYTOGGLE bmbit7
SFRX(USBFRAMEH, 0xE684);
SFRX(USBFRAMEL, 0xE685);
SFRX(MICROFRAME, 0xE686);
SFRX(FNADDR, 0xE687);
/* Endpoints */
SFRX(EP0BCH, 0xE68A);
SFRX(EP0BCL, 0xE68B);
SFRX(EP1OUTBC, 0xE68D);
SFRX(EP1INBC, 0xE68F);
SFRX(EP2BCH, 0xE690);
SFRX(EP2BCL, 0xE691);
SFRX(EP4BCH, 0xE694);
SFRX(EP4BCL, 0xE695);
SFRX(EP6BCH, 0xE698);
SFRX(EP6BCL, 0xE699);
SFRX(EP8BCH, 0xE69C);
SFRX(EP8BCL, 0xE69D);
SFRX(EP0CS, 0xE6A0);
#define HSNAK bmbit7
SFRX(EP1INCS, 0xE6A2);
SFRX(EP1OUTCS, 0xE6A1);
#define EPSTALL bmbit0
#define EPBSY bmbit1
SFRX(EP2CS, 0xE6A3);
SFRX(EP4CS, 0xE6A4);
SFRX(EP6CS, 0xE6A5);
SFRX(EP8CS, 0xE6A6);
#define BMEPEMPTY bmbit2
#define BMEPFULL bmbit3
#define BMNPAK (bmbit6 | bmbit5 | bmbit4)
SFRX(EP2FIFOFLGS, 0xE6A7);
SFRX(EP4FIFOFLGS, 0xE6A8);
SFRX(EP6FIFOFLGS, 0xE6A9);
SFRX(EP8FIFOFLGS, 0xE6AA);
SFRX(EP2FIFOBCH, 0xE6AB);
SFRX(EP2FIFOBCL, 0xE6AC);
SFRX(EP4FIFOBCH, 0xE6AD);
SFRX(EP4FIFOBCL, 0xE6AE);
SFRX(EP6FIFOBCH, 0xE6AF);
SFRX(EP6FIFOBCL, 0xE6B0);
SFRX(EP8FIFOBCH, 0xE6B1);
SFRX(EP8FIFOBCL, 0xE6B2);
SFRX(SUDPTRH, 0xE6B3);
SFRX(SUDPTRL, 0xE6B4);
SFRX(SUDPTRCTL, 0xE6B5);
#define BMSDPAUTO bmbit0
SFRX(SETUPDAT[8], 0xE6B8);
/* GPIF */
SFRX(GPIFWFSELECT, 0xE6C0);
SFRX(GPIFIDLECS, 0xE6C1);
SFRX(GPIFIDLECTL, 0xE6C2);
SFRX(GPIFCTLCFG, 0xE6C3);
SFRX(GPIFADRH, 0xE6C4);
SFRX(GPIFADRL, 0xE6C5);
SFRX(GPIFTCB3, 0xE6CE);
SFRX(GPIFTCB2, 0xE6CF);
SFRX(GPIFTCB1, 0xE6D0);
SFRX(GPIFTCB0, 0xE6D1);
#define EP2GPIFTCH GPIFTCB1 /* these are here for backwards compatibility */
#define EP2GPIFTCL GPIFTCB0
#define EP4GPIFTCH GPIFTCB1 /* these are here for backwards compatibility */
#define EP4GPIFTCL GPIFTCB0
#define EP6GPIFTCH GPIFTCB1 /* these are here for backwards compatibility */
#define EP6GPIFTCL GPIFTCB0
#define EP8GPIFTCH GPIFTCB1 /* these are here for backwards compatibility */
#define EP8GPIFTCL GPIFTCB0
SFRX(EP2GPIFFLGSEL, 0xE6D2);
SFRX(EP2GPIFPFSTOP, 0xE6D3);
SFRX(EP2GPIFTRIG, 0xE6D4);
SFRX(EP4GPIFFLGSEL, 0xE6DA);
SFRX(EP4GPIFPFSTOP, 0xE6DB);
SFRX(EP4GPIFTRIG, 0xE6DC);
SFRX(EP6GPIFFLGSEL, 0xE6E2);
SFRX(EP6GPIFPFSTOP, 0xE6E3);
SFRX(EP6GPIFTRIG, 0xE6E4);
SFRX(EP8GPIFFLGSEL, 0xE6EA);
SFRX(EP8GPIFPFSTOP, 0xE6EB);
SFRX(EP8GPIFTRIG, 0xE6EC);
SFRX(XGPIFSGLDATH, 0xE6F0);
SFRX(XGPIFSGLDATLX, 0xE6F1);
SFRX(XGPIFSGLDATLNOX, 0xE6F2);
SFRX(GPIFREADYCFG, 0xE6F3);
SFRX(GPIFREADYSTAT, 0xE6F4);
SFRX(GPIFABORT, 0xE6F5);
// UDMA
SFRX(FLOWSTATE, 0xE6C6);
SFRX(FLOWLOGIC, 0xE6C7);
SFRX(FLOWEQ0CTL, 0xE6C8);
SFRX(FLOWEQ1CTL, 0xE6C9);
SFRX(FLOWHOLDOFF, 0xE6CA);
SFRX(FLOWSTB, 0xE6CB);
SFRX(FLOWSTBEDGE, 0xE6CC);
SFRX(FLOWSTBHPERIOD, 0xE6CD);
SFRX(GPIFHOLDAMOUNT, 0xE60C);
SFRX(UDMACRCH, 0xE67D);
SFRX(UDMACRCL, 0xE67E);
SFRX(UDMACRCQUAL, 0xE67F);
/* Debug/Test
* The following registers are for Cypress's internal testing purposes only.
* These registers are not documented in the datasheet or the Technical Reference
* Manual as they were not designed for end user application usage
*/
SFRX(DBUG, 0xE6F8);
SFRX(TESTCFG, 0xE6F9);
SFRX(USBTEST, 0xE6FA);
SFRX(CT1, 0xE6FB);
SFRX(CT2, 0xE6FC);
SFRX(CT3, 0xE6FD);
SFRX(CT4, 0xE6FE);
/* Endpoint Buffers */
SFRX(EP0BUF[64], 0xE740);
SFRX(EP1INBUF[64], 0xE7C0);
SFRX(EP1OUTBUF[64], 0xE780);
SFRX(EP2FIFOBUF[512], 0xF000);
SFRX(EP4FIFOBUF[512], 0xF400);
SFRX(EP6FIFOBUF[512], 0xF800);
SFRX(EP8FIFOBUF[512], 0xFC00);
/* Error Correction Code (ECC) Registers (FX2LP/FX1 only) */
SFRX(ECCCFG, 0xE628);
SFRX(ECCRESET, 0xE629);
SFRX(ECC1B0, 0xE62A);
SFRX(ECC1B1, 0xE62B);
SFRX(ECC1B2, 0xE62C);
SFRX(ECC2B0, 0xE62D);
SFRX(ECC2B1, 0xE62E);
SFRX(ECC2B2, 0xE62F);
/* Feature Registers (FX2LP/FX1 only) */
SFRX(GPCR2, 0xE50D);
#define BMFULLSPEEDONLY bmbit4
#endif

47
contrib/firmware/angie/c/include/serial.h
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/* SPDX-License-Identifier: LGPL-2.1-or-later */
/**
* This code was taken from the fx2lib project from this link:
* https://github.com/djmuhlestein/fx2lib
*
* Copyright (C) 2009 Ubixum, Inc.
**/
/** \file serial.h
* defines functions to print to a serial console with SIO0
**/
#include "fx2macros.h"
#include <stdint.h>
/**
* This function inits sio0 to use T2CON (timer 2)
* See TRM 14.3.4.1 (Table 14-16)
* Certain baud rates have too high an error rate to work. All baud rates are .16%
* except:
*
* 12MHZ 24MHZ
* \li 57600 -6.99%
* \li 38400 -2.34% -2.34%
* \li 19200 -2.34%
*
* Possible Baud rates:
* \li 2400
* \li 4800
* \li 9600
* \li 19200
* \li 28800
* \li 38400
* \li 57600
*
* Any of these rates should work except 57600 at 12mhz. -2.34% is pushing
* most hardware specs for working. All rates at 48mhz work at .16%
**/
void sio0_init(uint32_t baud_rate) __critical; /* baud_rate max should be 57600 since int=2 bytes */
/**
* putchar('\\n') or putchar('\\r') both transmit \\r\\n
* Just use one or the other. (This makes terminal echo easy)
**/
int putchar(char c);
int getchar(void);

289
contrib/firmware/angie/c/include/usb.h
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/* SPDX-License-Identifier: GPL-2.0-or-later */
/****************************************************************************
File : usb.h *
Contents : usb communication handling header file for NanoXplore *
USB-JTAG ANGIE adapter hardware. *
Based on openULINK project code by: Martin Schmoelzer. *
Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
<aboudjelida@nanoxplore.com> *
<ahmederrachedbjld@gmail.com> *
*****************************************************************************/
#ifndef __USB_H
#define __USB_H
#include "reg_ezusb.h"
#include <stdint.h>
#include <stdbool.h>
/* High and Low byte of a word (uint16_t) */
#define HI8(word) (uint8_t)(((uint16_t)(word) >> 8) & 0xff)
#define LO8(word) (uint8_t)((uint16_t)(word) & 0xff)
/* Convenience functions */
#define STALL_EP0() (EP0CS |= EPSTALL)
#define CLEAR_IRQ() (USBINT = 0)
/*********** USB descriptors. See USB 2.0 Spec **********/
/* USB Descriptor Types. See USB 2.0 Spec */
#define DESCRIPTOR_TYPE_DEVICE 0x01
#define DESCRIPTOR_TYPE_CONFIGURATION 0x02
#define DESCRIPTOR_TYPE_STRING 0x03
#define DESCRIPTOR_TYPE_INTERFACE 0x04
#define DESCRIPTOR_TYPE_ENDPOINT 0x05
#define STR_DESCR(len, ...) { (len) * 2 + 2, DESCRIPTOR_TYPE_STRING, { __VA_ARGS__ } }
/** USB Device Descriptor. See USB 2.0 Spec */
struct usb_device_descriptor {
uint8_t blength; /**< Size of this descriptor in bytes. */
uint8_t bdescriptortype; /**< DEVICE Descriptor Type. */
uint16_t bcdusb; /**< USB specification release number (BCD). */
uint8_t bdeviceclass; /**< Class code. */
uint8_t bdevicesubclass; /**< Subclass code. */
uint8_t bdeviceprotocol; /**< Protocol code. */
uint8_t bmaxpacketsize0; /**< Maximum packet size for EP0 (8, 16, 32, 64). */
uint16_t idvendor; /**< USB Vendor ID. */
uint16_t idproduct; /**< USB Product ID. */
uint16_t bcddevice; /**< Device Release Number (BCD). */
uint8_t imanufacturer; /**< Index of manufacturer string descriptor. */
uint8_t iproduct; /**< Index of product string descriptor. */
uint8_t iserialnumber; /**< Index of string descriptor containing serial #. */
uint8_t bnumconfigurations; /**< Number of possible configurations. */
};
/** USB Configuration Descriptor. See USB 2.0 Spec */
struct usb_config_descriptor {
uint8_t blength; /**< Size of this descriptor in bytes. */
uint8_t bdescriptortype; /**< CONFIGURATION descriptor type. */
uint16_t wtotallength; /**< Combined total length of all descriptors. */
uint8_t bnuminterfaces; /**< Number of interfaces in this configuration. */
uint8_t bconfigurationvalue; /**< Value used to select this configuration. */
uint8_t iconfiguration; /**< Index of configuration string descriptor. */
uint8_t bmattributes; /**< Configuration characteristics. */
uint8_t maxpower; /**< Maximum power consumption in 2 mA units. */
};
/** USB Interface association Descriptor. See USB 2.0 Spec */
struct usb_interface_association_descriptor {
uint8_t blength;
uint8_t bdescriptortype;
uint8_t bfirstinterface;
uint8_t binterfacecount;
uint8_t bfunctionclass;
uint8_t bfunctionsubclass;
uint8_t bfunctionprotocol;
uint8_t ifunction;
};
/** USB Interface Descriptor. See USB 2.0 Spec */
struct usb_interface_descriptor {
uint8_t blength; /**< Size of this descriptor in bytes. */
uint8_t bdescriptortype; /**< INTERFACE descriptor type. */
uint8_t binterfacenumber; /**< Interface number. */
uint8_t balternatesetting; /**< Value used to select alternate setting. */
uint8_t bnumendpoints; /**< Number of endpoints used by this interface. */
uint8_t binterfaceclass; /**< Class code. */
uint8_t binterfacesubclass; /**< Subclass code. */
uint8_t binterfaceprotocol; /**< Protocol code. */
uint8_t iinterface; /**< Index of interface string descriptor. */
};
/** USB Endpoint Descriptor. See USB 2.0 Spec */
struct usb_endpoint_descriptor {
uint8_t blength; /**< Size of this descriptor in bytes. */
uint8_t bdescriptortype; /**< ENDPOINT descriptor type. */
uint8_t bendpointaddress; /**< Endpoint Address: IN/OUT + EP number. */
uint8_t bmattributes; /**< Endpoint Attributes: BULK/INTR/ISO/CTRL. */
uint16_t wmaxpacketsize; /**< Maximum packet size for this endpoint. */
uint8_t binterval; /**< Polling interval (in ms) for this endpoint. */
};
/** USB Language Descriptor. See USB 2.0 Spec */
struct usb_language_descriptor {
uint8_t blength; /**< Size of this descriptor in bytes. */
uint8_t bdescriptortype; /**< STRING descriptor type. */
uint16_t wlangid[]; /**< LANGID codes. */
};
/** USB String Descriptor. See USB 2.0 Spec */
struct usb_string_descriptor {
uint8_t blength; /**< Size of this descriptor in bytes. */
uint8_t bdescriptortype; /**< STRING descriptor type. */
uint16_t bstring[]; /**< UNICODE encoded string. */
};
/********************** USB Control Endpoint 0 related *********************/
/** USB Control Setup Data. See USB 2.0 Spec */
struct setup_data {
uint8_t bmrequesttype; /**< Characteristics of a request. */
uint8_t brequest; /**< Specific request. */
uint16_t wvalue; /**< Field that varies according to request. */
uint16_t windex; /**< Field that varies according to request. */
uint16_t wlength; /**< Number of bytes to transfer in data stage. */
};
/* External declarations for variables that need to be accessed outside of
* the USB module */
extern volatile bool ep1_out;
extern volatile bool ep1_in;
extern volatile bool ep6_out;
extern volatile __xdata __at 0xE6B8 struct setup_data setup_data;
/*
* USB Request Types (bmRequestType): See USB 2.0 Spec
*
* Bit 7: Data transfer direction
* 0 = Host-to-device
* 1 = Device-to-host
* Bit 6...5: Type
* 0 = Standard
* 1 = Class
* 2 = Vendor
* 3 = Reserved
* Bit 4...0: Recipient
* 0 = Device
* 1 = Interface
* 2 = Endpoint
* 3 = Other
* 4...31 = Reserved
*/
#define USB_DIR_OUT 0x00
#define USB_DIR_IN 0x80
#define USB_REQ_TYPE_STANDARD (0x00 << 5)
#define USB_REQ_TYPE_CLASS (0x01 << 5)
#define USB_REQ_TYPE_VENDOR (0x02 << 5)
#define USB_REQ_TYPE_RESERVED (0x03 << 5)
#define USB_RECIP_DEVICE 0x00
#define USB_RECIP_INTERFACE 0x01
#define USB_RECIP_ENDPOINT 0x02
#define USB_RECIP_OTHER 0x03
/* Clear Interface Request */
#define CF_DEVICE (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_DEVICE)
#define CF_INTERFACE (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_INTERFACE)
#define CF_ENDPOINT (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_ENDPOINT)
/* Get Configuration Request */
#define GC_DEVICE (USB_DIR_IN | USB_REQ_TYPE_STANDARD | USB_RECIP_DEVICE)
/* Get Descriptor Request */
#define GD_DEVICE (USB_DIR_IN | USB_REQ_TYPE_STANDARD | USB_RECIP_DEVICE)
/* Get Interface Request */
#define GI_INTERFACE (USB_DIR_IN | USB_REQ_TYPE_STANDARD | USB_RECIP_INTERFACE)
/* Get Status Request: See USB 1.1 spec, page 190 */
#define GS_DEVICE (USB_DIR_IN | USB_REQ_TYPE_STANDARD | USB_RECIP_DEVICE)
#define GS_INTERFACE (USB_DIR_IN | USB_REQ_TYPE_STANDARD | USB_RECIP_INTERFACE)
#define GS_ENDPOINT (USB_DIR_IN | USB_REQ_TYPE_STANDARD | USB_RECIP_ENDPOINT)
/* Set Address Request is handled by EZ-USB core */
/* Set Configuration Request */
#define SC_DEVICE (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_DEVICE)
/* Set Descriptor Request */
#define SD_DEVICE (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_DEVICE)
/* Set Feature Request */
#define SF_DEVICE (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_DEVICE)
#define SF_INTERFACE (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_INTERFACE)
#define SF_ENDPOINT (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_ENDPOINT)
/* Set Interface Request */
#define SI_INTERFACE (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_INTERFACE)
/* Synch Frame Request */
#define SY_ENDPOINT (USB_DIR_IN | USB_REQ_TYPE_STANDARD | USB_RECIP_ENDPOINT)
/* USB Requests (bRequest): See USB 2.0 Spec */
#define GET_STATUS 0
#define CLEAR_FEATURE 1
/* Value '2' is reserved for future use */
#define SET_FEATURE 3
/* Value '4' is reserved for future use */
#define SET_ADDRESS 5
#define GET_DESCRIPTOR 6
#define SET_DESCRIPTOR 7
#define GET_CONFIGURATION 8
#define SET_CONFIGURATION 9
#define GET_INTERFACE 10
#define SET_INTERFACE 11
#define SYNCH_FRAME 12
/* Standard Feature Selectors: See USB 2.0 Spec */
#define DEVICE_REMOTE_WAKEUP 1
#define ENDPOINT_HALT 0
/************************** EZ-USB specific stuff **************************/
/** USB Interrupts. See EZ-USB FX2-TRM, for details */
enum usb_isr {
SUDAV_ISR = 13,
SOF_ISR,
SUTOK_ISR,
SUSPEND_ISR,
USBRESET_ISR,
HIGHSPEED_ISR,
EP0ACK_ISR,
STUB_ISR,
EP0IN_ISR,
EP0OUT_ISR,
EP1IN_ISR,
EP1OUT_ISR,
EP2_ISR,
EP4_ISR,
EP6_ISR,
EP8_ISR,
IBN_ISR,
EP0PINGNAK_ISR,
EP1PINGNAK_ISR,
EP2PINGNAK_ISR,
EP4PINGNAK_ISR,
EP6PINGNAK_ISR,
EP8PINGNAK_ISR,
ERRORLIMIT_ISR,
EP2PIDERROR_ISR,
EP4PIDERROR_ISR,
EP6PIDERROR_ISR,
EP8PIDERROR_ISR,
EP2PFLAG_ISR,
EP4PFLAG_ISR,
EP6PFLAG_ISR,
EP8PFLAG_ISR,
EP2EFLAG_ISR,
EP4EFLAG_ISR,
EP6EFLAG_ISR,
EP8EFLAG_ISR,
EP2FFLAG_ISR,
EP4FFLAG_ISR,
EP6FFLAG_ISR,
EP8FFLAG_ISR,
GPIFCOMPLETE_ISR,
GPIFWAVEFORM_ISR
};
/*************************** Function Prototypes ***************************/
__xdata uint8_t *usb_get_endpoint_cs_reg(uint8_t ep);
void usb_reset_data_toggle(uint8_t ep);
bool usb_handle_get_status(void);
bool usb_handle_clear_feature(void);
bool usb_handle_set_feature(void);
bool usb_handle_get_descriptor(void);
void usb_handle_set_interface(void);
void usb_handle_setup_data(void);
void usb_handle_i2c_in(void);
void usb_handle_i2c_out(void);
void i2c_recieve(void);
void ep_init(void);
void interrupt_init(void);
void io_init(void);
#endif

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contrib/firmware/angie/c/src/USBJmpTb.a51
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; SPDX-License-Identifier: GPL-2.0-or-later
;****************************************************************************
; File : USBJmpTb.a51 *
; Contents : Interruptions vector configuration. *
; Based on openULINK project code by: Martin Schmoelzer. *
; Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
; <aboudjelida@nanoxplore.com> *
; <ahmederrachedbjld@gmail.com> *
;****************************************************************************
.module JUMPTABLE
.globl USB_AutoVector
.globl USB_Jump_Table
.globl _sudav_isr, _sof_isr, _sutok_isr, _suspend_isr, _usbreset_isr, _highspeed_isr, _ep0ack_isr, _stub_isr, _ep0in_isr, _ep0out_isr, _ep1in_isr, _ep1out_isr, _ep2_isr, _ep4_isr, _ep6_isr, _ep8_isr, _ibn_isr
.globl _ep0pingnak_isr, _ep1pingnak_isr, _ep2pingnak_isr, _ep4pingnak_isr, _ep6pingnak_isr, _ep8pingnak_isr, _errorlimit_isr, _stub_isr, _stub_isr, _stub_isr, _ep2piderror_isr, _ep4piderror_isr, _ep6piderror_isr, _ep8piderror_isr
.globl _ep2pflag_isr, _ep4pflag_isr, _ep6pflag_isr, _ep8pflag_isr, _ep2eflag_isr, _ep4eflag_isr, _ep6eflag_isr, _ep8eflag_isr, _ep2fflag_isr, _ep4fflag_isr, _ep6fflag_isr, _ep8fflag_isr, _gpifcomplete_isr, _gpifwaveform_isr
;--------------------------------------------------------------------------;
; Interrupt Vectors ;
;--------------------------------------------------------------------------;
.area USB_JV (ABS,OVR) ; Absolute, Overlay
.org 0x43 ; USB interrupt (INT2) jumps here
USB_AutoVector = #. + 2
ljmp USB_Jump_Table ; Autovector will replace byte 45
;--------------------------------------------------------------------------;
; USB Jump Table ;
;--------------------------------------------------------------------------;
.area USB_JT (ABS) ; Absolute placement
.org 0x0200 ; Place jump table at 0x0200
USB_Jump_Table: ; autovector jump table
ljmp _sudav_isr ; (00) Setup Data Available
.db 0
ljmp _sof_isr ; (04) Start of Frame
.db 0
ljmp _sutok_isr ; (08) Setup Data Loading
.db 0
ljmp _suspend_isr ; (0C) Global Suspend
.db 0
ljmp _usbreset_isr ; (10) USB Reset
.db 0
ljmp _highspeed_isr ; (14) Entered High Speed
.db 0
ljmp _ep0ack_isr ; (18) EP0ACK
.db 0
ljmp _stub_isr ; (1C) Reserved
.db 0
ljmp _ep0in_isr ; (20) EP0 In
.db 0
ljmp _ep0out_isr ; (24) EP0 Out
.db 0
ljmp _ep1in_isr ; (28) EP1 In
.db 0
ljmp _ep1out_isr ; (2C) EP1 Out
.db 0
ljmp _ep2_isr ; (30) EP2 In/Out
.db 0
ljmp _ep4_isr ; (34) EP4 In/Out
.db 0
ljmp _ep6_isr ; (38) EP6 In/Out
.db 0
ljmp _ep8_isr ; (3C) EP8 In/Out
.db 0
ljmp _ibn_isr ; (40) IBN
.db 0
ljmp _stub_isr ; (44) Reserved
.db 0
ljmp _ep0pingnak_isr ; (48) EP0 PING NAK
.db 0
ljmp _ep1pingnak_isr ; (4C) EP1 PING NAK
.db 0
ljmp _ep2pingnak_isr ; (50) EP2 PING NAK
.db 0
ljmp _ep4pingnak_isr ; (54) EP4 PING NAK
.db 0
ljmp _ep6pingnak_isr ; (58) EP6 PING NAK
.db 0
ljmp _ep8pingnak_isr ; (5C) EP8 PING NAK
.db 0
ljmp _errorlimit_isr ; (60) Error Limit
.db 0
ljmp _stub_isr ; (64) Reserved
.db 0
ljmp _stub_isr ; (68) Reserved
.db 0
ljmp _stub_isr ; (6C) Reserved
.db 0
ljmp _ep2piderror_isr ; (70) EP2 ISO Pid Sequence Error
.db 0
ljmp _ep4piderror_isr ; (74) EP4 ISO Pid Sequence Error
.db 0
ljmp _ep6piderror_isr ; (78) EP6 ISO Pid Sequence Error
.db 0
ljmp _ep8piderror_isr ; (7C) EP8 ISO Pid Sequence Error
.db 0
ljmp _ep2pflag_isr ; (80) EP2 Programmable Flag
.db 0
ljmp _ep4pflag_isr ; (84) EP4 Programmable Flag
.db 0
ljmp _ep6pflag_isr ; (88) EP6 Programmable Flag
.db 0
ljmp _ep8pflag_isr ; (8C) EP8 Programmable Flag
.db 0
ljmp _ep2eflag_isr ; (90) EP2 Empty Flag
.db 0
ljmp _ep4eflag_isr ; (94) EP4 Empty Flag
.db 0
ljmp _ep6eflag_isr ; (98) EP6 Empty Flag
.db 0
ljmp _ep8eflag_isr ; (9C) EP8 Empty Flag
.db 0
ljmp _ep2fflag_isr ; (A0) EP2 Full Flag
.db 0
ljmp _ep4fflag_isr ; (A4) EP4 Full Flag
.db 0
ljmp _ep6fflag_isr ; (A8) EP6 Full Flag
.db 0
ljmp _ep8fflag_isr ; (AC) EP8 Full Flag
.db 0
ljmp _gpifcomplete_isr ; (B0) GPIF Operation Complete
.db 0
ljmp _gpifwaveform_isr ; (B4) GPIF Waveform
.db 0

49
contrib/firmware/angie/c/src/delay.c
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@ -1,49 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/****************************************************************************
File : delay.c *
Contents : Delays handling fucntions code for NanoXplore *
USB-JTAG ANGIE adapter hardware. *
Based on openULINK project code by: Martin Schmoelzer. *
Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
<aboudjelida@nanoxplore.com> *
<ahmederrachedbjld@gmail.com> *
*****************************************************************************/
#include "delay.h"
#include <mcs51/compiler.h>
void syncdelay(uint8_t count)
{
for (uint8_t i = 0; i < count; i++)
NOP();
}
void delay_5us(void)
{
NOP();
}
void delay_1ms(void)
{
uint16_t i;
for (i = 0; i < 598; i++)
;
}
void delay_us(uint16_t delay)
{
uint16_t i;
uint16_t maxcount = (delay / 5);
for (i = 0; i < maxcount; i++)
delay_5us();
}
void delay_ms(uint16_t delay)
{
uint16_t i;
for (i = 0; i < delay; i++)
delay_1ms();
}

98
contrib/firmware/angie/c/src/gpif.c
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@ -1,98 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
This program configures the General Programmable Interface (GPIF) for FX2.
Please do not modify sections of text which are marked as "DO NOT EDIT ...".
*/
/* GPIF Program Code */
#include "reg_ezusb.h"
#include "delay.h"
/****************************** GPIF PROGRAM CODE ********************************/
/* DO NOT EDIT ... */
const char wavedata[128] = {
// Wave 0
/* LenBr */ 0x01, 0x3F, 0x01, 0x01, 0x01, 0x01, 0x01, 0x07,
/* Opcode*/ 0x02, 0x07, 0x02, 0x02, 0x02, 0x02, 0x02, 0x00,
/* Output*/ 0x04, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
/* LFun */ 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F,
// Wave 1
/* LenBr */ 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x07,
/* Opcode*/ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* Output*/ 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
/* LFun */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F,
// Wave 2
/* LenBr */ 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x07,
/* Opcode*/ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* Output*/ 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
/* LFun */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F,
// Wave 3
/* LenBr */ 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x07,
/* Opcode*/ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* Output*/ 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
/* LFun */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F,
};
/* END DO NOT EDIT */
/* DO NOT EDIT ... */
const char flowstates[36] = {
/* Wave 0 flowstates */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* Wave 1 flowstates */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* Wave 2 flowstates */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* Wave 3 flowstates */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
};
/* END DO NOT EDIT */
/* DO NOT EDIT ... */
const char initdata[7] = {
/* Regs */ 0xE0, 0x00, 0x00, 0x07, 0xEE, 0xF2, 0x00
};
/* END DO NOT EDIT */
void gpif_init(void)
{
uint8_t i;
IFCONFIG = 0xEE;
GPIFABORT = 0xFF; /* abort any waveforms pending */
GPIFREADYCFG = initdata[0];
GPIFCTLCFG = initdata[1];
GPIFIDLECS = initdata[2];
GPIFIDLECTL = initdata[3];
GPIFWFSELECT = initdata[5];
GPIFREADYSTAT = initdata[6];
/* use dual autopointer feature... */
AUTOPTRSETUP = 0x07;
/* source */
AUTOPTRH1 = (uint8_t)(((uint16_t)(&wavedata) >> 8) & 0xff);
AUTOPTRL1 = (uint8_t)((uint16_t)(&wavedata) & 0xff);
/* destination */
AUTOPTRH2 = 0xE4;
AUTOPTRL2 = 0x00;
/* transfer */
for (i = 0x00; i < 128; i++)
EXTAUTODAT2 = EXTAUTODAT1;
/* GPIF address pins update when GPIFADRH/L written */
syncdelay(3);
GPIFADRH = 0x00; /* bits[7:1] always 0 */
syncdelay(3);
GPIFADRL = 0x00; /* point to PERIPHERAL address 0x0000 */
/* Configure GPIF flowstates registers for Wave 0 of wavedata */
FLOWSTATE = flowstates[0];
FLOWLOGIC = flowstates[1];
FLOWEQ0CTL = flowstates[2];
FLOWEQ1CTL = flowstates[3];
FLOWHOLDOFF = flowstates[4];
FLOWSTB = flowstates[5];
FLOWSTBEDGE = flowstates[6];
FLOWSTBHPERIOD = flowstates[7];
}

144
contrib/firmware/angie/c/src/i2c.c
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// SPDX-License-Identifier: GPL-2.0-or-later
/****************************************************************************
File : i2c.cpp *
Contents : i2c bit-bang library *
Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
<aboudjelida@nanoxplore.com> *
<ahmederrachedbjld@gmail.com> *
*****************************************************************************/
#include "i2c.h"
#include "io.h"
#include "delay.h"
#include "reg_ezusb.h"
void start_cd(void)
{
PIN_SCL_DIR = 0;
PIN_SDA_DIR = 0;
delay_us(10);
PIN_SDA = 0; //SDA = 1;
delay_us(1);
PIN_SCL = 0; //SCL = 1;
delay_us(1);
}
void repeated_start(void)
{
PIN_SDA = 1;
delay_us(1);
PIN_SCL = 1;
delay_us(1);
PIN_SDA = 0;
delay_us(1);
PIN_SCL = 0;
delay_us(1);
}
void stop_cd(void)
{
PIN_SDA = 0;
delay_us(1);
PIN_SCL = 1;
delay_us(1);
PIN_SDA = 1;
delay_us(1);
PIN_SDA_DIR = 1;
delay_us(1);
PIN_SCL_DIR = 1;
delay_us(1);
}
void clock_cd(void)
{
PIN_SCL = 1;
delay_us(1);
PIN_SCL = 0;
delay_us(1);
}
void send_ack(void)
{
PIN_SDA = 0;
delay_us(1);
PIN_SCL = 1;
delay_us(1);
PIN_SCL = 0;
delay_us(1);
}
void send_nack(void)
{
PIN_SDA = 1;
delay_us(1);
PIN_SCL = 1;
delay_us(1);
PIN_SCL = 0;
delay_us(1);
}
bool get_ack(void)
{
PIN_SDA_DIR = 1;
delay_us(1);
OED = 0xFE;
PIN_SCL = 1;
delay_us(1);
bool ack = PIN_SDA;
PIN_SCL = 0;
delay_us(1);
OED = 0xFF;
PIN_SDA_DIR = 0;
delay_us(1);
return ack;
}
/* here address(8 bits) = adr (7 bits) + type (1 bit) */
uint8_t get_address(uint8_t adr, uint8_t rdwr)
{
adr &= 0x7F;
adr = adr << 1;
adr |= (rdwr & 0x01);
return adr;
}
/* here send bit after bit and clocking scl with each bit */
void send_byte(uint8_t input)
{
for (uint8_t i = 0; i < 8; i++) {
if ((input & 0x80)) {
PIN_SDA = 1;
delay_us(1);
clock_cd();
} else {
PIN_SDA = 0;
delay_us(1);
clock_cd();
}
input = input << 1;
}
}
/* here receive bit after bit and clocking scl with each bit */
uint8_t receive_byte(void)
{
PIN_SDA_DIR = 1; //FX2 <-- FPGA
OED = 0xFE;
uint8_t input = 0x00;
for (uint8_t i = 0; i < 8; i++) {
PIN_SCL = 1;
delay_us(1);
input = input << 1;
if (PIN_SDA == 1)
input |= 0x01;
else
input |= 0X00;
PIN_SCL = 0;
delay_us(1);
}
OED = 0xFF;
PIN_SDA_DIR = 0;
return input;
}

674
contrib/firmware/angie/c/src/jtag.c
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// SPDX-License-Identifier: GPL-2.0-or-later
/****************************************************************************
File : jtag.c *
Contents : Jtag handling functions code for NanoXplore *
USB-JTAG ANGIE adapter hardware. *
Based on openULINK project code by: Martin Schmoelzer. *
Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
<aboudjelida@nanoxplore.com> *
<ahmederrachedbjld@gmail.com> *
*****************************************************************************/
#include "jtag.h"
#include "io.h"
#include "msgtypes.h"
#include "reg_ezusb.h"
#include <stdbool.h>
#include <serial.h>
#include <stdio.h>
/** Delay value for SCAN_IN operations with less than maximum TCK frequency */
uint8_t delay_scan_in;
/** Delay value for SCAN_OUT operations with less than maximum TCK frequency */
uint8_t delay_scan_out;
/** Delay value for SCAN_IO operations with less than maximum TCK frequency */
uint8_t delay_scan_io;
/** Delay value for CLOCK_TCK operations with less than maximum frequency */
uint8_t delay_tck;
/** Delay value for CLOCK_TMS operations with less than maximum frequency */
uint8_t delay_tms;
/**
* Perform JTAG SCAN-IN operation at maximum TCK frequency.
*
* Dummy data is shifted into the JTAG chain via TDI, TDO data is sampled and
* stored in the EP2 IN buffer.
*
* Maximum achievable TCK frequency is 182 kHz for ANGIE clocked at 24 MHz.
*
* @param out_offset offset in EP1OUTBUF where payload data starts
* @param in_offset
*/
void jtag_scan_in(uint8_t out_offset, uint8_t in_offset)
{
uint8_t scan_size_bytes, bits_last_byte;
uint8_t tms_count_start, tms_count_end;
uint8_t tms_sequence_start, tms_sequence_end;
uint8_t tdo_data, i, j;
uint8_t outb_buffer;
/* Get parameters from EP1OUTBUF */
scan_size_bytes = EP1OUTBUF[out_offset];
bits_last_byte = EP1OUTBUF[out_offset + 1];
tms_count_start = (EP1OUTBUF[out_offset + 2] >> 4) & 0x0F;
tms_count_end = EP1OUTBUF[out_offset + 2] & 0x0F;
tms_sequence_start = EP1OUTBUF[out_offset + 3];
tms_sequence_end = EP1OUTBUF[out_offset + 4];
if (tms_count_start > 0)
jtag_clock_tms(tms_count_start, tms_sequence_start);
outb_buffer = IOB & ~(bmbit1 | bmbit2 | bmbit3);
/* Shift all bytes except the last byte */
for (i = 0; i < scan_size_bytes - 1; i++) {
tdo_data = 0;
for (j = 0; j < 8; j++) {
IOB = outb_buffer; /* TCK changes here */
tdo_data = tdo_data >> 1;
IOB = (outb_buffer | bmbit2);
if (PIN_TDO)
tdo_data |= 0x80;
}
/* Copy TDO data to EP1INBUF */
EP1INBUF[i + in_offset] = tdo_data;
}
tdo_data = 0;
/* Shift the last byte */
for (j = 0; j < bits_last_byte; j++) {
/* Assert TMS signal if requested and this is the last bit */
if (j == (bits_last_byte - 1) && tms_count_end > 0) {
outb_buffer |= bmbit1;
tms_count_end--;
tms_sequence_end = tms_sequence_end >> 1;
}
IOB = outb_buffer; /* TCK changes here */
tdo_data = tdo_data >> 1;
IOB = (outb_buffer | bmbit2);
if (PIN_TDO)
tdo_data |= 0x80;
}
tdo_data = tdo_data >> (8 - bits_last_byte);
/* Copy TDO data to EP1INBUF */
EP1INBUF[i + in_offset] = tdo_data;
/* Move to correct end state */
if (tms_count_end > 0)
jtag_clock_tms(tms_count_end, tms_sequence_end);
}
/**
* Perform JTAG SCAN-IN operation at variable TCK frequency.
*
* Dummy data is shifted into the JTAG chain via TDI, TDO data is sampled and
* stored in the EP2 IN buffer.
*
* Maximum achievable TCK frequency is 113 kHz for ANGIE clocked at 24 MHz.
*
* @param out_offset offset in EP1OUTBUF where payload data starts
* @param in_offset
*/
void jtag_slow_scan_in(uint8_t out_offset, uint8_t in_offset)
{
uint8_t scan_size_bytes, bits_last_byte;
uint8_t tms_count_start, tms_count_end;
uint8_t tms_sequence_start, tms_sequence_end;
uint8_t tdo_data, i, j, k;
uint8_t outb_buffer;
/* Get parameters from EP1OUTBUF */
scan_size_bytes = EP1OUTBUF[out_offset];
bits_last_byte = EP1OUTBUF[out_offset + 1];
tms_count_start = (EP1OUTBUF[out_offset + 2] >> 4) & 0x0F;
tms_count_end = EP1OUTBUF[out_offset + 2] & 0x0F;
tms_sequence_start = EP1OUTBUF[out_offset + 3];
tms_sequence_end = EP1OUTBUF[out_offset + 4];
if (tms_count_start > 0)
jtag_slow_clock_tms(tms_count_start, tms_sequence_start);
outb_buffer = IOB & ~(bmbit3 | bmbit2 | bmbit1);
/* Shift all bytes except the last byte */
for (i = 0; i < scan_size_bytes - 1; i++) {
tdo_data = 0;
for (j = 0; j < 8; j++) {
IOB = outb_buffer; /* TCK changes here */
for (k = 0; k < delay_scan_in; k++)
;
tdo_data = tdo_data >> 1;
IOB = (outb_buffer | bmbit2);
for (k = 0; k < delay_scan_in; k++)
;
if (PIN_TDO)
tdo_data |= 0x80;
}
/* Copy TDO data to EP1INBUF */
EP1INBUF[i + in_offset] = tdo_data;
}
tdo_data = 0;
/* Shift the last byte */
for (j = 0; j < bits_last_byte; j++) {
/* Assert TMS signal if requested and this is the last bit */
if (j == (bits_last_byte - 1) && tms_count_end > 0) {
outb_buffer |= bmbit1;
tms_count_end--;
tms_sequence_end = tms_sequence_end >> 1;
}
IOB = outb_buffer; /* TCK changes here */
for (k = 0; k < delay_scan_in; k++)
;
tdo_data = tdo_data >> 1;
IOB = (outb_buffer | bmbit2);
for (k = 0; k < delay_scan_in; k++)
;
if (PIN_TDO)
tdo_data |= 0x80;
}
tdo_data = tdo_data >> (8 - bits_last_byte);
/* Copy TDO data to EP1INBUF */
EP1INBUF[i + in_offset] = tdo_data;
/* Move to correct end state */
if (tms_count_end > 0)
jtag_slow_clock_tms(tms_count_end, tms_sequence_end);
}
/**
* Perform JTAG SCAN-OUT operation at maximum TCK frequency.
*
* Data stored in EP2 OUT buffer is shifted into the JTAG chain via TDI, TDO
* data is not sampled.
* The TAP-FSM state is always left in the PAUSE-DR/PAUSE-IR state.
*
* Maximum achievable TCK frequency is 142 kHz for ANGIE clocked at 24 MHz.
*
* @param out_offset offset in EP1OUTBUF where payload data starts
*/
void jtag_scan_out(uint8_t out_offset)
{
uint8_t scan_size_bytes, bits_last_byte;
uint8_t tms_count_start, tms_count_end;
uint8_t tms_sequence_start, tms_sequence_end;
uint8_t tdi_data, i, j;
uint8_t outb_buffer;
/* Get parameters from EP1OUTBUF */
scan_size_bytes = EP1OUTBUF[out_offset];
bits_last_byte = EP1OUTBUF[out_offset + 1];
tms_count_start = (EP1OUTBUF[out_offset + 2] >> 4) & 0x0F;
tms_count_end = EP1OUTBUF[out_offset + 2] & 0x0F;
tms_sequence_start = EP1OUTBUF[out_offset + 3];
tms_sequence_end = EP1OUTBUF[out_offset + 4];
if (tms_count_start > 0)
jtag_clock_tms(tms_count_start, tms_sequence_start);
outb_buffer = IOB & ~(bmbit2 | bmbit1);
/* Shift all bytes except the last byte */
for (i = 0; i < scan_size_bytes - 1; i++) {
tdi_data = EP1OUTBUF[i + out_offset + 5];
for (j = 0; j < 8; j++) {
if (tdi_data & 0x01)
outb_buffer |= bmbit3;
else
outb_buffer &= ~bmbit3;
IOB = outb_buffer; /* TDI and TCK change here */
tdi_data = tdi_data >> 1;
IOB = (outb_buffer | bmbit2);
}
}
tdi_data = EP1OUTBUF[i + out_offset + 5];
/* Shift the last byte */
for (j = 0; j < bits_last_byte; j++) {
if (tdi_data & 0x01)
outb_buffer |= bmbit3;
else
outb_buffer &= ~bmbit3;
/* Assert TMS signal if requested and this is the last bit */
if (j == (bits_last_byte - 1) && tms_count_end > 0) {
outb_buffer |= bmbit1;
tms_count_end--;
tms_sequence_end = tms_sequence_end >> 1;
}
IOB = outb_buffer; /* TDI and TCK change here */
tdi_data = tdi_data >> 1;
IOB = (outb_buffer | bmbit2);
}
/* Move to correct end state */
if (tms_count_end > 0)
jtag_clock_tms(tms_count_end, tms_sequence_end);
}
/**
* Perform JTAG SCAN-OUT operation at maximum TCK frequency.
*
* Data stored in EP2 OUT buffer is shifted into the JTAG chain via TDI, TDO
* data is not sampled.
* The TAP-FSM state is always left in the PAUSE-DR/PAUSE-IR state.
*
* Maximum achievable TCK frequency is 97 kHz for ANGIE clocked at 24 MHz.
*
* @param out_offset offset in EP1OUTBUF where payload data starts
*/
void jtag_slow_scan_out(uint8_t out_offset)
{
uint8_t scan_size_bytes, bits_last_byte;
uint8_t tms_count_start, tms_count_end;
uint8_t tms_sequence_start, tms_sequence_end;
uint8_t tdi_data, i, j, k;
uint8_t outb_buffer;
/* Get parameters from EP1OUTBUF */
scan_size_bytes = EP1OUTBUF[out_offset];
bits_last_byte = EP1OUTBUF[out_offset + 1];
tms_count_start = (EP1OUTBUF[out_offset + 2] >> 4) & 0x0F;
tms_count_end = EP1OUTBUF[out_offset + 2] & 0x0F;
tms_sequence_start = EP1OUTBUF[out_offset + 3];
tms_sequence_end = EP1OUTBUF[out_offset + 4];
if (tms_count_start > 0)
jtag_slow_clock_tms(tms_count_start, tms_sequence_start);
outb_buffer = IOB & ~(bmbit2 | bmbit1);
/* Shift all bytes except the last byte */
for (i = 0; i < scan_size_bytes - 1; i++) {
tdi_data = EP1OUTBUF[i + out_offset + 5];
for (j = 0; j < 8; j++) {
if (tdi_data & 0x01)
outb_buffer |= bmbit3;
else
outb_buffer &= ~bmbit3;
IOB = outb_buffer; /* TDI and TCK change here */
for (k = 0; k < delay_scan_out; k++)
;
tdi_data = tdi_data >> 1;
IOB = (outb_buffer | bmbit2);
for (k = 0; k < delay_scan_out; k++)
;
}
}
tdi_data = EP1OUTBUF[i + out_offset + 5];
/* Shift the last byte */
for (j = 0; j < bits_last_byte; j++) {
if (tdi_data & 0x01)
outb_buffer |= bmbit3;
else
outb_buffer &= ~bmbit3;
/* Assert TMS signal if requested and this is the last bit */
if (j == (bits_last_byte - 1) && tms_count_end > 0) {
outb_buffer |= bmbit1;
tms_count_end--;
tms_sequence_end = tms_sequence_end >> 1;
}
IOB = outb_buffer; /* TDI and TCK change here */
for (k = 0; k < delay_scan_out; k++)
;
tdi_data = tdi_data >> 1;
IOB = (outb_buffer | bmbit2);
for (k = 0; k < delay_scan_out; k++)
;
}
/* Move to correct end state */
if (tms_count_end > 0)
jtag_slow_clock_tms(tms_count_end, tms_sequence_end);
}
/**
* Perform bidirectional JTAG SCAN operation at maximum TCK frequency.
*
* Data stored in EP2 OUT buffer is shifted into the JTAG chain via TDI, TDO
* data is sampled and stored in the EP2 IN buffer.
* The TAP-FSM state is always left in the PAUSE-DR/PAUSE-IR state.
*
* Maximum achievable TCK frequency is 100 kHz for ANGIE clocked at 24 MHz.
*
* @param out_offset offset in EP1OUTBUF where payload data starts
* @param in_offset
*/
int it;
void jtag_scan_io(uint8_t out_offset, uint8_t in_offset)
{
uint8_t scan_size_bytes, bits_last_byte;
uint8_t tms_count_start, tms_count_end;
uint8_t tms_sequence_start, tms_sequence_end;
uint8_t tdi_data, tdo_data, i, j;
uint8_t outb_buffer;
it++;
/* Get parameters from EP1OUTBUF */
scan_size_bytes = EP1OUTBUF[out_offset];
bits_last_byte = EP1OUTBUF[out_offset + 1];
tms_count_start = (EP1OUTBUF[out_offset + 2] >> 4) & 0x0F;
tms_count_end = EP1OUTBUF[out_offset + 2] & 0x0F;
tms_sequence_start = EP1OUTBUF[out_offset + 3];
tms_sequence_end = EP1OUTBUF[out_offset + 4];
if (tms_count_start > 0)
jtag_clock_tms(tms_count_start, tms_sequence_start);
outb_buffer = IOB & ~(bmbit2 | bmbit1);
/* Shift all bytes except the last byte */
for (i = 0; i < scan_size_bytes - 1; i++) {
tdi_data = EP1OUTBUF[i + out_offset + 5];
tdo_data = 0;
for (j = 0; j < 8; j++) {
if (tdi_data & 0x01)
outb_buffer |= bmbit3;
else
outb_buffer &= ~bmbit3;
IOB = outb_buffer; /* TDI and TCK change here */
tdi_data = tdi_data >> 1;
IOB = (outb_buffer | bmbit2);
tdo_data = tdo_data >> 1;
if (PIN_TDO)
tdo_data |= 0x80;
}
/* Copy TDO data to EP1INBUF */
EP1INBUF[i + in_offset] = tdo_data;
}
tdi_data = EP1OUTBUF[i + out_offset + 5];
tdo_data = 0;
/* Shift the last byte */
for (j = 0; j < bits_last_byte; j++) {
if (tdi_data & 0x01)
outb_buffer |= bmbit3;
else
outb_buffer &= ~bmbit3;
/* Assert TMS signal if requested and this is the last bit */
if (j == (bits_last_byte - 1) && tms_count_end > 0) {
outb_buffer |= bmbit1;
tms_count_end--;
tms_sequence_end = tms_sequence_end >> 1;
}
IOB = outb_buffer; /* TDI and TCK change here */
tdi_data = tdi_data >> 1;
IOB = (outb_buffer | bmbit2);
tdo_data = tdo_data >> 1;
if (PIN_TDO)
tdo_data |= 0x80;
}
tdo_data = tdo_data >> (8 - bits_last_byte);
/* Copy TDO data to EP1INBUF */
EP1INBUF[i + in_offset] = tdo_data;
/* Move to correct end state */
if (tms_count_end > 0)
jtag_clock_tms(tms_count_end, tms_sequence_end);
}
/**
* Perform bidirectional JTAG SCAN operation at maximum TCK frequency.
*
* Data stored in EP2 OUT buffer is shifted into the JTAG chain via TDI, TDO
* data is sampled and stored in the EP2 IN buffer.
* The TAP-FSM state is always left in the PAUSE-DR/PAUSE-IR state.
*
* Maximum achievable TCK frequency is 78 kHz for ANGIE clocked at 24 MHz.
*
* @param out_offset offset in EP1OUTBUF where payload data starts
* @param in_offset
*/
void jtag_slow_scan_io(uint8_t out_offset, uint8_t in_offset)
{
uint8_t scan_size_bytes, bits_last_byte;
uint8_t tms_count_start, tms_count_end;
uint8_t tms_sequence_start, tms_sequence_end;
uint8_t tdi_data, tdo_data, i, j, k;
uint8_t outb_buffer;
/* Get parameters from EP1OUTBUF */
scan_size_bytes = EP1OUTBUF[out_offset];
bits_last_byte = EP1OUTBUF[out_offset + 1];
tms_count_start = (EP1OUTBUF[out_offset + 2] >> 4) & 0x0F;
tms_count_end = EP1OUTBUF[out_offset + 2] & 0x0F;
tms_sequence_start = EP1OUTBUF[out_offset + 3];
tms_sequence_end = EP1OUTBUF[out_offset + 4];
if (tms_count_start > 0)
jtag_slow_clock_tms(tms_count_start, tms_sequence_start);
outb_buffer = IOB & ~(bmbit2 | bmbit1);
/* Shift all bytes except the last byte */
for (i = 0; i < scan_size_bytes - 1; i++) {
tdi_data = EP1OUTBUF[i + out_offset + 5];
tdo_data = 0;
for (j = 0; j < 8; j++) {
if (tdi_data & 0x01)
outb_buffer |= bmbit3;
else
outb_buffer &= ~bmbit3;
IOB = outb_buffer; /* TDI and TCK change here */
for (k = 0; k < delay_scan_io; k++)
;
tdi_data = tdi_data >> 1;
IOB = (outb_buffer | bmbit2);
for (k = 0; k < delay_scan_io; k++)
;
tdo_data = tdo_data >> 1;
if (PIN_TDO)
tdo_data |= 0x80;
}
/* Copy TDO data to EP1INBUF */
EP1INBUF[i + in_offset] = tdo_data;
}
tdi_data = EP1OUTBUF[i + out_offset + 5];
tdo_data = 0;
/* Shift the last byte */
for (j = 0; j < bits_last_byte; j++) {
if (tdi_data & 0x01)
outb_buffer |= bmbit3;
else
outb_buffer &= ~bmbit3;
/* Assert TMS signal if requested and this is the last bit */
if (j == (bits_last_byte - 1) && tms_count_end > 0) {
outb_buffer |= bmbit1;
tms_count_end--;
tms_sequence_end = tms_sequence_end >> 1;
}
IOB = outb_buffer; /* TDI and TCK change here */
for (k = 0; k < delay_scan_io; k++)
;
tdi_data = tdi_data >> 1;
IOB = (outb_buffer | bmbit2);
for (k = 0; k < delay_scan_io; k++)
;
tdo_data = tdo_data >> 1;
if (PIN_TDO)
tdo_data |= 0x80;
}
tdo_data = tdo_data >> (8 - bits_last_byte);
/* Copy TDO data to EP1INBUF */
EP1INBUF[i + in_offset] = tdo_data;
/* Move to correct end state */
if (tms_count_end > 0)
jtag_slow_clock_tms(tms_count_end, tms_sequence_end);
}
/**
* Generate TCK clock cycles.
*
* Maximum achievable TCK frequency is 375 kHz for ANGIE clocked at 24 MHz.
*
* @param count number of TCK clock cycles to generate.
*/
void jtag_clock_tck(uint16_t count)
{
uint16_t i;
uint8_t outb_buffer = IOB & ~(bmbit2);
for (i = 0; i < count; i++) {
IOB = outb_buffer;
IOB = outb_buffer | bmbit2;
}
}
/**
* Generate TCK clock cycles at variable frequency.
*
* Maximum achievable TCK frequency is 166.6 kHz for ANGIE clocked at 24 MHz.
*
* @param count number of TCK clock cycles to generate.
*/
void jtag_slow_clock_tck(uint16_t count)
{
uint16_t i;
uint8_t j;
uint8_t outb_buffer = IOB & ~(bmbit2);
for (i = 0; i < count; i++) {
IOB = outb_buffer;
for (j = 0; j < delay_tck; j++)
;
IOB = outb_buffer | bmbit2;
for (j = 0; j < delay_tck; j++)
;
}
}
/**
* Perform TAP FSM state transitions at maximum TCK frequency.
*
* Maximum achievable TCK frequency is 176 kHz for ANGIE clocked at 24 MHz.
*
* @param count the number of state transitions to perform.
* @param sequence the TMS pin levels for each state transition, starting with
* the least-significant bit.
*/
void jtag_clock_tms(uint8_t count, uint8_t sequence)
{
uint8_t outb_buffer = IOB & ~(bmbit2);
uint8_t i;
for (i = 0; i < count; i++) {
/* Set TMS pin according to sequence parameter */
if (sequence & 0x1)
outb_buffer |= bmbit1;
else
outb_buffer &= ~bmbit1;
IOB = outb_buffer;
sequence = sequence >> 1;
IOB = outb_buffer | bmbit2;
}
}
/**
* Perform TAP-FSM state transitions at less than maximum TCK frequency.
*
* Maximum achievable TCK frequency is 117 kHz for ANGIE clocked at 24 MHz.
*
* @param count the number of state transitions to perform.
* @param sequence the TMS pin levels for each state transition, starting with
* the least-significant bit.
*/
void jtag_slow_clock_tms(uint8_t count, uint8_t sequence)
{
uint8_t outb_buffer = IOB & ~(bmbit2);
uint8_t i, j;
for (i = 0; i < count; i++) {
/* Set TMS pin according to sequence parameter */
if (sequence & 0x1)
outb_buffer |= bmbit1;
else
outb_buffer &= ~bmbit1;
IOB = outb_buffer;
for (j = 0; j < delay_tms; j++)
;
sequence = sequence >> 1;
IOB = outb_buffer | bmbit2;
for (j = 0; j < delay_tms; j++)
;
}
}
uint16_t jtag_get_signals(void)
{
uint8_t input_signal_state, output_signal_state;
input_signal_state = 0;
output_signal_state = 0;
/* Get states of input pins */
if (PIN_TDO)
input_signal_state |= SIGNAL_TDO;
/* Get states of output pins */
output_signal_state = IOB & MASK_PORTB_DIRECTION_OUT;
return ((uint16_t)input_signal_state << 8) | ((uint16_t)output_signal_state);
}
/**
* Set state of JTAG output signals.
*
* @param low signals which should be de-asserted.
* @param high signals which should be asserted.
*/
void jtag_set_signals(uint8_t low, uint8_t high)
{
IOB &= ~(low & MASK_PORTB_DIRECTION_OUT);
IOB |= (high & MASK_PORTB_DIRECTION_OUT);
}
/**
* Configure TCK delay parameters.
*
* @param scan_in number of delay cycles in scan_in operations.
* @param scan_out number of delay cycles in scan_out operations.
* @param scan_io number of delay cycles in scan_io operations.
* @param tck number of delay cycles in clock_tck operations.
* @param tms number of delay cycles in clock_tms operations.
*/
void jtag_configure_tck_delay(uint8_t scan_in, uint8_t scan_out,
uint8_t scan_io, uint8_t tck, uint8_t tms)
{
delay_scan_in = scan_in;
delay_scan_out = scan_out;
delay_scan_io = scan_io;
delay_tck = tck;
delay_tms = tms;
}

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contrib/firmware/angie/c/src/main.c
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// SPDX-License-Identifier: GPL-2.0-or-later
/****************************************************************************
File : main.c *
Contents : main code for NanoXplore USB-JTAG ANGIE adapter *
hardware. *
Based on openULINK project code by: Martin Schmoelzer. *
Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
<aboudjelida@nanoxplore.com> *
<ahmederrachedbjld@gmail.com> *
*****************************************************************************/
#include "usb.h"
#include "delay.h"
#include "protocol.h"
#include "reg_ezusb.h"
#include <serial.h>
#include <stdio.h>
extern void sudav_isr(void)__interrupt SUDAV_ISR;
extern void sof_isr(void)__interrupt;
extern void sutok_isr(void)__interrupt;
extern void suspend_isr(void)__interrupt;
extern void usbreset_isr(void)__interrupt;
extern void highspeed_isr(void)__interrupt;
extern void ep0ack_isr(void)__interrupt;
extern void stub_isr(void)__interrupt;
extern void ep0in_isr(void)__interrupt;
extern void ep0out_isr(void)__interrupt;
extern void ep1in_isr(void)__interrupt;
extern void ep1out_isr(void)__interrupt;
extern void ep2_isr(void)__interrupt;
extern void ep4_isr(void)__interrupt;
extern void ep6_isr(void)__interrupt;
extern void ep8_isr(void)__interrupt;
extern void ibn_isr(void)__interrupt;
extern void ep0pingnak_isr(void)__interrupt;
extern void ep1pingnak_isr(void)__interrupt;
extern void ep2pingnak_isr(void)__interrupt;
extern void ep4pingnak_isr(void)__interrupt;
extern void ep6pingnak_isr(void)__interrupt;
extern void ep8pingnak_isr(void)__interrupt;
extern void errorlimit_isr(void)__interrupt;
extern void ep2piderror_isr(void)__interrupt;
extern void ep4piderror_isr(void)__interrupt;
extern void ep6piderror_isr(void)__interrupt;
extern void ep8piderror_isr(void)__interrupt;
extern void ep2pflag_isr(void)__interrupt;
extern void ep4pflag_isr(void)__interrupt;
extern void ep6pflag_isr(void)__interrupt;
extern void ep8pflag_isr(void)__interrupt;
extern void ep2eflag_isr(void)__interrupt;
extern void ep4eflag_isr(void)__interrupt;
extern void ep6eflag_isr(void)__interrupt;
extern void ep8eflag_isr(void)__interrupt;
extern void ep2fflag_isr(void)__interrupt;
extern void ep4fflag_isr(void)__interrupt;
extern void ep6fflag_isr(void)__interrupt;
extern void ep8fflag_isr(void)__interrupt;
extern void gpifcomplete_isr(void)__interrupt;
extern void gpifwaveform_isr(void)__interrupt;
void gpif_init(void);
int main(void)
{
CPUCS = ((CPUCS & ~bmclkspd) | (CLK_48M << 3) | CLKOE); /* required for sio0_init */
sio0_init(57600); /* needed for printf */
ep_init();
gpif_init();
interrupt_init();
io_init();
/* Perform ReNumeration */
USBCS |= (DISCON | RENUM);
delay_ms(250);
USBCS &= ~DISCON;
/* Begin executing command(s). This function never returns. */
command_loop();
/* Never reached, but SDCC complains about missing return statement */
return 0;
}

192
contrib/firmware/angie/c/src/protocol.c
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// SPDX-License-Identifier: GPL-2.0-or-later
/****************************************************************************
File : protocol.c *
Contents : Jtag commands handling protocol code for NanoXplore *
USB-JTAG ANGIE adapter hardware. *
Based on openULINK project code by: Martin Schmoelzer. *
Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
<aboudjelida@nanoxplore.com> *
<ahmederrachedbjld@gmail.com> *
*****************************************************************************/
#include "usb.h"
#include "protocol.h"
#include "jtag.h"
#include "delay.h"
#include "io.h"
#include "msgtypes.h"
#include "reg_ezusb.h"
#include <serial.h>
#include <stdio.h>
/** Index in EP1 Bulk-OUT data buffer that contains the current command ID */
volatile uint8_t cmd_id_index;
/** Number of data bytes already in EP1 Bulk-IN buffer */
volatile uint8_t payload_index_in;
/**
* Executes one command and updates global command indexes.
*
* @return true if this command was the last command.
* @return false if there are more commands within the current contents of the
* Bulk EP1-OUT data buffer.
*/
bool execute_command(void)
{
uint8_t usb_out_bytecount, usb_in_bytecount;
uint16_t signal_state = 0;
uint16_t count;
/* Most commands do not transfer IN data. To save code space, we write 0 to
* usb_in_bytecount here, then modify it in the switch statement below where
* necessary */
usb_in_bytecount = 0;
switch (EP1OUTBUF[cmd_id_index] /* Command ID */) {
case CMD_SCAN_IN:
usb_out_bytecount = 5;
usb_in_bytecount = EP1OUTBUF[cmd_id_index + 1];
jtag_scan_in((cmd_id_index + 1), payload_index_in);
break;
case CMD_SCAN_OUT:
usb_out_bytecount = EP1OUTBUF[cmd_id_index + 1] + 5;
jtag_scan_out(cmd_id_index + 1);
break;
case CMD_SCAN_IO:
usb_in_bytecount = EP1OUTBUF[cmd_id_index + 1];
usb_out_bytecount = usb_in_bytecount + 5;
jtag_scan_io((cmd_id_index + 1), payload_index_in);
break;
case CMD_CLOCK_TMS:
usb_out_bytecount = 2;
jtag_clock_tms(EP1OUTBUF[cmd_id_index + 1], EP1OUTBUF[cmd_id_index + 2]);
break;
case CMD_CLOCK_TCK:
usb_out_bytecount = 2;
count = (uint16_t)EP1OUTBUF[cmd_id_index + 1];
count |= ((uint16_t)EP1OUTBUF[cmd_id_index + 2]) << 8;
jtag_clock_tck(count);
break;
case CMD_SLOW_SCAN_IN:
usb_out_bytecount = 5;
usb_in_bytecount = EP1OUTBUF[cmd_id_index + 1];
jtag_slow_scan_in(cmd_id_index + 1, payload_index_in);
break;
case CMD_SLOW_SCAN_OUT:
usb_out_bytecount = EP1OUTBUF[cmd_id_index + 1] + 5;
jtag_slow_scan_out(cmd_id_index + 1);
break;
case CMD_SLOW_SCAN_IO:
usb_in_bytecount = EP1OUTBUF[cmd_id_index + 1];
usb_out_bytecount = usb_in_bytecount + 5;
jtag_slow_scan_io(cmd_id_index + 1, payload_index_in);
break;
case CMD_SLOW_CLOCK_TMS:
usb_out_bytecount = 2;
jtag_slow_clock_tms(EP1OUTBUF[cmd_id_index + 1], EP1OUTBUF[cmd_id_index + 2]);
break;
case CMD_SLOW_CLOCK_TCK:
usb_out_bytecount = 2;
count = (uint16_t)EP1OUTBUF[cmd_id_index + 1];
count |= ((uint16_t)EP1OUTBUF[cmd_id_index + 2]) << 8;
jtag_slow_clock_tck(count);
break;
case CMD_SLEEP_US:
usb_out_bytecount = 2;
count = (uint16_t)EP1OUTBUF[cmd_id_index + 1];
count |= ((uint16_t)EP1OUTBUF[cmd_id_index + 2]) << 8;
delay_us(count);
break;
case CMD_SLEEP_MS:
usb_out_bytecount = 2;
count = (uint16_t)EP1OUTBUF[cmd_id_index + 1];
count |= ((uint16_t)EP1OUTBUF[cmd_id_index + 2]) << 8;
delay_ms(count);
break;
case CMD_GET_SIGNALS:
usb_out_bytecount = 0;
usb_in_bytecount = 2;
signal_state = jtag_get_signals();
EP1INBUF[payload_index_in] = (signal_state >> 8);
EP1INBUF[payload_index_in + 1] = (signal_state & 0xFF);
break;
case CMD_SET_SIGNALS:
usb_out_bytecount = 2;
jtag_set_signals(EP1OUTBUF[cmd_id_index + 1], EP1OUTBUF[cmd_id_index + 2]);
break;
case CMD_CONFIGURE_TCK_FREQ:
usb_out_bytecount = 5;
jtag_configure_tck_delay(EP1OUTBUF[cmd_id_index + 1], /* scan_in */
EP1OUTBUF[cmd_id_index + 2], /* scan_out */
EP1OUTBUF[cmd_id_index + 3], /* scan_io */
EP1OUTBUF[cmd_id_index + 4], /* clock_tck */
EP1OUTBUF[cmd_id_index + 5]); /* clock_tms */
break;
case CMD_TEST:
usb_out_bytecount = 1;
/* Do nothing... This command is only used to test if the device is ready
* to accept new commands */
break;
default:
/* Should never be reached */
usb_out_bytecount = 0;
break;
}
/* Update EP1 Bulk-IN data byte count */
payload_index_in += usb_in_bytecount;
/* Determine if this was the last command */
if ((cmd_id_index + usb_out_bytecount + 1) >= EP1OUTBC)
return true;
/* Not the last command, update cmd_id_index */
cmd_id_index += (usb_out_bytecount + 1);
return false;
}
/**
* Forever wait for commands and execute them as they arrive.
*/
void command_loop(void)
{
bool last_command;
while (1) {
cmd_id_index = 0;
payload_index_in = 0;
/* Wait until host sends Bulk-OUT packet */
while ((!ep1_out) && (!ep6_out))
;
if (ep6_out) {
/* Execute I2C command */
i2c_recieve();
ep6_out = false;
}
if (ep1_out) {
ep1_out = false;
/* Execute the commands */
last_command = false;
while (!last_command)
last_command = execute_command();
/* Send back EP1 Bulk-IN packet if required */
if (payload_index_in > 0) {
EP1INBC = payload_index_in;
syncdelay(3);
while (!ep1_in)
;
ep1_in = false;
}
/* Re-arm EP1-OUT after command execution */
EP1OUTBC = 0;
syncdelay(3);
EP1OUTBC = 0;
syncdelay(3);
}
}
}

77
contrib/firmware/angie/c/src/serial.c
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// SPDX-License-Identifier: LGPL-2.1-or-later
/*
* This code was taken from the fx2lib project from this link:
* https://github.com/djmuhlestein/fx2lib
*
* Copyright (C) 2009 Ubixum, Inc.
*/
#include <reg_ezusb.h>
#include <fx2macros.h>
#include <serial.h>
#include <stdint.h>
/**
* using the comp port implies that timer 2 will be used as
* a baud rate generator. (Don't use timer 2)
**/
void sio0_init(uint32_t baud_rate) __critical
{
uint16_t hl; /* hl value for reload */
uint8_t mult; /* multiplier for clock speed */
uint32_t tmp; /* scratch for mult/divide */
mult = (CPUFREQ == CLK_12M) ? 1 : ((CPUFREQ == CLK_24M) ? 2 : 4);
/* set the clock rate */
/* use clock 2 */
RCLK = 1; TCLK = 1;
tmp = mult * 375000L * 2;
tmp /= baud_rate;
tmp += 1;
tmp /= 2;
hl = 0xFFFF - (uint16_t)tmp;
RCAP2H = (uint8_t)(((uint16_t)(hl) >> 8) & 0xff);
/* seems that the 24/48mhz calculations are always one less than suggested values */
/* trm table 14-16 */
RCAP2L = ((uint8_t)((uint16_t)(hl) & 0xff)) + (mult > 0 ? 1 : 0);
/* start the timer */
TR2 = 1;
/* set up the serial port */
SM0 = 0; SM1 = 1; /* serial mode 1 (asyncronous) */
SM2 = 0 ; /* has to do with receiving */
REN = 1 ; /* to enable receiving */
PCON |= 0x80; /* SET SMOD0, baud rate doubler */
TI = 1; /* we send initial byte */
}
int getchar(void)
{
char c;
while (!RI)
;
c = SBUF0;
RI = 0;
return c;
}
void _transchar(char c)
{
while (!TI)
; /* wait for TI=1 */
TI = 0;
SBUF0 = c;
}
int putchar (char c)
{
if (c == '\n')
_transchar('\r'); /* transmit \r\n */
_transchar(c);
if (c == '\r')
_transchar('\n'); /* transmit \r\n */
return c;
}

894
contrib/firmware/angie/c/src/usb.c
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// SPDX-License-Identifier: GPL-2.0-or-later
/****************************************************************************
File : usb.c *
Contents : usb communication handling code for NanoXplore USB-JTAG *
ANGIE adapter hardware. *
Based on openULINK project code by: Martin Schmoelzer. *
Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS. *
<aboudjelida@nanoxplore.com> *
<ahmederrachedbjld@gmail.com> *
*****************************************************************************/
#include "usb.h"
#include "stdint.h"
#include "delay.h"
#include "io.h"
#include "reg_ezusb.h"
#include <fx2macros.h>
#include <serial.h>
#include <stdio.h>
#include "i2c.h"
/* Also update external declarations in "include/usb.h" if making changes to
* these variables!
*/
volatile bool ep1_out;
volatile bool ep1_in;
volatile bool ep6_out;
volatile __xdata __at 0xE6B8 struct setup_data setup_data;
/* Define number of endpoints (except Control Endpoint 0) in a central place.
* Be sure to include the necessary endpoint descriptors!
*/
#define NUM_ENDPOINTS 3
__code struct usb_device_descriptor device_descriptor = {
.blength = sizeof(struct usb_device_descriptor),
.bdescriptortype = DESCRIPTOR_TYPE_DEVICE,
.bcdusb = 0x0200, /* BCD: 02.00 (Version 2.0 USB spec) */
.bdeviceclass = 0xEF,
.bdevicesubclass = 0x02,
.bdeviceprotocol = 0x01,
.bmaxpacketsize0 = 64,
.idvendor = 0x584e,
.idproduct = 0x414f,
.bcddevice = 0x0000,
.imanufacturer = 1,
.iproduct = 2,
.iserialnumber = 3,
.bnumconfigurations = 1
};
/* WARNING: ALL config, interface and endpoint descriptors MUST be adjacent! */
__code struct usb_config_descriptor config_descriptor = {
.blength = sizeof(struct usb_config_descriptor),
.bdescriptortype = DESCRIPTOR_TYPE_CONFIGURATION,
.wtotallength = sizeof(struct usb_config_descriptor) +
3 * sizeof(struct usb_interface_descriptor) +
((NUM_ENDPOINTS + 2) * sizeof(struct usb_endpoint_descriptor)),
.bnuminterfaces = 2,
.bconfigurationvalue = 1,
.iconfiguration = 1, /* String describing this configuration */
.bmattributes = 0x80, /* Only MSB set according to USB spec */
.maxpower = 50 /* 100 mA */
};
__code struct usb_interface_descriptor interface_descriptor00 = {
.blength = sizeof(struct usb_interface_descriptor),
.bdescriptortype = DESCRIPTOR_TYPE_INTERFACE,
.binterfacenumber = 0,
.balternatesetting = 0,
.bnumendpoints = NUM_ENDPOINTS,
.binterfaceclass = 0XFF,
.binterfacesubclass = 0x00,
.binterfaceprotocol = 0x00,
.iinterface = 4
};
__code struct usb_endpoint_descriptor bulk_ep1_out_endpoint_descriptor = {
.blength = sizeof(struct usb_endpoint_descriptor),
.bdescriptortype = 0x05,
.bendpointaddress = (1 | USB_DIR_OUT),
.bmattributes = 0x02,
.wmaxpacketsize = 64,
.binterval = 0
};
__code struct usb_endpoint_descriptor bulk_ep1_in_endpoint_descriptor = {
.blength = sizeof(struct usb_endpoint_descriptor),
.bdescriptortype = 0x05,
.bendpointaddress = (1 | USB_DIR_IN),
.bmattributes = 0x02,
.wmaxpacketsize = 64,
.binterval = 0
};
__code struct usb_endpoint_descriptor bulk_ep2_endpoint_descriptor = {
.blength = sizeof(struct usb_endpoint_descriptor),
.bdescriptortype = 0x05,
.bendpointaddress = (2 | USB_DIR_OUT),
.bmattributes = 0x02,
.wmaxpacketsize = 512,
.binterval = 0
};
__code struct usb_interface_descriptor interface_descriptor01 = {
.blength = sizeof(struct usb_interface_descriptor),
.bdescriptortype = DESCRIPTOR_TYPE_INTERFACE,
.binterfacenumber = 1,
.balternatesetting = 0,
.bnumendpoints = 2,
.binterfaceclass = 0x0A,
.binterfacesubclass = 0x00,
.binterfaceprotocol = 0x00,
.iinterface = 0x00
};
__code struct usb_endpoint_descriptor bulk_ep6_out_endpoint_descriptor = {
.blength = sizeof(struct usb_endpoint_descriptor),
.bdescriptortype = 0x05,
.bendpointaddress = (6 | USB_DIR_OUT),
.bmattributes = 0x02,
.wmaxpacketsize = 512,
.binterval = 0
};
__code struct usb_endpoint_descriptor bulk_ep8_in_endpoint_descriptor = {
.blength = sizeof(struct usb_endpoint_descriptor),
.bdescriptortype = 0x05,
.bendpointaddress = (8 | USB_DIR_IN),
.bmattributes = 0x02,
.wmaxpacketsize = 512,
.binterval = 0
};
__code struct usb_language_descriptor language_descriptor = {
.blength = 4,
.bdescriptortype = DESCRIPTOR_TYPE_STRING,
.wlangid = {0x0409} /* US English */
};
__code struct usb_string_descriptor strmanufacturer =
STR_DESCR(16, 'N', 'a', 'n', 'o', 'X', 'p', 'l', 'o', 'r', 'e', ',', ' ', 'S', 'A', 'S', '.');
__code struct usb_string_descriptor strproduct =
STR_DESCR(13, 'A', 'N', 'G', 'I', 'E', ' ', 'A', 'd', 'a', 'p', 't', 'e', 'r');
__code struct usb_string_descriptor strserialnumber =
STR_DESCR(6, '0', '0', '0', '0', '0', '1');
__code struct usb_string_descriptor strconfigdescr =
STR_DESCR(12, 'J', 'T', 'A', 'G', ' ', 'A', 'd', 'a', 'p', 't', 'e', 'r');
/* Table containing pointers to string descriptors */
__code struct usb_string_descriptor *__code en_string_descriptors[4] = {
&strmanufacturer,
&strproduct,
&strserialnumber,
&strconfigdescr
};
void sudav_isr(void)__interrupt SUDAV_ISR
{
EXIF &= ~0x10; /* Clear USBINT: Main global interrupt */
USBIRQ = SUDAVI;
EP0CS |= HSNAK;
usb_handle_setup_data();
}
void sof_isr(void)__interrupt SOF_ISR
{
}
void sutok_isr(void)__interrupt SUTOK_ISR
{
}
void suspend_isr(void)__interrupt SUSPEND_ISR
{
}
void usbreset_isr(void)__interrupt USBRESET_ISR
{
}
void highspeed_isr(void)__interrupt HIGHSPEED_ISR
{
}
void ep0ack_isr(void)__interrupt EP0ACK_ISR
{
}
void stub_isr(void)__interrupt STUB_ISR
{
}
void ep0in_isr(void)__interrupt EP0IN_ISR
{
}
void ep0out_isr(void)__interrupt EP0OUT_ISR
{
}
void ep1in_isr(void)__interrupt EP1IN_ISR
{
ep1_in = true;
EXIF &= ~0x10; /* Clear USBINT: Main global interrupt */
EPIRQ = 0x04; /* Clear individual EP1IN IRQ */
}
void ep1out_isr(void)__interrupt EP1OUT_ISR
{
ep1_out = true;
EXIF &= ~0x10; /* Clear USBINT: Main global interrupt */
EPIRQ = 0x08; /* Clear individual EP1OUT IRQ */
}
void ep2_isr(void)__interrupt EP2_ISR
{
}
void ep4_isr(void)__interrupt EP4_ISR
{
}
void ep6_isr(void)__interrupt EP6_ISR
{
ep6_out = true;
EXIF &= ~0x10; /* Clear USBINT: Main global interrupt */
EPIRQ = 0x40; /* Clear individual EP6OUT IRQ */
}
void ep8_isr(void)__interrupt EP8_ISR
{
EXIF &= ~0x10; /* Clear USBINT: Main global interrupt */
EPIRQ = 0x80; /* Clear individual EP8IN IRQ */
}
void ibn_isr(void)__interrupt IBN_ISR
{
}
void ep0pingnak_isr(void)__interrupt EP0PINGNAK_ISR
{
}
void ep1pingnak_isr(void)__interrupt EP1PINGNAK_ISR
{
}
void ep2pingnak_isr(void)__interrupt EP2PINGNAK_ISR
{
}
void ep4pingnak_isr(void)__interrupt EP4PINGNAK_ISR
{
}
void ep6pingnak_isr(void)__interrupt EP6PINGNAK_ISR
{
}
void ep8pingnak_isr(void)__interrupt EP8PINGNAK_ISR
{
}
void errorlimit_isr(void)__interrupt ERRORLIMIT_ISR
{
}
void ep2piderror_isr(void)__interrupt EP2PIDERROR_ISR
{
}
void ep4piderror_isr(void)__interrupt EP4PIDERROR_ISR
{
}
void ep6piderror_isr(void)__interrupt EP6PIDERROR_ISR
{
}
void ep8piderror_isr(void)__interrupt EP8PIDERROR_ISR
{
}
void ep2pflag_isr(void)__interrupt EP2PFLAG_ISR
{
}
void ep4pflag_isr(void)__interrupt EP4PFLAG_ISR
{
}
void ep6pflag_isr(void)__interrupt EP6PFLAG_ISR
{
}
void ep8pflag_isr(void)__interrupt EP8PFLAG_ISR
{
}
void ep2eflag_isr(void)__interrupt EP2EFLAG_ISR
{
}
void ep4eflag_isr(void)__interrupt EP4EFLAG_ISR
{
}
void ep6eflag_isr(void)__interrupt EP6EFLAG_ISR
{
}
void ep8eflag_isr(void)__interrupt EP8EFLAG_ISR
{
}
void ep2fflag_isr(void)__interrupt EP2FFLAG_ISR
{
}
void ep4fflag_isr(void)__interrupt EP4FFLAG_ISR
{
}
void ep6fflag_isr(void)__interrupt EP6FFLAG_ISR
{
}
void ep8fflag_isr(void)__interrupt EP8FFLAG_ISR
{
}
void gpifcomplete_isr(void)__interrupt GPIFCOMPLETE_ISR
{
}
void gpifwaveform_isr(void)__interrupt GPIFWAVEFORM_ISR
{
}
/**
* Return the control/status register for an endpoint
*
* @param ep endpoint address
* @return on success: pointer to Control & Status register for endpoint
* specified in \a ep
* @return on failure: NULL
*/
__xdata uint8_t *usb_get_endpoint_cs_reg(uint8_t ep)
{
/* Mask direction bit */
uint8_t ep_num = ep & ~0x80;
switch (ep_num) {
case 0:
return &EP0CS;
case 1:
return ep & 0x80 ? &EP1INCS : &EP1OUTCS;
case 2:
return &EP2CS;
case 4:
return &EP4CS;
case 6:
return &EP6CS;
case 8:
return &EP8CS;
default:
return NULL;
}
}
void usb_reset_data_toggle(uint8_t ep)
{
/* TOGCTL register:
+----+-----+-----+------+-----+-------+-------+-------+
| Q | S | R | IO | EP3 | EP2 | EP1 | EP0 |
+----+-----+-----+------+-----+-------+-------+-------+
To reset data toggle bits, we have to write the endpoint direction (IN/OUT)
to the IO bit and the endpoint number to the EP2..EP0 bits. Then, in a
separate write cycle, the R bit needs to be set.
*/
TOGCTL = (((ep & 0x80) >> 3) + (ep & 0x0F));
TOGCTL |= BMRESETTOGGLE;
}
/**
* Handle GET_STATUS request.
*
* @return on success: true
* @return on failure: false
*/
bool usb_handle_get_status(void)
{
uint8_t *ep_cs;
switch (setup_data.bmrequesttype) {
case GS_DEVICE:
/* Two byte response: Byte 0, Bit 0 = self-powered, Bit 1 = remote wakeup.
* Byte 1: reserved, reset to zero */
EP0BUF[0] = 0;
EP0BUF[1] = 0;
/* Send response */
EP0BCH = 0;
syncdelay(3);
EP0BCL = 2;
syncdelay(3);
break;
case GS_INTERFACE:
/* Always return two zero bytes according to USB 1.1 spec, p. 191 */
EP0BUF[0] = 0;
EP0BUF[1] = 0;
/* Send response */
EP0BCH = 0;
syncdelay(3);
EP0BCL = 2;
syncdelay(3);
break;
case GS_ENDPOINT:
/* Get stall bit for endpoint specified in low byte of wIndex */
ep_cs = usb_get_endpoint_cs_reg(setup_data.windex & 0xff);
if (*ep_cs & EPSTALL)
EP0BUF[0] = 0x01;
else
EP0BUF[0] = 0x00;
/* Second byte sent has to be always zero */
EP0BUF[1] = 0;
/* Send response */
EP0BCH = 0;
syncdelay(3);
EP0BCL = 2;
syncdelay(3);
break;
default:
return false;
}
return true;
}
/**
* Handle CLEAR_FEATURE request.
*
* @return on success: true
* @return on failure: false
*/
bool usb_handle_clear_feature(void)
{
__xdata uint8_t *ep_cs;
switch (setup_data.bmrequesttype) {
case CF_DEVICE:
/* Clear remote wakeup not supported: stall EP0 */
STALL_EP0();
break;
case CF_ENDPOINT:
if (setup_data.wvalue == 0) {
/* Unstall the endpoint specified in wIndex */
ep_cs = usb_get_endpoint_cs_reg(setup_data.windex);
if (!ep_cs)
return false;
*ep_cs &= ~EPSTALL;
} else {
/* Unsupported feature, stall EP0 */
STALL_EP0();
}
break;
default:
/* Vendor commands... */
break;
}
return true;
}
/**
* Handle SET_FEATURE request.
*
* @return on success: true
* @return on failure: false
*/
bool usb_handle_set_feature(void)
{
__xdata uint8_t *ep_cs;
switch (setup_data.bmrequesttype) {
case SF_DEVICE:
if (setup_data.wvalue == 2)
return true;
break;
case SF_ENDPOINT:
if (setup_data.wvalue == 0) {
/* Stall the endpoint specified in wIndex */
ep_cs = usb_get_endpoint_cs_reg(setup_data.windex);
if (!ep_cs)
return false;
*ep_cs |= EPSTALL;
} else {
/* Unsupported endpoint feature */
return false;
}
break;
default:
/* Vendor commands... */
break;
}
return true;
}
/**
* Handle GET_DESCRIPTOR request.
*
* @return on success: true
* @return on failure: false
*/
bool usb_handle_get_descriptor(void)
{
__xdata uint8_t descriptor_type;
__xdata uint8_t descriptor_index;
descriptor_type = (setup_data.wvalue & 0xff00) >> 8;
descriptor_index = setup_data.wvalue & 0x00ff;
switch (descriptor_type) {
case DESCRIPTOR_TYPE_DEVICE:
SUDPTRH = HI8(&device_descriptor);
SUDPTRL = LO8(&device_descriptor);
break;
case DESCRIPTOR_TYPE_CONFIGURATION:
SUDPTRH = HI8(&config_descriptor);
SUDPTRL = LO8(&config_descriptor);
break;
case DESCRIPTOR_TYPE_STRING:
if (setup_data.windex == 0) {
/* Supply language descriptor */
SUDPTRH = HI8(&language_descriptor);
SUDPTRL = LO8(&language_descriptor);
} else if (setup_data.windex == 0x0409 /* US English */) {
/* Supply string descriptor */
SUDPTRH = HI8(en_string_descriptors[descriptor_index - 1]);
SUDPTRL = LO8(en_string_descriptors[descriptor_index - 1]);
} else {
return false;
}
break;
default:
/* Unsupported descriptor type */
return false;
}
return true;
}
/**
* Handle SET_INTERFACE request.
*/
void usb_handle_set_interface(void)
{
/* Reset Data Toggle */
usb_reset_data_toggle(USB_DIR_IN | 4);
usb_reset_data_toggle(USB_DIR_OUT | 2);
/* Unstall & clear busy flag of all valid IN endpoints */
EP1INCS = 0 | EPBSY;
/* Unstall all valid OUT endpoints, reset bytecounts */
EP1OUTCS = 0;
EP1OUTBC = 0;
syncdelay(3);
}
/* Initialize GPIF interface transfer count */
void set_gpif_cnt(uint32_t count)
{
GPIFTCB3 = (uint8_t)(((uint32_t)(count) >> 24) & 0x000000ff);
syncdelay(3);
GPIFTCB2 = (uint8_t)(((uint32_t)(count) >> 16) & 0x000000ff);
syncdelay(3);
GPIFTCB1 = (uint8_t)(((uint32_t)(count) >> 8) & 0x000000ff);
syncdelay(3);
GPIFTCB0 = (uint8_t)((uint32_t)(count) & 0x000000ff);
}
/*
* Vendor commands handling:
*/
#define VR_CFGOPEN 0xB0
#define VR_CFGCLOSE 0xB1
uint8_t ix;
uint8_t bcnt;
uint8_t __xdata *eptr;
uint16_t wcnt;
uint32_t __xdata gcnt;
bool usb_handle_send_bitstream(void)
{
eptr = EP0BUF; /* points to EP0BUF 64-byte register */
wcnt = setup_data.wlength; /* total transfer count */
/* Clear EP0BUF for OUT requests */
if (setup_data.bmrequesttype & 0x80) {
bcnt = ((wcnt > 64) ? 64 : wcnt);
for (ix = 0; ix < bcnt; ix++)
eptr[ix] = 0;
}
switch (setup_data.brequest) {
case VR_CFGOPEN:
/* Clear bytecount / to allow new data in / to stops NAKing */
EP0BCH = 0;
EP0BCL = 0;
while (EP0CS & EPBSY)
; /* wait to finish transferring in EP0BUF, until not busy */
gcnt = ((uint32_t)(eptr[0]) << 24) | ((uint32_t)(eptr[1]) << 16)
| ((uint32_t)(eptr[2]) << 8) | (uint32_t)(eptr[3]);
/* Angie board FPGA bitstream download */
switch ((setup_data.wvalue) & 0x00C0) {
case 0x00:
PIN_PROGRAM_B = 0; /* Apply RPGM- pulse */
GPIFWFSELECT = 0xF2; /* Restore Config mode waveforms select */
syncdelay(3);
EP2FIFOCFG = BMAUTOOUT; /* and Automatic 8-bit GPIF OUT mode */
syncdelay(3);
PIN_PROGRAM_B = 1; /* Negate RPGM- pulse */
delay_ms(10); /* FPGA init time < 10mS */
set_gpif_cnt(gcnt); /* Initialize GPIF interface transfer count */
PIN_RDWR_B = 0;
PIN_CSI_B = 0;
GPIFTRIG = GPIF_EP2; /* Trigger GPIF OUT transfer on EP2 */
syncdelay(3);
break;
default:
break;
}
break;
case VR_CFGCLOSE:
ix = 10;
/* wait until GPIF transaction has been completed */
while ((GPIFTRIG & BMGPIFDONE) == 0) {
if (ix-- == 0) {
break;
}
delay_ms(1);
}
switch ((setup_data.wvalue) & 0x00C0) {
case 0x00:
PIN_CSI_B = 1;
PIN_RDWR_B = 1;
IFCONFIG &= 0xFC; /* Exit gpif mode */
break;
default:
break;
}
EP0BCH = 0;
EP0BCL = (uint8_t)(setup_data.wlength); /* Signal buffer is filled */
break;
default:
return true; /* Error: unknown VR command */
}
return false; /* no error; command handled OK */
}
/**
* Handle the arrival of a USB Control Setup Packet.
*/
void usb_handle_setup_data(void)
{
switch (setup_data.brequest) {
case GET_STATUS:
if (!usb_handle_get_status())
STALL_EP0();
break;
case CLEAR_FEATURE:
if (!usb_handle_clear_feature())
STALL_EP0();
break;
case 2: case 4:
/* Reserved values */
STALL_EP0();
break;
case SET_FEATURE:
if (!usb_handle_set_feature())
STALL_EP0();
break;
case SET_ADDRESS:
/* Handled by USB core */
break;
case SET_DESCRIPTOR:
/* Set Descriptor not supported. */
STALL_EP0();
break;
case GET_DESCRIPTOR:
if (!usb_handle_get_descriptor())
STALL_EP0();
break;
case GET_CONFIGURATION:
/* ANGIE has only one configuration, return its index */
EP0BUF[0] = config_descriptor.bconfigurationvalue;
EP0BCH = 0;
EP0BCL = 1;
syncdelay(3);
break;
case SET_CONFIGURATION:
/* ANGIE has only one configuration -> nothing to do */
break;
case GET_INTERFACE:
/* ANGIE only has one interface, return its number */
EP0BUF[0] = interface_descriptor00.binterfacenumber;
EP0BCH = 0;
EP0BCL = 1;
syncdelay(3);
break;
case SET_INTERFACE:
usb_handle_set_interface();
break;
case SYNCH_FRAME:
/* Isochronous endpoints not used -> nothing to do */
break;
default:
/* if not Vendor command, Stall EndPoint 0 */
if (usb_handle_send_bitstream())
STALL_EP0();
break;
}
}
/**
* Handle the initialization of endpoints.
*/
void ep_init(void)
{
EP1INCFG = 0xA0;
syncdelay(3);
EP1OUTCFG = 0xA0;
syncdelay(3);
EP2CFG = 0xA0;
syncdelay(3);
EP4CFG = 0x00;
syncdelay(3);
EP6CFG = 0xA2;
syncdelay(3);
EP8CFG = 0xE2;
syncdelay(3);
/* arm EP1-OUT */
EP1OUTBC = 0;
syncdelay(3);
EP1OUTBC = 0;
syncdelay(3);
/* arm EP1-IN */
EP1INBC = 0;
syncdelay(3);
EP1INBC = 0;
syncdelay(3);
/* arm EP6-OUT */
EP6BCL = 0x80;
syncdelay(3);
EP6BCL = 0x80;
syncdelay(3);
/* Standard procedure to reset FIFOs */
FIFORESET = BMNAKALL; /* NAK all transfers during the reset */
syncdelay(3);
FIFORESET = 0x02; /* reset EP2 FIFO */
syncdelay(3);
FIFORESET = 0x00; /* deactivate the NAK all */
syncdelay(3);
EP2FIFOCFG = 0x00;
syncdelay(3);
EP2FIFOCFG = BMAUTOOUT; /* Automatic 8-bit GPIF OUT mode */
syncdelay(3);
}
void i2c_recieve(void)
{
PIN_SDA_DIR = 0;
if (EP6FIFOBUF[0] == 1) {
uint8_t rdwr = EP6FIFOBUF[0]; //read
uint8_t data_count = EP6FIFOBUF[1]; //data sent count
uint8_t count = EP6FIFOBUF[2]; //requested data count
uint8_t adr = EP6FIFOBUF[3]; //address
uint8_t address = get_address(adr, rdwr); //address byte (read command)
uint8_t address_2 = get_address(adr, 0); //address byte 2 (write command)
printf("%d\n", address - 1);
/* start: */
start_cd();
/* address: */
send_byte(address_2); //write
/* ack: */
uint8_t ack = get_ack();
/* send data */
if (data_count) { //if there is a byte reg
for (uint8_t i = 0; i < data_count; i++) {
send_byte(EP6FIFOBUF[i + 4]);
/* ack(): */
ack = get_ack();
}
}
/* repeated start: */
repeated_start();
/* address: */
send_byte(address);
/* get ack: */
ack = get_ack();
/* receive data */
for (uint8_t i = 0; i < count - 1; i++) {
EP8FIFOBUF[i] = receive_byte();
/* send ack: */
send_ack();
}
EP8FIFOBUF[count - 1] = receive_byte();
/* send Nack: */
send_nack();
/* stop */
stop_cd();
EP8BCH = 0; //EP8
syncdelay(3);
EP8BCL = count; //EP8
EP6BCL = 0x80; //EP6
syncdelay(3);
EP6BCL = 0x80; //EP6
} else {
uint8_t rdwr = EP6FIFOBUF[0]; //write
uint8_t count = EP6FIFOBUF[1]; //data count
uint8_t adr = EP6FIFOBUF[2]; //address
uint8_t address = get_address(adr, rdwr); //address byte (read command)
uint8_t ack_cnt = 0;
/* start(): */
start_cd();
/* address: */
send_byte(address); //write
/* ack(): */
if (!get_ack())
ack_cnt++;
/* send data */
for (uint8_t i = 0; i < count; i++) {
send_byte(EP6FIFOBUF[i + 3]);
/* get ack: */
if (!get_ack())
ack_cnt++;
}
/* stop */
stop_cd();
EP8FIFOBUF[0] = ack_cnt;
EP8BCH = 0; //EP8
syncdelay(3);
EP8BCL = 1; //EP8
EP6BCL = 0x80; //EP6
syncdelay(3);
EP6BCL = 0x80; //EP6
}
}
/**
* Interrupt initialization. Configures USB interrupts.
**/
void interrupt_init(void)
{
/* Enable Interrupts */
EA = 1;
/* Enable USB interrupt (EIE register) */
EUSB = 1;
EICON |= 0x20;
/* Enable INT 2 & 4 Autovectoring */
INTSETUP |= (AV2EN | AV4EN);
/* Enable individual EP1OUT&IN & EP6&8 interrupts */
EPIE |= 0xCC;
/* Clear individual USB interrupt IRQ */
EPIRQ = 0xCC;
/* Enable SUDAV interrupt */
USBIEN |= SUDAVI;
/* Clear SUDAV interrupt */
USBIRQ = SUDAVI;
}
/**
* Handle the initialization of io ports.
*/
void io_init(void)
{
/* PORT A */
PORTACFG = 0x01; /* 0: normal ou 1: alternate function (each bit) */
OEA = 0xEF; /* all OUT exept INIT_B IN */
IOA = 0xFF;
/* PORT B */
OEB = 0xEF; /* all OUT exept TDO */
IOB = 0xFF;
PIN_TRST = 1;
PIN_TMS = 0;
PIN_TCK = 0;
PIN_TDI = 0;
PIN_SRST = 1;
/* PORT C */
PORTCCFG = 0x00; /* 0: normal ou 1: alternate function (each bit) */
OEC = 0xFF;
IOC = 0xFF;
/* PORT D */
OED = 0xFF;
IOD = 0xFF;
}

109
contrib/firmware/angie/hdl/Makefile
View File

@ -1,109 +0,0 @@
# SPDX-License-Identifier: BSD-3-Clause
# Copyright (C) 2023 by NanoXplore, France - all rights reserved
# Needed by timing test
export PROJECT := angie_bitstream
TARGET_PART := xc6slx9-2tqg144
export TOPLEVEL := S609
# Detects the ROOT dir from the .git marker
sp :=
sp +=
_walk = $(if $1,$(wildcard /$(subst $(sp),/,$1)/$2) $(call _walk,$(wordlist 2,$(words $1),x $1),$2))
_find = $(firstword $(call _walk,$(strip $(subst /, ,$1)),$2))
_ROOT := $(patsubst %/.git,%,$(call _find,$(CURDIR),.git))
SHELL := /bin/bash
TOP_DIR := $(realpath $(_ROOT))
HDL_DIR := $(CURDIR)
SRC_DIR := $(HDL_DIR)/src
TOOLS_DIR := $(TOP_DIR)/tools/build
COMMON_DIR := $(TOP_DIR)/common/hdl
COMMON_HDL_DIR := $(COMMON_DIR)/src
COMMON_LIBS := $(COMMON_DIR)/libs
HDL_BUILD_DIR := $(HDL_DIR)/build
OUTPUT_DIR ?= $(HDL_BUILD_DIR)/output
FINAL_OUTPUT_DIR := $(OUTPUT_DIR)/$(PROJECT)
# Tools
MKDIR := mkdir -p
CP := cp -f
HDL_SRC_PATH := $(addprefix $(COMMON_DIR)/ips/, $(HDL_IPS)) $(HDL_DIR)
VHDSOURCE += $(foreach ip,$(HDL_SRC_PATH),$(wildcard $(ip)/src/*.vhd))
VSOURCE += $(foreach ip,$(HDL_SRC_PATH),$(wildcard $(ip)/src/*.v))
VSOURCE += $(foreach ip,$(HDL_SRC_PATH),$(wildcard $(ip)/src/*.vh))
CONSTRAINTS ?= $(SRC_DIR)/$(PROJECT).ucf
COMMON_OPTS := -intstyle xflow
XST_OPTS :=
NGDBUILD_OPTS :=
MAP_OPTS := -mt 2
PAR_OPTS := -mt 4
BITGEN_OPTS := -g Binary:Yes
XILINX_PLATFORM := lin64
PATH := $(PATH):$(XILINX_HOME)/bin/$(XILINX_PLATFORM)
RUN = @echo -ne "\n\n\e[1;33m======== $(1) ========\e[m\n\n"; \
cd $(HDL_BUILD_DIR) && $(XILINX_HOME)/bin/$(XILINX_PLATFORM)/$(1)
compile: $(HDL_BUILD_DIR)/$(PROJECT).bin
install: $(HDL_BUILD_DIR)/$(PROJECT).bin
$(MKDIR) $(FINAL_OUTPUT_DIR)
$(CP) $(HDL_BUILD_DIR)/$(PROJECT).bin $(FINAL_OUTPUT_DIR)
clean:
rm -rf $(HDL_BUILD_DIR)
$(HDL_BUILD_DIR)/$(PROJECT).bin: $(HDL_BUILD_DIR)/$(PROJECT).ncd
$(call RUN,bitgen) $(COMMON_OPTS) $(BITGEN_OPTS) \
-w $(PROJECT).ncd $(PROJECT).bit
$(HDL_BUILD_DIR)/$(PROJECT).ncd: $(HDL_BUILD_DIR)/$(PROJECT).map.ncd
$(call RUN,par) $(COMMON_OPTS) $(PAR_OPTS) \
-w $(PROJECT).map.ncd $(PROJECT).ncd $(PROJECT).pcf
$(HDL_BUILD_DIR)/$(PROJECT).map.ncd: $(HDL_BUILD_DIR)/$(PROJECT).ngd
$(call RUN,map) $(COMMON_OPTS) $(MAP_OPTS) \
-p $(TARGET_PART) \
-w $(PROJECT).ngd -o $(PROJECT).map.ncd $(PROJECT).pcf
$(HDL_BUILD_DIR)/$(PROJECT).ngd: $(HDL_BUILD_DIR)/$(PROJECT).ngc
$(call RUN,ngdbuild) $(COMMON_OPTS) $(NGDBUILD_OPTS) \
-p $(TARGET_PART) -uc $(CONSTRAINTS) \
$(PROJECT).ngc $(PROJECT).ngd
$(HDL_BUILD_DIR)/$(PROJECT).ngc: $(HDL_BUILD_DIR)/$(PROJECT).prj $(HDL_BUILD_DIR)/$(PROJECT).scr
$(call RUN,xst) $(COMMON_OPTS) -ifn $(PROJECT).scr
$(HDL_BUILD_DIR)/$(PROJECT).scr: | $(HDL_BUILD_DIR)
@echo "Updating $@"
@mkdir -p $(HDL_BUILD_DIR)
@rm -f $@
@echo "run" \
"-ifn $(PROJECT).prj" \
"-ofn $(PROJECT).ngc" \
"-ifmt mixed" \
"$(XST_OPTS)" \
"-top $(TOPLEVEL)" \
"-ofmt NGC" \
"-p $(TARGET_PART)" \
> $(HDL_BUILD_DIR)/$(PROJECT).scr
$(HDL_BUILD_DIR)/$(PROJECT).prj: | $(HDL_BUILD_DIR)
@echo "Updating $@"
@rm -f $@
@$(foreach file,$(VSOURCE),echo "verilog work \"$(file)\"" >> $@;)
@$(foreach file,$(VHDSOURCE),echo "vhdl work \"$(file)\"" >> $@;)
@$(foreach lib,$(HDL_LIBS),$(foreach file,$(wildcard $(COMMON_LIBS)/$(lib)/src/*.vhd),echo "vhdl $(lib) \"$(file)\"" >> $@;))
@$(foreach lib,$(HDL_LIBS),$(foreach file,$(wildcard $(COMMON_LIBS)/$(lib)/src/*.v),echo "verilog $(lib) \"$(file)\"" >> $@;))
@$(foreach lib,$(HDL_LIBS),$(foreach file,$(wildcard $(COMMON_LIBS)/$(lib)/src/*.vh),echo "verilog $(lib) \"$(file)\"" >> $@;))
$(HDL_BUILD_DIR):
$(MKDIR) $(HDL_BUILD_DIR)
.PHONY: clean compile install

18
contrib/firmware/angie/hdl/README
View File

@ -1,18 +0,0 @@
# SPDX-License-Identifier: BSD-3-Clause
# Copyright (C) 2023 by NanoXplore, France - all rights reserved
This is the source code of Nanoxplore USB-JTAG Adapter Angie's bitstream.
This bitstream is for the "xc6slx9-2tqg144" Spartan-6 Xilinx FPGA.
To generate this bitstream, you need to install Xilinx ISE Webpack 14.7
You will need to give the ISE software path : export XILINX_HOME=path/to/ise/sw
Please set the enviromnent first by executing the ". ./set_env.sh"
All you have to do now is to write your vhd and constrains codes.
One all is setup, you can use the make commands:
make compile : to compile your (.vhd & .ucf) files in the "src" directory
A directory named "build" will be created, which contains all the generated
files including the bitstream file.
make clean : to delete the build directory.

14
contrib/firmware/angie/hdl/set_env.sh
View File

@ -1,14 +0,0 @@
#!/bin/bash
# SPDX-License-Identifier: BSD-3-Clause
# Copyright (C) 2023 by NanoXplore, France - all rights reserved
[ -z "${XILINX_HOME}" ] && export XILINX_HOME=/home/software/Xilinx/ISE/14.7/ISE_DS/ISE
export PATH="$XILINX_HOME:$PATH"
echo "SET XILINX_HOME to ${XILINX_HOME}"
# This is needed for isim
XILINX_HOME_BASE=${XILINX_HOME}/..
for part in common EDK PlanAhead ISE
do
el=${XILINX_HOME_BASE}/${part}
. ${el}/.settings64.sh ${el}
done

50
contrib/firmware/angie/hdl/src/angie_bitstream.ucf
View File

@ -1,50 +0,0 @@
## SPDX-License-Identifier: BSD-3-Clause
##--------------------------------------------------------------------------
## Project Context: nanoXplore USB-JTAG Adapter Board, Spartan6
## Design Name: NJTAG USB-JTAG Adapter FPGA source code
## Module Name: _angie_openocd.ucf
## Target Device: XC6SLX9-2 TQ144
## Tool versions: ISE Webpack 13.2 -> 14.2
## Author: Ahmed BOUDJELIDA nanoXplore SAS
##--------------------------------------------------------------------------
# WARNING: PullUps on JTAG inputs should be enabled after configuration
# (bitgen option) since the pins are not connected.
net TRST LOC = 'P48' ;
net TMS LOC = 'P43' ;
net TCK LOC = 'P44' ;
net TDI LOC = 'P45' ;
net TDO LOC = 'P46' ;
net SRST LOC = 'P61' ;
net SDA LOC = 'P50' ;
net SCL LOC = 'P51' ;
net SDA_DIR LOC = 'P56' ;
net SCL_DIR LOC = 'P57' ;
net SI_TDO LOC = 'P16' ;
net SO_TRST LOC = 'P32' ;
net SO_TMS LOC = 'P27' ;
net SO_TCK LOC = 'P30' ;
net SO_TDI LOC = 'P26' ;
net SO_SRST LOC = 'P12' ;
net SO_SDA_OUT LOC = 'P140' ;
net SO_SDA_IN LOC = 'P1' ;
net SO_SCL LOC = 'P137';
net ST_0 LOC = 'P29' ;
net ST_1 LOC = 'P21' ;
net ST_2 LOC = 'P11' ;
net ST_4 LOC = 'P134' ;
net ST_5 LOC = 'P139' ;
net FTP<0> LOC = 'P121' ;
net FTP<1> LOC = 'P120' ;
net FTP<2> LOC = 'P119' ;
net FTP<3> LOC = 'P116' ;
net FTP<4> LOC = 'P111' ;
net FTP<5> LOC = 'P112' ;
net FTP<6> LOC = 'P115' ;
net FTP<7> LOC = 'P114' ;

103
contrib/firmware/angie/hdl/src/angie_bitstream.vhd
View File

@ -1,103 +0,0 @@
-- SPDX-License-Identifier: BSD-3-Clause
----------------------------------------------------------------------------
-- Project Context: nanoXplore USB-JTAG Adapter Board, Spartan6
-- Design Name: NJTAG USB-JTAG Adapter FPGA source code
-- Module Name: _angie_openocd.vhd
-- Target Device: XC6SLX9-2 TQ144
-- Tool versions: ISE Webpack 13.2 -> 14.2
-- Author: Ahmed BOUDJELIDA nanoXplore SAS
----------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
library UNISIM;
use UNISIM.VComponents.all;
entity S609 is port(
TRST : in std_logic;
TMS : in std_logic;
TCK : in std_logic;
TDI : in std_logic;
TDO : out std_logic;
SRST : in std_logic;
SDA : inout std_logic;
SDA_DIR : in std_logic;
SCL : in std_logic;
SCL_DIR : in std_logic;
FTP : out std_logic_vector(7 downto 0); -- Test points
SI_TDO : in std_logic;
ST_0 : out std_logic;
ST_1 : out std_logic;
ST_2 : out std_logic;
ST_4 : out std_logic;
ST_5 : out std_logic;
SO_SDA_OUT : out std_logic;
SO_SDA_IN : in std_logic;
SO_SCL : out std_logic;
SO_TRST : out std_logic;
SO_TMS : out std_logic;
SO_TCK : out std_logic;
SO_TDI : out std_logic;
SO_SRST : out std_logic
);
end S609;
architecture A_S609 of S609 is
begin
--Directions:
ST_0 <= '0';
ST_1 <= '1';
--TDO:
TDO <= not SI_TDO;
--TRST - TCK - TMS - TDI:
SO_TRST <= TRST;
SO_TMS <= TMS;
SO_TCK <= TCK;
SO_TDI <= TDI;
ST_2 <= SRST;
SO_SRST <= '0';
SO_SCL <= SCL;
SDA <= not(SO_SDA_IN) when (SDA_DIR = '1') else 'Z';
SO_SDA_OUT <= SDA;
process(SDA_DIR)
begin
if(SDA_DIR = '0') then
ST_5 <= '0';
else
ST_5 <= '1';
end if;
end process;
process(SCL_DIR)
begin
if(SCL_DIR = '0') then
ST_4 <= '0';
else
ST_4 <= '1';
end if;
end process;
--Points de test:
FTP(0) <= SDA;
FTP(1) <= SCL;
FTP(2) <= not(SO_SDA_IN);
FTP(3) <= SDA_DIR;
FTP(5) <= SRST;
FTP(4) <= SI_TDO;
FTP(6) <= '1';
FTP(7) <= '1';
end A_S609;

2
contrib/gen-stellaris-part-header.pl
View File

@ -1,6 +1,4 @@
#!/usr/bin/perl
# SPDX-License-Identifier: GPL-2.0-or-later
# Automatically generates the StellarisParts struct in src/flash/nor/stellaris.c
# Uses the header files from TI/Luminary's StellarisWare complete Firmware Development Package
# available from: http://www.luminarymicro.com/products/software_updates.html

43
contrib/itmdump.c
View File

@ -1,6 +1,19 @@
// SPDX-License-Identifier: GPL-3.0-or-later
/* Copyright (C) 2010 by David Brownell */
/*
* Copyright (C) 2010 by David Brownell
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or (at
* your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/*
* Simple utility to parse and dump ARM Cortex-M3 SWO trace output. Once the
@ -43,9 +56,9 @@ unsigned int dump_swit;
* NOTE that this specific encoding could be space-optimized; and that
* trace data streams could also be history-sensitive.
*/
static void show_task(int port, unsigned int data)
static void show_task(int port, unsigned data)
{
unsigned int code = data >> 16;
unsigned code = data >> 16;
char buf[16];
if (dump_swit)
@ -77,7 +90,7 @@ static void show_task(int port, unsigned int data)
static void show_reserved(FILE *f, char *label, int c)
{
unsigned int i;
unsigned i;
if (dump_swit)
return;
@ -96,9 +109,9 @@ static void show_reserved(FILE *f, char *label, int c)
printf("\n");
}
static bool read_varlen(FILE *f, int c, unsigned int *value)
static bool read_varlen(FILE *f, int c, unsigned *value)
{
unsigned int size;
unsigned size;
unsigned char buf[4];
*value = 0;
@ -135,8 +148,8 @@ err:
static void show_hard(FILE *f, int c)
{
unsigned int type = c >> 3;
unsigned int value;
unsigned type = c >> 3;
unsigned value;
char *label;
if (dump_swit)
@ -230,16 +243,16 @@ static void show_hard(FILE *f, int c)
*/
struct {
int port;
void (*show)(int port, unsigned int data);
void (*show)(int port, unsigned data);
} format[] = {
{ .port = 31, .show = show_task, },
};
static void show_swit(FILE *f, int c)
{
unsigned int port = c >> 3;
unsigned int value = 0;
unsigned int i;
unsigned port = c >> 3;
unsigned value = 0;
unsigned i;
if (port + 1 == dump_swit) {
if (!read_varlen(f, c, &value))
@ -272,7 +285,7 @@ static void show_swit(FILE *f, int c)
static void show_timestamp(FILE *f, int c)
{
unsigned int counter = 0;
unsigned counter = 0;
char *label = "";
bool delayed = false;

15
contrib/libdcc/dcc_stdio.c
View File

@ -1,5 +1,3 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/***************************************************************************
* Copyright (C) 2008 by Dominic Rath *
* Dominic.Rath@gmx.de *
@ -7,6 +5,19 @@
* spen@spen-soft.co.uk *
* Copyright (C) 2008 by Frederik Kriewtz *
* frederik@kriewitz.eu *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#include "dcc_stdio.h"

15
contrib/libdcc/dcc_stdio.h
View File

@ -1,10 +1,21 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/***************************************************************************
* Copyright (C) 2008 by Dominic Rath *
* Dominic.Rath@gmx.de *
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef DCC_STDIO_H

15
contrib/libdcc/example.c
View File

@ -1,10 +1,21 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/***************************************************************************
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
* Copyright (C) 2008 by Frederik Kriewtz *
* frederik@kriewitz.eu *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#include "dcc_stdio.h"

4
contrib/list_example.c
View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/* SPDX-License-Identifier: GPL-2.0-or-later */
/* Copyright (C) 2021 by Andreas Fritiofson <andreas.fritiofson@gmail.com> */
/*
@ -12,7 +12,7 @@
#include <assert.h>
#include <helper/list.h>
static OOCD_LIST_HEAD(threads);
static LIST_HEAD(threads);
struct thread {
int id;

2
contrib/loaders/Makefile
View File

@ -1,5 +1,3 @@
# SPDX-License-Identifier: GPL-2.0-or-later
.PHONY: arm clean-arm
all: arm stm8

2
contrib/loaders/checksum/Makefile
View File

@ -1,5 +1,3 @@
# SPDX-License-Identifier: GPL-2.0-or-later
BIN2C = ../../../src/helper/bin2char.sh
ARM_CROSS_COMPILE ?= arm-none-eabi-

17
contrib/loaders/checksum/armv4_5_crc.s
View File

@ -1,8 +1,21 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/***************************************************************************
* Copyright (C) 2010 by Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
/*

17
contrib/loaders/checksum/armv7m_crc.s
View File

@ -1,8 +1,21 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/***************************************************************************
* Copyright (C) 2010 by Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
/*

17
contrib/loaders/checksum/mips32.s
View File

@ -1,8 +1,21 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/***************************************************************************
* Copyright (C) 2010 by Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
.global main

7
contrib/loaders/checksum/riscv_crc.c
View File

@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/* Copyright (C) 2009-2021 Free Software Foundation, Inc. */
/*
* SPDX-License-Identifier: GPL-2.0-or-later
* Copyright (C) 2009-2021 Free Software Foundation, Inc.
*/
/* Copied from https://github.com/gcc-mirror/gcc/blob/master/libiberty/crc32.c
* and then tweaked a little. */

2
contrib/loaders/debug/xscale/Makefile
View File

@ -1,5 +1,3 @@
# SPDX-License-Identifier: GPL-2.0-or-later
BIN2C = ../../../../src/helper/bin2char.sh
CROSS_COMPILE ?= arm-none-eabi-

15
contrib/loaders/debug/xscale/debug_handler.S
View File

@ -1,8 +1,19 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/***************************************************************************
* Copyright (C) 2006 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#include "protocol.h"

2
contrib/loaders/debug/xscale/debug_handler.ld
View File

@ -1,5 +1,3 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/* identify the Entry Point */
ENTRY(reset_handler)

15
contrib/loaders/debug/xscale/protocol.h
View File

@ -1,8 +1,19 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/***************************************************************************
* Copyright (C) 2006 by Dominic Rath *
* Dominic.Rath@gmx.de *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#define REG_R0 0

2
contrib/loaders/erase_check/Makefile
View File

@ -1,5 +1,3 @@
# SPDX-License-Identifier: GPL-2.0-or-later
BIN2C = ../../../src/helper/bin2char.sh
ARM_CROSS_COMPILE ?= arm-none-eabi-

17
contrib/loaders/erase_check/armv4_5_erase_check.s
View File

@ -1,8 +1,21 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/***************************************************************************
* Copyright (C) 2010 by Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
/*

17
contrib/loaders/erase_check/armv7m_erase_check.s
View File

@ -1,8 +1,21 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/***************************************************************************
* Copyright (C) 2010 by Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
/*

15
contrib/loaders/erase_check/stm8_erase_check.s
View File

@ -1,8 +1,19 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright (C) 2017 Ake Rehnman
* ake.rehnman(at)gmail.com
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
;;
;; erase check memory code

17
contrib/loaders/flash/armv4_5_cfi_intel_16.s
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@ -1,10 +1,23 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/***************************************************************************
* Copyright (C) 2005, 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* Copyright (C) 2010 Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
.text

17
contrib/loaders/flash/armv4_5_cfi_intel_32.s
View File

@ -1,10 +1,23 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/***************************************************************************
* Copyright (C) 2005, 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* Copyright (C) 2010 Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
.text

17
contrib/loaders/flash/armv4_5_cfi_intel_8.s
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@ -1,10 +1,23 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/***************************************************************************
* Copyright (C) 2005, 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* Copyright (C) 2010 Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
.text

17
contrib/loaders/flash/armv4_5_cfi_span_16.s
View File

@ -1,10 +1,23 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/***************************************************************************
* Copyright (C) 2005, 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* Copyright (C) 2010 Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
.text

17
contrib/loaders/flash/armv4_5_cfi_span_16_dq7.s
View File

@ -1,10 +1,23 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/***************************************************************************
* Copyright (C) 2005, 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* Copyright (C) 2010 Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
.text

17
contrib/loaders/flash/armv4_5_cfi_span_32.s
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@ -1,10 +1,23 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/***************************************************************************
* Copyright (C) 2005, 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* Copyright (C) 2010 Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
.text

17
contrib/loaders/flash/armv4_5_cfi_span_8.s
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@ -1,10 +1,23 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/***************************************************************************
* Copyright (C) 2005, 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* Copyright (C) 2010 Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
.text

17
contrib/loaders/flash/armv7m_cfi_span_16.s
View File

@ -1,10 +1,23 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/***************************************************************************
* Copyright (C) 2005, 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* Copyright (C) 2010 Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
.text

17
contrib/loaders/flash/armv7m_cfi_span_16_dq7.s
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@ -1,10 +1,23 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/***************************************************************************
* Copyright (C) 2005, 2007 by Dominic Rath *
* Dominic.Rath@gmx.de *
* Copyright (C) 2010 Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
.text

17
contrib/loaders/flash/armv7m_io.s
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@ -1,8 +1,21 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/***************************************************************************
* Copyright (C) 2013 by Henrik Nilsson *
* henrik.nilsson@bytequest.se *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
.text

2
contrib/loaders/flash/at91sam7x/at91sam7x_ocl_flash.script
View File

@ -1,5 +1,3 @@
# SPDX-License-Identifier: GPL-2.0-or-later
soft_reset_halt
load_image at91sam7x_ocl.bin 0x200000
resume 0x200000

29
contrib/loaders/flash/at91sam7x/at91sam7x_ram.ld
View File

@ -1,7 +1,32 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/****************************************************************************
* Copyright (c) 2006 by Michael Fischer. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of its contributors may
* be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
****************************************************************************
*
* History:

29
contrib/loaders/flash/at91sam7x/crt.s
View File

@ -1,7 +1,32 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/****************************************************************************
* Copyright (c) 2006 by Michael Fischer. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of its contributors may
* be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
****************************************************************************
*
* History:

15
contrib/loaders/flash/at91sam7x/dcc.c
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@ -1,8 +1,19 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/***************************************************************************
* Copyright (C) 2007 by Pavel Chromy *
* chromy@asix.cz *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#include "dcc.h"

15
contrib/loaders/flash/at91sam7x/dcc.h
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@ -1,8 +1,19 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/***************************************************************************
* Copyright (C) 2007 by Pavel Chromy *
* chromy@asix.cz *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef dccH
#define dccH

15
contrib/loaders/flash/at91sam7x/main.c
View File

@ -1,8 +1,19 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/***************************************************************************
* Copyright (C) 2007 by Pavel Chromy *
* chromy@asix.cz *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#include "platform.h"

2
contrib/loaders/flash/at91sam7x/makefile
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@ -1,5 +1,3 @@
# SPDX-License-Identifier: GPL-2.0-or-later
##############################################################################################
# Start of default section
#

15
contrib/loaders/flash/at91sam7x/ocl.h
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@ -1,8 +1,19 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/***************************************************************************
* Copyright (C) 2007 by Pavel Chromy *
* chromy@asix.cz *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OCL_H
#define OCL_H

15
contrib/loaders/flash/at91sam7x/platform.h
View File

@ -1,8 +1,19 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/***************************************************************************
* Copyright (C) 2007 by Pavel Chromy *
* chromy@asix.cz *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef platformH
#define platformH

15
contrib/loaders/flash/at91sam7x/samflash.c
View File

@ -1,8 +1,19 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/***************************************************************************
* Copyright (C) 2007 by Pavel Chromy *
* chromy@asix.cz *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#include "samflash.h"

15
contrib/loaders/flash/at91sam7x/samflash.h
View File

@ -1,8 +1,19 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/***************************************************************************
* Copyright (C) 2007 by Pavel Chromy *
* chromy@asix.cz *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef samflashH
#define samflashH

28
contrib/loaders/flash/at91sam7x/samregs.h
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@ -1,8 +1,32 @@
/* SPDX-License-Identifier: BSD-3-Clause */
/*
* Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holders nor the names of
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
* SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* For additional information see http://www.ethernut.de/
*/

2
contrib/loaders/flash/bluenrg-x/Makefile
View File

@ -1,5 +1,3 @@
# SPDX-License-Identifier: GPL-2.0-or-later
BIN2C = ../../../../src/helper/bin2char.sh
CROSS_COMPILE ?= arm-none-eabi-

2
contrib/loaders/flash/bluenrg-x/bluenrg-x_write.c
View File

@ -1,5 +1,3 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/* To be built with arm-none-eabi-gcc -c -mthumb -mcpu=cortex-m0 -O3 bluenrgx.c */
/* Then postprocess output of command "arm-none-eabi-objdump -d bluenrgx.o" to make a C array of bytes */

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