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7 Commits
riscv
...
compliance
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fb7009fc38 | |
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e09dd62229 | |
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73b6ea55eb | |
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c3bdcb0c4a | |
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353cf212bd | |
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e73d82e3d6 | |
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f97e4b53e4 |
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@ -383,7 +383,11 @@ static dmi_status_t dmi_scan(struct target *target, uint16_t *address_in,
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int retval = jtag_execute_queue();
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if (retval != ERROR_OK) {
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LOG_ERROR("dmi_scan failed jtag scan");
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static int once = 1;
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if (once) {
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LOG_ERROR("dmi_scan failed jtag scan");
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once = 0;
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}
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return DMI_STATUS_FAILED;
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}
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@ -418,13 +422,22 @@ static uint32_t dmi_read(struct target *target, uint16_t address)
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} else if (status == DMI_STATUS_SUCCESS) {
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break;
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} else {
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LOG_ERROR("failed read from 0x%x, status=%d", address, status);
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static int once = 1;
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if (once) {
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LOG_ERROR("failed read from 0x%x, status=%d", address, status);
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once = 0;
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}
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break;
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}
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usleep(100000);
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}
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if (status != DMI_STATUS_SUCCESS) {
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LOG_ERROR("Failed read from 0x%x; status=%d", address, status);
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static int once = 1;
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if (once) {
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LOG_INFO("Failed read from 0x%x; status=%d", address, status);
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once = 0;
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}
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return ~0;
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}
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@ -2268,6 +2281,9 @@ int riscv013_test_compliance(struct target *target) {
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dmstatus = dmi_read(target, DMI_DMSTATUS);
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} while ((dmstatus & DMI_DMSTATUS_ALLHALTED) == 0);
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dmi_write(target, DMI_DMSTATUS, 0xffffffff);
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COMPLIANCE_TEST(dmi_read(target, DMI_DMSTATUS) == dmstatus, "DMSTATUS is R/O");
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// resumereq. This will resume the hart but this test is destructive anyway.
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dmcontrol &= ~DMI_DMCONTROL_HALTREQ;
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dmcontrol = set_field(dmcontrol, DMI_DMCONTROL_RESUMEREQ, 1);
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@ -2340,6 +2356,12 @@ int riscv013_test_compliance(struct target *target) {
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}
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COMPLIANCE_TEST(dmi_read(target, DMI_HALTSUM) == expected_haltsum, "HALTSUM should report all halted harts");
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dmi_write(target, DMI_HALTSUM, 0xffffffff);
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COMPLIANCE_TEST(dmi_read(target, DMI_HALTSUM) == expected_haltsum, "HALTSUM is R/O");
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dmi_write(target, DMI_HALTSUM, 0x0);
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COMPLIANCE_TEST(dmi_read(target, DMI_HALTSUM) == expected_haltsum, "HALTSUM is R/O");
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for (int i = 0; i < riscv_count_harts(target); i +=32){
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uint32_t haltstat = dmi_read(target, 0x40 + (i / 32));
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uint32_t haltstat_expected = (((i + 1) * 32) <= riscv_count_harts(target)) ? 0xFFFFFFFFU : ((1U << (riscv_count_harts(target) % 32)) - 1);
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