Commit Graph

21 Commits

Author SHA1 Message Date
Palmer Dabbelt e481524362 Replace the 0.13-specific "program_t" with a generic one
This new version changes how we handle temporary registers: rather than
tracking them by hand (like in the old code), they're now tracked as
part of assembling programs.  The register save/restore assertion that
used to fire all the time no longer exists.
2017-04-13 14:37:20 -07:00
Palmer Dabbelt d0fcbc9b51 Add a RISC-V RTOS, which natievly supports multiple harts
This is a work in progress, but it's at the point where you can actually
debug multi-hart programs now.
2017-04-06 15:23:40 -07:00
Tim Newsome b363d1a37e Bunch of register access refactoring.
Got rid of the last reference to the old debug RAM code! (Mostly?)
SimpleF18Test passes now.

Change-Id: Iab51d436a50bec9a5e504df7fb3cd6be874da0be
2017-02-17 11:53:37 -08:00
Tim Newsome e6221e75c9 Attempt to discover XLEN with abstract reg reads
Change-Id: I7ce9c8c0c34bd875dba11596e6f6268320b2fb3a
2017-02-10 19:08:44 -08:00
Tim Newsome d055f86552 Most gdbserver tests pass now.
Change-Id: I14a8360d9cf2800ca5e6a44f7e58102b2baef719
2017-02-05 18:09:19 -08:00
Tim Newsome e51b0360f5 Make fpu regs work even if mstatus.fs is 0.
Change-Id: I2c283f2de226518ab9a4e0476edada51825b2993
2016-11-01 12:58:37 -07:00
Tim Newsome e3e745abb9 WIP for 64-bit support.
GPR register writes/reads seem to work.
2016-09-23 14:16:24 -07:00
Tim Newsome 32e7a962c3 Write fence.i before dret.
Makes things work if the ROM doesn't contain fence.i (which is slow, so
Andrew took it out).
2016-09-23 14:16:23 -07:00
Tim Newsome 90f458e63f Reading/writing s1 now works. 2016-09-23 14:16:23 -07:00
Tim Newsome c364bd0ab5 We can run to a software breakpoint, but
gdb doesn't notice we're halted once we hit it, even though riscv_poll()
is setting the target state to halted.
2016-09-23 14:16:23 -07:00
Tim Newsome dce4a992a3 Single memory reads/writes work. 2016-09-23 14:16:23 -07:00
Tim Newsome 1b349df638 WIP hackery.
Main thing I added is code to output "verilog" for every JTAG op we do,
so we can run the same thing in simulation.
2016-09-23 14:16:23 -07:00
Tim Newsome 9f22176618 Reading registers appears to work. 2016-09-23 14:16:23 -07:00
Tim Newsome 84944ded87 Fix up some register stuff.
Now you can attach with gdb, and it'll attempt to read a register. That
will fail because the core won't clear debug interrupt. Adding nops
doesn't help this time.
2016-09-23 14:16:23 -07:00
Tim Newsome f634702aaf Successfully determine xlen.
There's a nop in there for no reason, though.
2016-09-23 14:16:23 -07:00
Tim Newsome 482497c51a Blind implementation of write_memory. 2016-09-23 14:16:22 -07:00
Tim Newsome 50ca8ac373 Blind implementation of read_memory. 2016-09-23 14:16:22 -07:00
Tim Newsome 76fe7db0db In theory assert_reset/deassert_reset work. 2016-09-23 14:16:22 -07:00
Tim Newsome ea6836c5f6 WIP, blind coding. 2016-09-23 14:16:22 -07:00
Tim Newsome feff2dd9e7 Always leave the TAP in Run-Test/Idle. 2016-09-23 14:16:22 -07:00
Tim Newsome 98f2fa897f Halt should work now. 2016-09-23 14:16:22 -07:00