instrument "target/stm32x5x_common.cfg" used by both STM32L5x/U5x
to support HLA adapters like "interface/stlink.cfg" in non-secure mode
if the device switches to secure mode, the debug session will be
stopped immediately (with an explanatory message).
Change-Id: I645fdd55e3448ef82d0ddcc396f42fd7b2f39ac3
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reported-by: Patrik Bachan <diggit@users.sourceforge.net>
Fixes: https://sourceforge.net/p/openocd/tickets/317/
Reviewed-on: https://review.openocd.org/c/openocd/+/6546
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
`xtensa_do_step` is invoked from `xtensa_prepare_resume` to silently
step over BP/WP before resuming.
For example; in the case of WPs (DEBUGCAUSE_DB), in the current
implementation `xtensa_do_step` will generate one more
`TARGET_EVENT_HALTED` after the original one caused by WP itself.
This patch moves the halted event cb call after
the step is done successfully.
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I9048e14fb316dc124847a42cfaefb1f76b5ce53e
Reviewed-on: https://review.openocd.org/c/openocd/+/7274
Tested-by: jenkins
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
- Fix the declaration of riscv command 'set_mem_access'.
- Remove non existing riscv command 'set_scratch_ram'.
- Add riscv commands 'info', 'reset_delays'; copy the description
from the 'help' text.
- Don't add riscv commands 'set_prefer_sba' and 'test_sba_config_reg'
as they are marked as deprecated.
- Ensure that 'test_sba_config_reg' prints a deprecation warning
when used.
Change-Id: I39dc3aec4e7f13b69ac19685f1b593790acdde83
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Jan Matyas <matyas@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7268
Reviewed-by: Tim Newsome <tim@sifive.com>
Tested-by: jenkins
Remove the @anchor{} tags that are not referenced in the
documentation.
Change-Id: Ia8e9f75afb08e08ef99d0c8fd82115d689e4a267
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7270
Tested-by: jenkins
This GPIO driver is common to SoCs that have in-order ARM cores
(BCM2835) as well as superscalar (BCM2836-7) and speculative
out-of-order cores (BCM2711).
For BCM2837 and BCM2711, the processor can dual-issue stores and
is free to merge writes to peripheral memory for pages mapped
MT_NORMAL_NC, which is the default provided by /dev/[gpio]mem.
This can cause glitches (or missing edges) on GPIO pins when
toggled with no delay, as pipelined writes to the same address
can get arbitrarily squelched.
To prevent this happening, make sure the preceding write ops are
flushed outside the shareable domain by using a memory barrier.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
Change-Id: I8805cc0911667bcb9b7f4ca340d7f4f1cb25d096
Reviewed-on: https://review.openocd.org/c/openocd/+/7258
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Add info on what is optional,
Change-Id: Iedfa969243d95736aaf1b236caa2c2b33f563fe7
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7256
Tested-by: jenkins
FreeBSD fully supports pkg-config; the .pc files for the internal
libusb has been added with
https://cgit.freebsd.org/src/commit/?id=041d3f3f09b8
and became part of FreeBSD 10.0 in 2014-01-16.
Remove the obsoleted requirements for adding .pc files.
While there, add pkgconf as an alternative to pkg-config.
Change-Id: I16aea735c44107cb71945f225a979682c8c92d0a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7255
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins
Currently 'number' field is zero in the register cache and
this causes an issue on `rtos get_thread_reg_list` calls.
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: Iaef11e01f55d012969bbc1933f82847d5e02fec5
Reviewed-on: https://review.openocd.org/c/openocd/+/7246
Tested-by: jenkins
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Some config changes required to run ESP32-S3 with full feature set
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I38022bb5ff5830e1cf9d11d6fe795ea99d91e9db
Reviewed-on: https://review.openocd.org/c/openocd/+/7254
Tested-by: jenkins
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Some config changes required to run ESP32-S2 with full feature set
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: Ie0a742442254ec6e95d4e05be40213b079a94dab
Reviewed-on: https://review.openocd.org/c/openocd/+/7253
Tested-by: jenkins
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Some config changes required to run ESP32 with full feature set
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I484324f8497ec7934bb73164c638fc5f6460fcc4
Reviewed-on: https://review.openocd.org/c/openocd/+/7252
Tested-by: jenkins
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The work area should be backed up.
The flash probe runs an algorithm on the target CPU.
The flash is probed during gdb connect if gdb_memory_map is enabled
(is enabled by default).
Without backup the target memory gets corrupted on gdb connect.
Change-Id: I3344b9dc6cbf904d49f3b05ab104b541d1d63422
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7257
Tested-by: jenkins
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
arp_waitstate will not work on not-examined state
Change-Id: I56c3e1c7e63af108e4ed1dbacebb567f9bf46264
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7230
Tested-by: jenkins
Reviewed-by: Erwan Gouriou
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
An application often idling in real sleep mode may make a Cortex-M target
hard to access as CPU clock are gated and debug requests are responded
by WAIT ack.
Try to examine the target under reset as the last resort.
Change-Id: I7c3de39fb1e6c23b76e2a0a85ab75f23aac94c4d
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7229
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
An application often idling in real sleep mode may make a Cortex-M target
hard to access as CPU clock are gated and debug requests are responded
by WAIT ack.
Try to examine the target under reset as the last resort.
Change-Id: Ife875a966a838c37dde987bc584ad0a1f4d020d6
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7228
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
After merging [1] 'reset halt' does not work on not responding Cortex-M.
Relax the examined tests and try to set vector catch VC_CORERESET
if debug_ap is available.
While on it add an info about examination state to debug logs.
Fixes: [1] commit 98d9f1168c ("target: reset target examined flag if target::examine() fails")
Change-Id: Ie2e018610026180af5997d70231061a275f05c76
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6745
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
When configure option --without-capstone is used, the macro
HAVE_CAPSTONE is not defined in config.h, and the following lines
are instead present:
/* 1 if you have Capstone disassembly framework. */
/* #undef HAVE_CAPSTONE */
This cause compile error with message:
arm_disassembler.h:190:5: error: "HAVE_CAPSTONE" is not
defined, evaluates to 0 [-Werror=undef]
190 | #if HAVE_CAPSTONE
| ^~~~~~~~~~~~~
This is caused by configure.ac that does not call AC_DEFINE when
--without-capstone option is present.
Fix configure.ac to always provide the autoconf macro
HAVE_CAPSTONE, with either value 0 or 1.
Change-Id: Ie5ac98b2c25746dd721812c91baaac61ec877ecd
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7224
Tested-by: jenkins
For 64-bit TAR setup, if 'tar_valid == false' perform the upper 32-bit
write even if the cached copy matches the upper TAR value to be written.
Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Change-Id: I320377dc90a9d1d7b64cbb281b2527e56c7621ee
Reviewed-on: https://review.openocd.org/c/openocd/+/7245
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Since all the device definition when accessing device from jtag is also
valid when accessing from swd, lets make sure the configuration can
handle the same.
Signed-off-by: Nishanth Menon <nm@ti.com>
Change-Id: I5af071137fd8c3b52cc4ef72401f8eba952f9cad
Reviewed-on: https://review.openocd.org/c/openocd/+/7090
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Read values must be at albuff so that can be copied to buffer
on function exit.
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I74a533e8f12f1002ca06a98a7c7cd928552b4cc5
Reviewed-on: https://review.openocd.org/c/openocd/+/7226
Tested-by: jenkins
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Actually they are the base of epc and eps
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I4f43b9609a9929399fb5d3fa0203efc8a98e94c9
Reviewed-on: https://review.openocd.org/c/openocd/+/7227
Tested-by: jenkins
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
ST-Link v2 dongles can be used with many cortex-m parts, but they have
one limitation -- they can only perform 8-bit and 32-bit writes to the
target. 16-bit writes are done using a pair of 8-bit writes. While not
usually an issue, in the case of the at91samd flash driver, the 16-bit
'command' register must have both halves written in the same
operation.
Fortunately, this register has two pad bytes above it in the address
space, making it safe to always access with 32-bit operations.
Change-Id: I44b0db9406982a8db5818c0533d3101618741db2
Signed-off-by: Keith Packard <keithp@keithp.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7234
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
There is no need to count number of examined threads twice.
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Change-Id: Id32ead853d1ddcd4e67062d6f795700feb20cb4b
Reviewed-on: https://review.openocd.org/c/openocd/+/7223
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
The bitbang driver floods the log by many messages with very
little informational value.
Remove some LOG_DEBUGs, convert some others to LOG_DEBUG_IO.
Change-Id: I0c7539467b45543e12932c67dc71e86d58c8c6cd
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7220
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
Tested-by: jenkins
Make write to DP_TARGETSEL is logged the similar way as other DP register
read/writes.
While on it fix checkpatch message
'Concatenated strings should use spaces between elements'
Change-Id: I98f724c984e8c4610cc461340f4c4a7cc9627ed9
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7219
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
Tested-by: jenkins
armv7m_start_algorithm() stored all non-debug execution
registers from register cache without checking validity.
Check if the register cache is valid.
Try to read from CPU if not valid.
Issue a warning if register read fails.
Change-Id: I365f86d65243230cf521b13909575e5986a87a50
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7240
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
The num_reg_params parameter of target_run_algorithm() was not
updated when setting "sp" was introduced. Therefore "sp" as the last
register parameter was not passed to a target algo.
Introduce a new helper variable with correct count of register parameters
and use it everywhere needed.
Change-Id: I934a71380783d98917167f1569145808ef23540f
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7225
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
Change-Id: Idf3bce842b4507c1f12692b5fbcd6730637de9db
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7216
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
Tested-by: jenkins
Flash read_id/erase/write operation on running target failed
in target_run_algorithm() anyway. It generated lot of error messages.
Check the target state and bail out early if target is running.
Change-Id: I903f5f38c8e61016e5002b235e5f07803bd2ec4e
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7215
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
SPI flash erase often takes longer than the fixed timeout 3 seconds.
Introduce a configurable timeout_ms parameter to rp2040_call_rom_func().
Compute the erase timeout from the number of blocks to be erased.
While on it make the timeouts shorter for connect flash, flush cache and
enter/exit xip (1 second is enough).
Change-Id: I552bfa317ee17064de3a54ec2f0c63e84ba87222
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7214
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
The size of the flash write buffer should be rounded
down to the multiply of flash page size.
Using write chunks of unadjusted size results in write of chunks
unaligned to flash pages.
Change-Id: If7931362ee193dff4dc2df7ec78f13530658cf08
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7187
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
While on it restore memory-mapped mode also after flash erase
(originally was restored after flash write only).
Change-Id: I5e153b79ac27a8439f57239ce90ce8a79c0bb8a1
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7186
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Prepend stack_grab_and_prep() function name by rp2040_ prefix.
Introduce target helper variable in rp2040_stack_grab_and_prep()
and use it instead of dereferencing bank->target several times.
Move flash ID reading code to the new rp2040_spi_read_flash_id()
function.
Change-Id: I9d6e51e17e36e6230155a586065499f2f260089a
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7185
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
swd_multidrop_select() uses its own retry loop.
If select fails, do_reconnect flag remains set on exit and causes
useless reconnect.
Clear do_reconnect flag in retry loop.
Change-Id: Ie06d6967d7f4a977774c8530bb8d4b3e5ab4f62c
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7217
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
Tested-by: jenkins
Implementation of ADI v6 introduced banking of DP reg 0.
The accompanying change preventing DP SELECT write before
DP IDR read during connect was added to swd_connect_single() only.
Unchanged swd_connect_multidrop() / swd_multidrop_select_inner()
was broken as it emited DP SELECT and put DP to protocol error state.
Copy dap->select handling to swd_multidrop_select_inner().
Fixes: 72fb88613f (adiv6: add low level swd transport)
Change-Id: I514cd6d9ae2ba97ce3657b459df22638c278a0b1
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7213
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jonathan Bell <jonathan@raspberrypi.com>
The STM32L5 and U5 devices have DBGMCU_CR trace related bits changed
wrt other STM32 devices.
Fix the setting in configuration script.
Change-Id: I0bbc48e7b1290b603c6966cf5ddd42df389e6ede
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7117
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Increase "value_buf" size so it can hold a 64-bit number represented
as a string. Previous size could only hold a 32-bit number string.
Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Change-Id: If6fbc875236e6ddc59522fbc25db0129eb60ee27
Reviewed-on: https://review.openocd.org/c/openocd/+/7221
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Scan-build reports:
Logic error: Uninitialized argument value
riscv.c:2688 2nd function call argument is an uninitialized value
This is a real error cause by running the command "riscv
authdata_write" without arguments. In such case 'value' is not
initialized and is passed to and used by r->authdata_write().
Reorganize the code to:
- detect the correct amount or command's arguments;
- drop the LOG_ERROR() on ERROR_COMMAND_SYNTAX_ERROR;
- drop the 'else' after 'return'.
Change-Id: I62e031220593b8308bc674b753e15d16d4c5c9ac
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7210
Tested-by: jenkins
Reviewed-by: Jan Matyas <matyas@codasip.com>
Reviewed-by: Tim Newsome <tim@sifive.com>
Scan-build reports:
Logic error: Result of operation is garbage or undefined
riscv.c:1614 The result of the left shift is undefined due
to shifting by '4294967281', which is greater or
equal to the width of type 'target_addr_t'
This is a false warning due to clang that considers the impossible
case of 32 bits hart (xlen = 32) in SATP_MODE_SV48 mode
(info->va_bits = 48).
Under such case:
riscv.c:1614 ... ((target_addr_t)1 << (xlen - (info->va_bits - 1))) ...
the shift amount wraps around the unsigned type and assumes the
value 4294967281 (0xfffffff1).
Use assert() to prevent clang from complaining.
Change-Id: I08fdd2a806c350d061641e28cf15a51b397db099
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7209
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Jan Matyas <matyas@codasip.com>
Tested-by: jenkins
Scan-build reports:
Unused code: Dead nested assignment
riscv.c:459 Although the value stored to 'ir_user4_raw' is
used in the enclosing expression, the value is
never actually read from 'ir_user4_raw'
This is caused by the value reassigned in 'ir_user4_raw':
riscv.c:459 ir_user4[3] = (uint8_t)(ir_user4_raw >>= 8);
but never used.
Drop the DIY conversion in favor of h_u32_to_le() that does not
reassign the input value.
Change-Id: Ifad29f4c46d4a2d0a2f5a5c4104d768cc3db2794
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7208
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Jan Matyas <matyas@codasip.com>
Tested-by: jenkins
Tarek BOCHKATI
Tarek BOCHKATI
Erhan Kurubas
Antonio Borneo
Jonathan Bell
Tomas Vanek
Daniel Goehring
Nishanth Menon
Daniel Anselmi
Keith Packard
Evgeniy Naydanov
Ian Thompson